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jeremybenn |
/* -----------------------------------------------------------------------
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darwin.S - Copyright (c) 2000 John Hornkvist
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Copyright (c) 2004, 2010 Free Software Foundation, Inc.
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PowerPC Assembly glue.
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Permission is hereby granted, free of charge, to any person obtaining
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a copy of this software and associated documentation files (the
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``Software''), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sublicense, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject to
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the following conditions:
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The above copyright notice and this permission notice shall be included
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in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
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OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR
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OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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OTHER DEALINGS IN THE SOFTWARE.
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----------------------------------------------------------------------- */
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#define LIBFFI_ASM
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#if defined(__ppc64__)
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#define MODE_CHOICE(x, y) y
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#else
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#define MODE_CHOICE(x, y) x
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#endif
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#define machine_choice MODE_CHOICE(ppc7400,ppc64)
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; Define some pseudo-opcodes for size-independent load & store of GPRs ...
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#define lgu MODE_CHOICE(lwzu, ldu)
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#define lg MODE_CHOICE(lwz,ld)
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#define sg MODE_CHOICE(stw,std)
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#define sgu MODE_CHOICE(stwu,stdu)
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#define sgux MODE_CHOICE(stwux,stdux)
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; ... and the size of GPRs and their storage indicator.
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#define GPR_BYTES MODE_CHOICE(4,8)
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#define LOG2_GPR_BYTES MODE_CHOICE(2,3) /* log2(GPR_BYTES) */
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#define g_long MODE_CHOICE(long, quad) /* usage is ".g_long" */
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; From the ABI doc: "Mac OS X ABI Function Call Guide" Version 2009-02-04.
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#define LINKAGE_SIZE MODE_CHOICE(24,48)
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#define PARAM_AREA MODE_CHOICE(32,64)
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#define SAVED_LR_OFFSET MODE_CHOICE(8,16) /* save position for lr */
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/* If there is any FP stuff we make space for all of the regs. */
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#define SAVED_FPR_COUNT 13
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#define FPR_SIZE 8
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#define RESULT_BYTES 16
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/* This should be kept in step with the same value in ffi_darwin.c. */
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#define ASM_NEEDS_REGISTERS 4
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#define SAVE_REGS_SIZE (ASM_NEEDS_REGISTERS * GPR_BYTES)
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#include
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#include
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#define JUMPTARGET(name) name
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#define L(x) x
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.text
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.align 2
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.globl _ffi_prep_args
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.align 2
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.globl _ffi_call_DARWIN
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/* We arrive here with:
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r3 = ptr to extended cif.
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r4 = -bytes.
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r5 = cif flags.
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r6 = ptr to return value.
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r7 = fn pointer (user func).
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r8 = fn pointer (ffi_prep_args).
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r9 = ffi_type* for the ret val. */
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_ffi_call_DARWIN:
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Lstartcode:
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mr r12,r8 /* We only need r12 until the call,
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so it does not have to be saved. */
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LFB1:
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/* Save the old stack pointer as AP. */
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mr r8,r1
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LCFI0:
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/* Save the retval type in parents frame. */
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sg r9,(LINKAGE_SIZE+6*GPR_BYTES)(r8)
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/* Allocate the stack space we need. */
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sgux r1,r1,r4
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/* Save registers we use. */
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mflr r9
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sg r9,SAVED_LR_OFFSET(r8)
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sg r28,-(4 * GPR_BYTES)(r8)
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sg r29,-(3 * GPR_BYTES)(r8)
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sg r30,-(2 * GPR_BYTES)(r8)
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sg r31,-( GPR_BYTES)(r8)
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#if !defined(POWERPC_DARWIN)
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/* The TOC slot is reserved in the Darwin ABI and r2 is volatile. */
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sg r2,(5 * GPR_BYTES)(r1)
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#endif
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LCFI1:
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/* Save arguments over call. */
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mr r31,r5 /* flags, */
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mr r30,r6 /* rvalue, */
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mr r29,r7 /* function address, */
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mr r28,r8 /* our AP. */
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LCFI2:
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/* Call ffi_prep_args. r3 = extended cif, r4 = stack ptr copy. */
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mr r4,r1
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li r9,0
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mtctr r12 /* r12 holds address of _ffi_prep_args. */
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bctrl
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#if !defined(POWERPC_DARWIN)
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/* The TOC slot is reserved in the Darwin ABI and r2 is volatile. */
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lg r2,(5 * GPR_BYTES)(r1)
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#endif
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/* Now do the call.
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Set up cr1 with bits 4-7 of the flags. */
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mtcrf 0x40,r31
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/* Get the address to call into CTR. */
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mtctr r29
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/* Load all those argument registers.
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We have set up a nice stack frame, just load it into registers. */
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lg r3, (LINKAGE_SIZE )(r1)
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lg r4, (LINKAGE_SIZE + GPR_BYTES)(r1)
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lg r5, (LINKAGE_SIZE + 2 * GPR_BYTES)(r1)
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lg r6, (LINKAGE_SIZE + 3 * GPR_BYTES)(r1)
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nop
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lg r7, (LINKAGE_SIZE + 4 * GPR_BYTES)(r1)
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lg r8, (LINKAGE_SIZE + 5 * GPR_BYTES)(r1)
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lg r9, (LINKAGE_SIZE + 6 * GPR_BYTES)(r1)
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lg r10,(LINKAGE_SIZE + 7 * GPR_BYTES)(r1)
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L1:
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/* ... Load all the FP registers. */
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bf 6,L2 /* No floats to load. */
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lfd f1, -SAVE_REGS_SIZE-(13*FPR_SIZE)(r28)
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lfd f2, -SAVE_REGS_SIZE-(12*FPR_SIZE)(r28)
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lfd f3, -SAVE_REGS_SIZE-(11*FPR_SIZE)(r28)
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lfd f4, -SAVE_REGS_SIZE-(10*FPR_SIZE)(r28)
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nop
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lfd f5, -SAVE_REGS_SIZE-( 9*FPR_SIZE)(r28)
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lfd f6, -SAVE_REGS_SIZE-( 8*FPR_SIZE)(r28)
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lfd f7, -SAVE_REGS_SIZE-( 7*FPR_SIZE)(r28)
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lfd f8, -SAVE_REGS_SIZE-( 6*FPR_SIZE)(r28)
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nop
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lfd f9, -SAVE_REGS_SIZE-( 5*FPR_SIZE)(r28)
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lfd f10,-SAVE_REGS_SIZE-( 4*FPR_SIZE)(r28)
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lfd f11,-SAVE_REGS_SIZE-( 3*FPR_SIZE)(r28)
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lfd f12,-SAVE_REGS_SIZE-( 2*FPR_SIZE)(r28)
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nop
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lfd f13,-SAVE_REGS_SIZE-( 1*FPR_SIZE)(r28)
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L2:
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mr r12,r29 /* Put the target address in r12 as specified. */
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mtctr r12
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nop
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nop
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/* Make the call. */
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bctrl
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/* Now, deal with the return value. */
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/* m64 structure returns can occupy the same set of registers as
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would be used to pass such a structure as arg0 - so take care
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not to step on any possibly hot regs. */
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/* Get the flags.. */
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mtcrf 0x03,r31 ; we need c6 & cr7 now.
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; FLAG_RETURNS_NOTHING also covers struct ret-by-ref.
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bt 30,L(done_return_value) ; FLAG_RETURNS_NOTHING
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bf 27,L(scalar_return_value) ; not FLAG_RETURNS_STRUCT
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/* OK, so we have a struct. */
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#if defined(__ppc64__)
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bt 31,L(maybe_return_128) ; FLAG_RETURNS_128BITS, special case
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/* OK, we have to map the return back to a mem struct.
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We are about to trample the parents param area, so recover the
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return type. r29 is free, since the call is done. */
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lg r29,(LINKAGE_SIZE + 6 * GPR_BYTES)(r28)
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sg r3, (LINKAGE_SIZE )(r28)
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sg r4, (LINKAGE_SIZE + GPR_BYTES)(r28)
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sg r5, (LINKAGE_SIZE + 2 * GPR_BYTES)(r28)
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sg r6, (LINKAGE_SIZE + 3 * GPR_BYTES)(r28)
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nop
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sg r7, (LINKAGE_SIZE + 4 * GPR_BYTES)(r28)
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sg r8, (LINKAGE_SIZE + 5 * GPR_BYTES)(r28)
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sg r9, (LINKAGE_SIZE + 6 * GPR_BYTES)(r28)
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sg r10,(LINKAGE_SIZE + 7 * GPR_BYTES)(r28)
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/* OK, so do the block move - we trust that memcpy will not trample
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the fprs... */
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mr r3,r30 ; dest
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addi r4,r28,LINKAGE_SIZE ; source
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/* The size is a size_t, should be long. */
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lg r5,0(r29)
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/* Figure out small structs */
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cmpi 0,r5,4
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bgt L3 ; 1, 2 and 4 bytes have special rules.
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cmpi 0,r5,3
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beq L3 ; not 3
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addi r4,r4,8
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subf r4,r5,r4
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L3:
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bl _memcpy
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223 |
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224 |
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/* ... do we need the FP registers? - recover the flags.. */
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225 |
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mtcrf 0x03,r31 ; we need c6 & cr7 now.
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226 |
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bf 29,L(done_return_value) /* No floats in the struct. */
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227 |
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stfd f1, -SAVE_REGS_SIZE-(13*FPR_SIZE)(r28)
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228 |
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stfd f2, -SAVE_REGS_SIZE-(12*FPR_SIZE)(r28)
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229 |
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stfd f3, -SAVE_REGS_SIZE-(11*FPR_SIZE)(r28)
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230 |
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stfd f4, -SAVE_REGS_SIZE-(10*FPR_SIZE)(r28)
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nop
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232 |
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stfd f5, -SAVE_REGS_SIZE-( 9*FPR_SIZE)(r28)
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stfd f6, -SAVE_REGS_SIZE-( 8*FPR_SIZE)(r28)
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234 |
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stfd f7, -SAVE_REGS_SIZE-( 7*FPR_SIZE)(r28)
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235 |
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stfd f8, -SAVE_REGS_SIZE-( 6*FPR_SIZE)(r28)
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nop
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237 |
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stfd f9, -SAVE_REGS_SIZE-( 5*FPR_SIZE)(r28)
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238 |
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stfd f10,-SAVE_REGS_SIZE-( 4*FPR_SIZE)(r28)
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239 |
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stfd f11,-SAVE_REGS_SIZE-( 3*FPR_SIZE)(r28)
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240 |
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stfd f12,-SAVE_REGS_SIZE-( 2*FPR_SIZE)(r28)
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nop
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242 |
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stfd f13,-SAVE_REGS_SIZE-( 1*FPR_SIZE)(r28)
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243 |
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244 |
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mr r3,r29 ; ffi_type *
|
245 |
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mr r4,r30 ; dest
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246 |
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addi r5,r28,-SAVE_REGS_SIZE-(13*FPR_SIZE) ; fprs
|
247 |
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xor r6,r6,r6
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248 |
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sg r6,(LINKAGE_SIZE + 7 * GPR_BYTES)(r28)
|
249 |
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addi r6,r28,(LINKAGE_SIZE + 7 * GPR_BYTES) ; point to a zeroed counter.
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250 |
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bl _darwin64_struct_floats_to_mem
|
251 |
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|
252 |
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b L(done_return_value)
|
253 |
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#else
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254 |
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stw r3,0(r30) ; m32 the only struct return in reg is 4 bytes.
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#endif
|
256 |
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b L(done_return_value)
|
257 |
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|
258 |
|
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L(fp_return_value):
|
259 |
|
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/* Do we have long double to store? */
|
260 |
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bf 31,L(fd_return_value) ; FLAG_RETURNS_128BITS
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261 |
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stfd f1,0(r30)
|
262 |
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stfd f2,FPR_SIZE(r30)
|
263 |
|
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b L(done_return_value)
|
264 |
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|
265 |
|
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L(fd_return_value):
|
266 |
|
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/* Do we have double to store? */
|
267 |
|
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bf 28,L(float_return_value)
|
268 |
|
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stfd f1,0(r30)
|
269 |
|
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b L(done_return_value)
|
270 |
|
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|
271 |
|
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L(float_return_value):
|
272 |
|
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/* We only have a float to store. */
|
273 |
|
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stfs f1,0(r30)
|
274 |
|
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b L(done_return_value)
|
275 |
|
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|
276 |
|
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L(scalar_return_value):
|
277 |
|
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bt 29,L(fp_return_value) ; FLAG_RETURNS_FP
|
278 |
|
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; ffi_arg is defined as unsigned long.
|
279 |
|
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sg r3,0(r30) ; Save the reg.
|
280 |
|
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bf 28,L(done_return_value) ; not FLAG_RETURNS_64BITS
|
281 |
|
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|
282 |
|
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#if defined(__ppc64__)
|
283 |
|
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L(maybe_return_128):
|
284 |
|
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std r3,0(r30)
|
285 |
|
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bf 31,L(done_return_value) ; not FLAG_RETURNS_128BITS
|
286 |
|
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std r4,8(r30)
|
287 |
|
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#else
|
288 |
|
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stw r4,4(r30)
|
289 |
|
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#endif
|
290 |
|
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|
291 |
|
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/* Fall through. */
|
292 |
|
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/* We want this at the end to simplify eh epilog computation. */
|
293 |
|
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|
294 |
|
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L(done_return_value):
|
295 |
|
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/* Restore the registers we used and return. */
|
296 |
|
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lg r29,SAVED_LR_OFFSET(r28)
|
297 |
|
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; epilog
|
298 |
|
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lg r31,-(1 * GPR_BYTES)(r28)
|
299 |
|
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mtlr r29
|
300 |
|
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lg r30,-(2 * GPR_BYTES)(r28)
|
301 |
|
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lg r29,-(3 * GPR_BYTES)(r28)
|
302 |
|
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lg r28,-(4 * GPR_BYTES)(r28)
|
303 |
|
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lg r1,0(r1)
|
304 |
|
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blr
|
305 |
|
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LFE1:
|
306 |
|
|
.align 1
|
307 |
|
|
/* END(_ffi_call_DARWIN) */
|
308 |
|
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|
309 |
|
|
/* Provide a null definition of _ffi_call_AIX. */
|
310 |
|
|
.text
|
311 |
|
|
.globl _ffi_call_AIX
|
312 |
|
|
.align 2
|
313 |
|
|
_ffi_call_AIX:
|
314 |
|
|
blr
|
315 |
|
|
/* END(_ffi_call_AIX) */
|
316 |
|
|
|
317 |
|
|
/* EH stuff. */
|
318 |
|
|
|
319 |
|
|
#define EH_DATA_ALIGN_FACT MODE_CHOICE(0x7c,0x78)
|
320 |
|
|
|
321 |
|
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.static_data
|
322 |
|
|
.align LOG2_GPR_BYTES
|
323 |
|
|
LLFB0$non_lazy_ptr:
|
324 |
|
|
.g_long Lstartcode
|
325 |
|
|
|
326 |
|
|
.section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support
|
327 |
|
|
EH_frame1:
|
328 |
|
|
.set L$set$0,LECIE1-LSCIE1
|
329 |
|
|
.long L$set$0 ; Length of Common Information Entry
|
330 |
|
|
LSCIE1:
|
331 |
|
|
.long 0x0 ; CIE Identifier Tag
|
332 |
|
|
.byte 0x1 ; CIE Version
|
333 |
|
|
.ascii "zR\0" ; CIE Augmentation
|
334 |
|
|
.byte 0x1 ; uleb128 0x1; CIE Code Alignment Factor
|
335 |
|
|
.byte EH_DATA_ALIGN_FACT ; sleb128 -4; CIE Data Alignment Factor
|
336 |
|
|
.byte 0x41 ; CIE RA Column
|
337 |
|
|
.byte 0x1 ; uleb128 0x1; Augmentation size
|
338 |
|
|
.byte 0x90 ; FDE Encoding (indirect pcrel)
|
339 |
|
|
.byte 0xc ; DW_CFA_def_cfa
|
340 |
|
|
.byte 0x1 ; uleb128 0x1
|
341 |
|
|
.byte 0x0 ; uleb128 0x0
|
342 |
|
|
.align LOG2_GPR_BYTES
|
343 |
|
|
LECIE1:
|
344 |
|
|
|
345 |
|
|
.globl _ffi_call_DARWIN.eh
|
346 |
|
|
_ffi_call_DARWIN.eh:
|
347 |
|
|
LSFDE1:
|
348 |
|
|
.set L$set$1,LEFDE1-LASFDE1
|
349 |
|
|
.long L$set$1 ; FDE Length
|
350 |
|
|
LASFDE1:
|
351 |
|
|
.long LASFDE1-EH_frame1 ; FDE CIE offset
|
352 |
|
|
.g_long LLFB0$non_lazy_ptr-. ; FDE initial location
|
353 |
|
|
.set L$set$3,LFE1-Lstartcode
|
354 |
|
|
.g_long L$set$3 ; FDE address range
|
355 |
|
|
.byte 0x0 ; uleb128 0x0; Augmentation size
|
356 |
|
|
.byte 0x4 ; DW_CFA_advance_loc4
|
357 |
|
|
.set L$set$4,LCFI0-Lstartcode
|
358 |
|
|
.long L$set$4
|
359 |
|
|
.byte 0xd ; DW_CFA_def_cfa_register
|
360 |
|
|
.byte 0x08 ; uleb128 0x08
|
361 |
|
|
.byte 0x4 ; DW_CFA_advance_loc4
|
362 |
|
|
.set L$set$5,LCFI1-LCFI0
|
363 |
|
|
.long L$set$5
|
364 |
|
|
.byte 0x11 ; DW_CFA_offset_extended_sf
|
365 |
|
|
.byte 0x41 ; uleb128 0x41
|
366 |
|
|
.byte 0x7e ; sleb128 -2
|
367 |
|
|
.byte 0x9f ; DW_CFA_offset, column 0x1f
|
368 |
|
|
.byte 0x1 ; uleb128 0x1
|
369 |
|
|
.byte 0x9e ; DW_CFA_offset, column 0x1e
|
370 |
|
|
.byte 0x2 ; uleb128 0x2
|
371 |
|
|
.byte 0x9d ; DW_CFA_offset, column 0x1d
|
372 |
|
|
.byte 0x3 ; uleb128 0x3
|
373 |
|
|
.byte 0x9c ; DW_CFA_offset, column 0x1c
|
374 |
|
|
.byte 0x4 ; uleb128 0x4
|
375 |
|
|
.byte 0x4 ; DW_CFA_advance_loc4
|
376 |
|
|
.set L$set$6,LCFI2-LCFI1
|
377 |
|
|
.long L$set$6
|
378 |
|
|
.byte 0xd ; DW_CFA_def_cfa_register
|
379 |
|
|
.byte 0x1c ; uleb128 0x1c
|
380 |
|
|
.align LOG2_GPR_BYTES
|
381 |
|
|
LEFDE1:
|
382 |
|
|
.align 1
|
383 |
|
|
|