OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [libgcc/] [config/] [fr30/] [lib1funcs.S] - Blame information for rev 801

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 734 jeremybenn
/* libgcc routines for the FR30.
2
   Copyright (C) 1998, 1999, 2009 Free Software Foundation, Inc.
3
 
4
This file is part of GCC.
5
 
6
GCC is free software; you can redistribute it and/or modify it
7
under the terms of the GNU General Public License as published by the
8
Free Software Foundation; either version 3, or (at your option) any
9
later version.
10
 
11
This file is distributed in the hope that it will be useful, but
12
WITHOUT ANY WARRANTY; without even the implied warranty of
13
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14
General Public License for more details.
15
 
16
Under Section 7 of GPL version 3, you are granted additional
17
permissions described in the GCC Runtime Library Exception, version
18
3.1, as published by the Free Software Foundation.
19
 
20
You should have received a copy of the GNU General Public License and
21
a copy of the GCC Runtime Library Exception along with this program;
22
see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
23
.  */
24
 
25
        .macro FUNC_START name
26
        .text
27
        .globl __\name
28
        .type  __\name, @function
29
__\name:
30
        .endm
31
 
32
        .macro FUNC_END name
33
        .size  __\name, . - __\name
34
        .endm
35
 
36
        .macro DIV_BODY reg number
37
        .if \number
38
        DIV_BODY  \reg, "\number - 1"
39
        div1    \reg
40
        .endif
41
        .endm
42
 
43
#ifdef L_udivsi3
44
FUNC_START udivsi3
45
        ;; Perform an unsiged division of r4 / r5 and place the result in r4.
46
        ;; Does not handle overflow yet...
47
        mov     r4, mdl
48
        div0u   r5
49
        DIV_BODY r5 32
50
        mov     mdl, r4
51
        ret
52
FUNC_END udivsi3
53
#endif /* L_udivsi3 */
54
 
55
#ifdef L_divsi3
56
FUNC_START divsi3
57
        ;; Perform a siged division of r4 / r5 and place the result in r4.
58
        ;; Does not handle overflow yet...
59
        mov     r4, mdl
60
        div0s   r5
61
        DIV_BODY r5 32
62
        div2    r5
63
        div3
64
        div4s
65
        mov     mdl, r4
66
        ret
67
FUNC_END divsi3
68
#endif /* L_divsi3 */
69
 
70
#ifdef L_umodsi3
71
FUNC_START umodsi3
72
        ;; Perform an unsiged division of r4 / r5 and places the remainder in r4.
73
        ;; Does not handle overflow yet...
74
        mov     r4, mdl
75
        div0u   r5
76
        DIV_BODY r5 32
77
        mov     mdh, r4
78
        ret
79
FUNC_END umodsi3
80
#endif /* L_umodsi3 */
81
 
82
#ifdef L_modsi3
83
FUNC_START modsi3
84
        ;; Perform a siged division of r4 / r5 and place the remainder in r4.
85
        ;; Does not handle overflow yet...
86
        mov     r4, mdl
87
        div0s   r5
88
        DIV_BODY r5 32
89
        div2    r5
90
        div3
91
        div4s
92
        mov     mdh, r4
93
        ret
94
FUNC_END modsi3
95
#endif /* L_modsi3 */
96
 
97
#ifdef L_negsi2
98
FUNC_START negsi2
99
        ldi:8   #0, r0
100
        sub     r4, r0
101
        mov     r0, r4
102
        ret
103
FUNC_END negsi2
104
#endif /* L_negsi2 */
105
 
106
#ifdef L_one_cmplsi2
107
FUNC_START one_cmplsi2
108
        ldi:8   #0xff, r0
109
        extsb   r0
110
        eor     r0, r4
111
        ret
112
FUNC_END one_cmplsi2
113
#endif /* L_one_cmplsi2 */
114
 
115
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.