OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [libgcc/] [config/] [h8300/] [crtn.S] - Blame information for rev 734

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 734 jeremybenn
/* Copyright (C) 2001, 2009, 2011 Free Software Foundation, Inc.
2
   This file was adapted from glibc sources.
3
 
4
This file is part of GCC.
5
 
6
GCC is free software; you can redistribute it and/or modify it
7
under the terms of the GNU General Public License as published by the
8
Free Software Foundation; either version 3, or (at your option) any
9
later version.
10
 
11
GCC is distributed in the hope that it will be useful,
12
but WITHOUT ANY WARRANTY; without even the implied warranty of
13
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14
General Public License for more details.
15
 
16
Under Section 7 of GPL version 3, you are granted additional
17
permissions described in the GCC Runtime Library Exception, version
18
3.1, as published by the Free Software Foundation.
19
 
20
You should have received a copy of the GNU General Public License and
21
a copy of the GCC Runtime Library Exception along with this program;
22
see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
23
.  */
24
 
25
/* See an explanation about .init and .fini in crti.S.  */
26
 
27
#ifdef __H8300H__
28
#ifdef __NORMAL_MODE__
29
        .h8300hn
30
#else
31
        .h8300h
32
#endif
33
#endif
34
 
35
#ifdef __H8300S__
36
#ifdef __NORMAL_MODE__
37
        .h8300sn
38
#else
39
        .h8300s
40
#endif
41
#endif
42
#ifdef __H8300SX__
43
#ifdef __NORMAL_MODE__
44
        .h8300sxn
45
#else
46
        .h8300sx
47
#endif
48
#endif
49
        .section .init, "ax", @progbits
50
        rts
51
 
52
        .section .fini, "ax", @progbits
53
        rts

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.