URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Details |
Compare with Previous |
View Log
Line No. |
Rev |
Author |
Line |
1 |
734 |
jeremybenn |
/* Store register values as _Unwind_Word type in DWARF2 EH unwind context.
|
2 |
|
|
Copyright (C) 2011
|
3 |
|
|
Free Software Foundation, Inc.
|
4 |
|
|
|
5 |
|
|
This file is part of GCC.
|
6 |
|
|
|
7 |
|
|
GCC is free software; you can redistribute it and/or modify it
|
8 |
|
|
under the terms of the GNU General Public License as published
|
9 |
|
|
by the Free Software Foundation; either version 3, or (at your
|
10 |
|
|
option) any later version.
|
11 |
|
|
|
12 |
|
|
GCC is distributed in the hope that it will be useful, but WITHOUT
|
13 |
|
|
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
14 |
|
|
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
|
15 |
|
|
License for more details.
|
16 |
|
|
|
17 |
|
|
You should have received a copy of the GNU General Public License and
|
18 |
|
|
a copy of the GCC Runtime Library Exception along with this program;
|
19 |
|
|
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
|
20 |
|
|
<http://www.gnu.org/licenses/>. */
|
21 |
|
|
|
22 |
|
|
/* Define this macro if the target stores register values as _Unwind_Word
|
23 |
|
|
type in unwind context. Only enable it for x32. */
|
24 |
|
|
#if defined __x86_64 && !defined __LP64__
|
25 |
|
|
# define REG_VALUE_IN_UNWIND_CONTEXT
|
26 |
|
|
#endif
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.