OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [libgcc/] [config/] [m32c/] [t-m32c] - Blame information for rev 801

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 734 jeremybenn
LIB1ASMSRC = m32c/lib1funcs.S
2
 
3
LIB1ASMFUNCS = \
4
        __m32c_memregs \
5
        __m32c_eh_return \
6
        __m32c_mulsi3 \
7
        __m32c_cmpsi2 \
8
        __m32c_ucmpsi2 \
9
        __m32c_jsri16
10
 
11
LIB2ADD = $(srcdir)/config/m32c/lib2funcs.c \
12
          $(srcdir)/config/m32c/trapv.c
13
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.