OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [libgcc/] [config/] [microblaze/] [mulsi3.S] - Blame information for rev 747

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 734 jeremybenn
###################################-*-asm*-
2
#
3
#  Copyright 2009, 2010, 2011 Free Software Foundation, Inc.
4
#
5
#  Contributed by Michael Eager .
6
#
7
#  This file is free software; you can redistribute it and/or modify it
8
#  under the terms of the GNU General Public License as published by the
9
#  Free Software Foundation; either version 3, or (at your option) any
10
#  later version.
11
#
12
#  GCC is distributed in the hope that it will be useful, but WITHOUT
13
#  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14
#  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
15
#  License for more details.
16
#
17
#  Under Section 7 of GPL version 3, you are granted additional
18
#  permissions described in the GCC Runtime Library Exception, version
19
#  3.1, as published by the Free Software Foundation.
20
#
21
#  You should have received a copy of the GNU General Public License and
22
#  a copy of the GCC Runtime Library Exception along with this program;
23
#  see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
24
#  .
25
#
26
#  mulsi3.S
27
#
28
#  Multiply operation for 32 bit integers.
29
#       Input : Operand1 in Reg r5
30
#               Operand2 in Reg r6
31
#       Output: Result [op1 * op2] in Reg r3
32
#
33
#######################################
34
 
35
        .globl  __mulsi3
36
        .ent    __mulsi3
37
        .type   __mulsi3,@function
38
__mulsi3:
39
        .frame  r1,0,r15
40
        add     r3,r0,r0
41
        BEQI    r5,$L_Result_Is_Zero      # Multiply by Zero
42
        BEQI    r6,$L_Result_Is_Zero      # Multiply by Zero
43
        BGEId   r5,$L_R5_Pos
44
        XOR     r4,r5,r6                  # Get the sign of the result
45
        RSUBI   r5,r5,0                   # Make r5 positive
46
$L_R5_Pos:
47
        BGEI    r6,$L_R6_Pos
48
        RSUBI   r6,r6,0                   # Make r6 positive
49
$L_R6_Pos:
50
        bri     $L1
51
$L2:
52
        add     r5,r5,r5
53
$L1:
54
        srl     r6,r6
55
        addc    r7,r0,r0
56
        beqi    r7,$L2
57
        bneid   r6,$L2
58
        add     r3,r3,r5
59
        blti    r4,$L_NegateResult
60
        rtsd    r15,8
61
        nop
62
$L_NegateResult:
63
        rtsd    r15,8
64
        rsub    r3,r3,r0
65
$L_Result_Is_Zero:
66
        rtsd    r15,8
67
        addi    r3,r0,0
68
        .end __mulsi3
69
        .size   __mulsi3, . - __mulsi3

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.