OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [libgcc/] [config/] [mips/] [t-mips] - Blame information for rev 801

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 734 jeremybenn
LIB2_SIDITI_CONV_FUNCS = yes
2
 
3
FPBIT = true
4
FPBIT_CFLAGS = -DQUIET_NAN_NEGATED
5
DPBIT = true
6
DPBIT_CFLAGS = -DQUIET_NAN_NEGATED

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.