OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [libgcc/] [config/] [rl78/] [lib2shift.c] - Blame information for rev 747

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 734 jeremybenn
/* Shift functions for the GCC support library for the Renesas RL78 processors.
2
   Copyright (C) 2011 Free Software Foundation, Inc.
3
   Contributed by Red Hat.
4
 
5
   This file is part of GCC.
6
 
7
   GCC is free software; you can redistribute it and/or modify
8
   it under the terms of the GNU General Public License as published by
9
   the Free Software Foundation; either version 3, or (at your option)
10
   any later version.
11
 
12
   GCC is distributed in the hope that it will be useful,
13
   but WITHOUT ANY WARRANTY; without even the implied warranty of
14
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
   GNU General Public License for more details.
16
 
17
   Under Section 7 of GPL version 3, you are granted additional
18
   permissions described in the GCC Runtime Library Exception, version
19
   3.1, as published by the Free Software Foundation.
20
 
21
   You should have received a copy of the GNU General Public License and
22
   a copy of the GCC Runtime Library Exception along with this program;
23
   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
24
   <http://www.gnu.org/licenses/>.  */
25
 
26
typedef          int  sint32_type   __attribute__ ((mode (SI)));
27
typedef unsigned int  uint32_type   __attribute__ ((mode (SI)));
28
typedef          int  sint16_type   __attribute__ ((mode (HI)));
29
typedef unsigned int  uint16_type   __attribute__ ((mode (HI)));
30
 
31
uint32_type __ashlsi3 (uint32_type in, char bit);
32
sint32_type __ashrsi3 (sint32_type in, char bit);
33
int __clrsbhi2 (sint16_type x);
34
extern int __clrsbsi2 (sint32_type x);
35
 
36
typedef struct
37
{
38
  union
39
  {
40
    uint32_type u;
41
    uint16_type h[2];
42
  } u;
43
} dd;
44
 
45
uint32_type
46
__ashlsi3 (uint32_type in, char bit)
47
{
48
  uint16_type h, l;
49
  dd d;
50
 
51
  if (bit > 32)
52
    return 0;
53
  if (bit < 0)
54
    return in;
55
 
56
  d.u.u = in;
57
  h = d.u.h[1];
58
  l = d.u.h[0];
59
 
60
  if (bit > 15)
61
    {
62
      h = l;
63
      l = 0;
64
      bit -= 16;
65
    }
66
 
67
  while (bit)
68
    {
69
      h = (h << 1) | (l >> 15);
70
      l <<= 1;
71
      bit --;
72
    }
73
 
74
  d.u.h[1] = h;
75
  d.u.h[0] = l;
76
  return d.u.u;
77
}
78
 
79
sint32_type
80
__ashrsi3 (sint32_type in, char bit)
81
{
82
  sint16_type h;
83
  uint16_type l;
84
  dd d;
85
 
86
  if (bit > 32)
87
    return 0;
88
  if (bit < 0)
89
    return in;
90
 
91
  d.u.u = in;
92
  h = d.u.h[1];
93
  l = d.u.h[0];
94
 
95
  while (bit)
96
    {
97
      l = (h << 15) | (l >> 1);
98
      h >>= 1;
99
      bit --;
100
    }
101
 
102
  d.u.h[1] = h;
103
  d.u.h[0] = l;
104
  return d.u.u;
105
}
106
 
107
int
108
__clrsbhi2 (sint16_type x)
109
{
110
  if (x == 0)
111
    return 15;
112
  return __clrsbsi2 ((sint32_type) x) - 16;
113
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.