OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [libgcc/] [config/] [rl78/] [rl78-divmod.h] - Blame information for rev 849

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 734 jeremybenn
/* libgcc routines for RL78
2
   Copyright (C) 2005, 2009, 2011
3
   Free Software Foundation, Inc.
4
   Contributed by Red Hat.
5
 
6
   This file is part of GCC.
7
 
8
   GCC is free software; you can redistribute it and/or modify it
9
   under the terms of the GNU General Public License as published
10
   by the Free Software Foundation; either version 3, or (at your
11
   option) any later version.
12
 
13
   GCC is distributed in the hope that it will be useful, but WITHOUT
14
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
16
   License for more details.
17
 
18
   Under Section 7 of GPL version 3, you are granted additional
19
   permissions described in the GCC Runtime Library Exception, version
20
   3.1, as published by the Free Software Foundation.
21
 
22
   You should have received a copy of the GNU General Public License and
23
   a copy of the GCC Runtime Library Exception along with this program;
24
   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
25
   <http://www.gnu.org/licenses/>.  */
26
 
27
UINT_TYPE C3(udivmod,NAME_MODE,4) (UINT_TYPE, UINT_TYPE, word_type);
28
SINT_TYPE C3(__div,NAME_MODE,3)   (SINT_TYPE, SINT_TYPE);
29
SINT_TYPE C3(__mod,NAME_MODE,3)   (SINT_TYPE, SINT_TYPE);
30
UINT_TYPE C3(__udiv,NAME_MODE,3)  (UINT_TYPE, UINT_TYPE);
31
UINT_TYPE C3(__umod,NAME_MODE,3)  (UINT_TYPE, UINT_TYPE);
32
 
33
UINT_TYPE
34
C3(udivmod,NAME_MODE,4) (UINT_TYPE num, UINT_TYPE den, word_type modwanted)
35
{
36
  UINT_TYPE bit = 1;
37
  UINT_TYPE res = 0;
38
 
39
  while (den < num && bit && !(den & (1L << BITS_MINUS_1)))
40
    {
41
      den <<= 1;
42
      bit <<= 1;
43
    }
44
  while (bit)
45
    {
46
      if (num >= den)
47
        {
48
          num -= den;
49
          res |= bit;
50
        }
51
      bit >>= 1;
52
      den >>= 1;
53
    }
54
  if (modwanted)
55
    return num;
56
  return res;
57
}
58
 
59
SINT_TYPE
60
C3(__div,NAME_MODE,3) (SINT_TYPE a, SINT_TYPE b)
61
{
62
  word_type neg = 0;
63
  SINT_TYPE res;
64
 
65
  if (a < 0)
66
    {
67
      a = -a;
68
      neg = !neg;
69
    }
70
 
71
  if (b < 0)
72
    {
73
      b = -b;
74
      neg = !neg;
75
    }
76
 
77
  res = C3(udivmod,NAME_MODE,4) (a, b, 0);
78
 
79
  if (neg)
80
    res = -res;
81
 
82
  return res;
83
}
84
 
85
SINT_TYPE
86
C3(__mod,NAME_MODE,3) (SINT_TYPE a, SINT_TYPE b)
87
{
88
  word_type neg = 0;
89
  SINT_TYPE res;
90
 
91
  if (a < 0)
92
    {
93
      a = -a;
94
      neg = 1;
95
    }
96
 
97
  if (b < 0)
98
    b = -b;
99
 
100
  res = C3(udivmod,NAME_MODE,4) (a, b, 1);
101
 
102
  if (neg)
103
    res = -res;
104
 
105
  return res;
106
}
107
 
108
UINT_TYPE
109
C3(__udiv,NAME_MODE,3) (UINT_TYPE a, UINT_TYPE b)
110
{
111
  return C3(udivmod,NAME_MODE,4) (a, b, 0);
112
}
113
 
114
UINT_TYPE
115
C3(__umod,NAME_MODE,3) (UINT_TYPE a, UINT_TYPE b)
116
{
117
  return C3(udivmod,NAME_MODE,4) (a, b, 1);
118
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.