OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [libgcc/] [config/] [s390/] [32/] [_fixsfdi.c] - Blame information for rev 758

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 734 jeremybenn
/* Definitions of target machine for GNU compiler, for IBM S/390
2
   Copyright (C) 1999, 2000, 2001, 2007, 2008 and 2009
3
   Free Software Foundation, Inc.
4
   Contributed by Hartmut Penner (hpenner@de.ibm.com) and
5
                  Ulrich Weigand (uweigand@de.ibm.com).
6
 
7
This file is part of GCC.
8
 
9
GCC is free software; you can redistribute it and/or modify it under
10
the terms of the GNU General Public License as published by the Free
11
Software Foundation; either version 3, or (at your option) any later
12
version.
13
 
14
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15
WARRANTY; without even the implied warranty of MERCHANTABILITY or
16
FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
17
for more details.
18
 
19
Under Section 7 of GPL version 3, you are granted additional
20
permissions described in the GCC Runtime Library Exception, version
21
3.1, as published by the Free Software Foundation.
22
 
23
You should have received a copy of the GNU General Public License and
24
a copy of the GCC Runtime Library Exception along with this program;
25
see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
26
<http://www.gnu.org/licenses/>.  */
27
 
28
#define EXP(fp)         (((fp.l) >> 23) & 0xFF)
29
#define EXCESS          126
30
#define SIGNBIT         0x80000000
31
#define SIGN(fp)        ((fp.l) & SIGNBIT)
32
#define HIDDEN          (1 << 23)
33
#define MANT(fp)        (((fp.l) & 0x7FFFFF) | HIDDEN)
34
#define FRAC(fp)        ((fp.l) & 0x7FFFFF)
35
 
36
typedef int DItype_x __attribute__ ((mode (DI)));
37
typedef unsigned int UDItype_x __attribute__ ((mode (DI)));
38
typedef int SItype_x __attribute__ ((mode (SI)));
39
typedef unsigned int USItype_x __attribute__ ((mode (SI)));
40
 
41
union float_long
42
  {
43
    float f;
44
    USItype_x l;
45
  };
46
 
47
DItype_x __fixsfdi (float a1);
48
 
49
/* convert double to int */
50
DItype_x
51
__fixsfdi (float a1)
52
{
53
    register union float_long fl1;
54
    register int exp;
55
    register DItype_x l;
56
 
57
    fl1.f = a1;
58
 
59
    /* +/- 0, denormalized */
60
 
61
    if (!EXP (fl1))
62
      return 0;
63
 
64
    exp = EXP (fl1) - EXCESS - 24;
65
 
66
    /* number < 1 */
67
 
68
    if (exp < -24)
69
      return 0;
70
 
71
    /* NaN */
72
 
73
    if ((EXP(fl1) == 0xff) && (FRAC(fl1) != 0)) /* NaN */
74
      return 0x8000000000000000ULL;
75
 
76
    /* Number big number & +/- inf */
77
 
78
    if (exp >= 40) {
79
        l = (long long)1<<63;
80
        if (!SIGN(fl1))
81
            l--;
82
        return l;
83
    }
84
 
85
    l = MANT(fl1);
86
 
87
    if (exp > 0)
88
      l <<= exp;
89
    else
90
      l >>= -exp;
91
 
92
    return (SIGN (fl1) ? -l : l);
93
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.