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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [libgcc/] [config/] [spu/] [float_unssidf.c] - Blame information for rev 777

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1 734 jeremybenn
/* Copyright (C) 2006, 2008, 2009 Free Software Foundation, Inc.
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   This file is free software; you can redistribute it and/or modify it under
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   the terms of the GNU General Public License as published by the Free
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   Software Foundation; either version 3 of the License, or (at your option)
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   any later version.
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   This file is distributed in the hope that it will be useful, but WITHOUT
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   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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   for more details.
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   Under Section 7 of GPL version 3, you are granted additional
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   permissions described in the GCC Runtime Library Exception, version
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   3.1, as published by the Free Software Foundation.
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   You should have received a copy of the GNU General Public License and
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   a copy of the GCC Runtime Library Exception along with this program;
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   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
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   <http://www.gnu.org/licenses/>.  */
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#include <spu_intrinsics.h>
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const unsigned char __sidf_pat[16] __attribute__ ((__aligned__ (16))) = {
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  0x02, 0x03, 0x10, 0x11,
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  0x12, 0x13, 0x80, 0x80,
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  0x06, 0x07, 0x14, 0x15,
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  0x16, 0x17, 0x80, 0x80
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};
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/* double __float_unssidf (unsigned int SI) */
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qword __float_unssidf (qword SI);
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qword
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__float_unssidf (qword SI)
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{
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  qword t0, t1, t2, t3, t4, t5, t6, t7;
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  t0 = si_clz (SI);
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  t1 = si_il (1054);
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  t2 = si_shl (SI, t0);
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  t3 = si_ceqi (t0, 32);
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  t4 = si_sf (t0, t1);
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  t5 = si_a (t2, t2);
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  t6 = si_andc (t4, t3);
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  t7 = si_shufb (t6, t5, *(const qword *) __sidf_pat);
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  return si_shlqbii (t7, 4);
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}

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