URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [libgomp/] [testsuite/] [libgomp.c/] [atomic-6.c] - Blame information for rev 865

Go to most recent revision | Details | Compare with Previous | View Log


/* PR middle-end/36106 */
/* { dg-options "-O2" } */
/* { dg-options "-O2 -mieee" { target alpha*-*-* } } */
/* { dg-options "-O2 -march=i586" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 
#ifdef __i386__
# include "cpuid.h"
#endif
 
extern void abort (void);
 
union { unsigned long long l; double d; } u = { .l = 0x7ff0000000072301ULL };
 
int __attribute__((noinline))
do_test (void)
{
#pragma omp atomic
  u.d += 1.0L;
  return 0;
}
 
int
main (void)
{
#ifdef __i386__
  unsigned int eax, ebx, ecx, edx;
 
  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
    return 0;
 
  if (!(edx & bit_CMPXCHG8B))
    return 0;
#endif
 
  do_test ();
 
  return 0;
}

Line No.	Rev	Author	Line
1	735	jeremybenn	`/* PR middle-end/36106 */`
2			`/* { dg-options "-O2" } */`
3			`/* { dg-options "-O2 -mieee" { target alpha--* } } */`
4			`/* { dg-options "-O2 -march=i586" { target { { i?86-- x86_64-- } && ia32 } } } */`
5
6			`#ifdef __i386__`
7			`# include "cpuid.h"`
8			`#endif`
9
10			`extern void abort (void);`
11
12			`union { unsigned long long l; double d; } u = { .l = 0x7ff0000000072301ULL };`
13
14			`int __attribute__((noinline))`
15			`do_test (void)`
16			`{`
17			`#pragma omp atomic`
18			`u.d += 1.0L;`
19			`return 0;`
20			`}`
21
22			`int`
23			`main (void)`
24			`{`
25			`#ifdef __i386__`
26			`unsigned int eax, ebx, ecx, edx;`
27
28			`if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))`
29			`return 0;`
30
31			`if (!(edx & bit_CMPXCHG8B))`
32			`return 0;`
33			`#endif`
34
35			`do_test ();`
36
37			`return 0;`
38			`}`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [libgomp/] [testsuite/] [libgomp.c/] [atomic-6.c] - Blame information for rev 865