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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [libitm/] [config/] [generic/] [cacheline.h] - Blame information for rev 801

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1 737 jeremybenn
/* Copyright (C) 2009, 2011 Free Software Foundation, Inc.
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   Contributed by Richard Henderson <rth@redhat.com>.
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   This file is part of the GNU Transactional Memory Library (libitm).
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   Libitm is free software; you can redistribute it and/or modify it
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   under the terms of the GNU General Public License as published by
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   the Free Software Foundation; either version 3 of the License, or
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   (at your option) any later version.
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   Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
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   WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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   FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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   more details.
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   Under Section 7 of GPL version 3, you are granted additional
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   permissions described in the GCC Runtime Library Exception, version
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   3.1, as published by the Free Software Foundation.
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   You should have received a copy of the GNU General Public License and
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   a copy of the GCC Runtime Library Exception along with this program;
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   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
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   <http://www.gnu.org/licenses/>.  */
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#ifndef LIBITM_CACHELINE_H
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#define LIBITM_CACHELINE_H 1
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namespace GTM HIDDEN {
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// A cacheline is the smallest unit with which locks are associated.
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// The current implementation of the _ITM_[RW] barriers assumes that
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// all data types can fit (aligned) within a cachline, which means
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// in practice sizeof(complex long double) is the smallest cacheline size.
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// It ought to be small enough for efficient manipulation of the
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// modification mask, below.
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#ifndef CACHELINE_SIZE
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# define CACHELINE_SIZE 32
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#endif
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// A gtm_cacheline_mask stores a modified bit for every modified byte
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// in the cacheline with which it is associated.
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typedef sized_integral<CACHELINE_SIZE / 8>::type gtm_cacheline_mask;
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union gtm_cacheline
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{
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  // Byte access to the cacheline.
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  unsigned char b[CACHELINE_SIZE] __attribute__((aligned(CACHELINE_SIZE)));
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  // Larger sized access to the cacheline.
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  uint16_t u16[CACHELINE_SIZE / sizeof(uint16_t)];
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  uint32_t u32[CACHELINE_SIZE / sizeof(uint32_t)];
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  uint64_t u64[CACHELINE_SIZE / sizeof(uint64_t)];
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  gtm_word w[CACHELINE_SIZE / sizeof(gtm_word)];
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};
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} // namespace GTM
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#endif // LIBITM_CACHELINE_H

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