OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [config/] [tc-frv.h] - Blame information for rev 866

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius
/* tc-frv.h -- Header file for tc-frv.c.
2
   Copyright 2002, 2004, 2005, 2007 Free Software Foundation, Inc.
3
 
4
   This file is part of GAS, the GNU Assembler.
5
 
6
   GAS is free software; you can redistribute it and/or modify
7
   it under the terms of the GNU General Public License as published by
8
   the Free Software Foundation; either version 3, or (at your option)
9
   any later version.
10
 
11
   GAS is distributed in the hope that it will be useful,
12
   but WITHOUT ANY WARRANTY; without even the implied warranty of
13
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
   GNU General Public License for more details.
15
 
16
   You should have received a copy of the GNU General Public License
17
   along with GAS; see the file COPYING.  If not, write to
18
   the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19
   Boston, MA 02110-1301, USA. */
20
 
21
#define TC_FRV
22
 
23
#define LISTING_HEADER "FRV GAS "
24
 
25
/* The target BFD architecture.  */
26
#define TARGET_ARCH bfd_arch_frv
27
 
28
#define TARGET_FORMAT (frv_md_fdpic_enabled () \
29
                       ? "elf32-frvfdpic" : "elf32-frv")
30
extern bfd_boolean frv_md_fdpic_enabled (void);
31
 
32
#define TARGET_BYTES_BIG_ENDIAN 1
33
 
34
/* Permit temporary numeric labels.  */
35
#define LOCAL_LABELS_FB 1
36
 
37
#define DIFF_EXPR_OK            /* .-foo gets turned into PC relative relocs */
38
 
39
/* We don't need to handle .word strangely.  */
40
#define WORKING_DOT_WORD
41
 
42
/* Values passed to md_apply_fix don't include the symbol value.  */
43
#define MD_APPLY_SYM_VALUE(FIX) 0
44
 
45
extern void frv_tomcat_workaround PARAMS ((void));
46
#define md_cleanup frv_tomcat_workaround
47
 
48
#define md_number_to_chars frv_md_number_to_chars
49
 
50
extern long frv_relax_frag PARAMS ((fragS *, long));
51
#define md_relax_frag(segment, fragP, stretch) frv_relax_frag(fragP, stretch)
52
 
53
#define tc_fix_adjustable(FIX) frv_fix_adjustable (FIX)
54
struct fix;
55
extern bfd_boolean frv_fix_adjustable PARAMS ((struct fix *));
56
 
57
/* When relaxing, we need to emit various relocs we otherwise wouldn't.  */
58
#define TC_FORCE_RELOCATION(fix) frv_force_relocation (fix)
59
extern int frv_force_relocation PARAMS ((struct fix *));
60
 
61
/* If we simplify subtractions that aren't SUB_SAME or SUB_ABS, we end
62
   up with PCrel fixups, but since we don't have any PCrel relocs, we
63
   crash.  Preventing simplification gets us a good, early error.  */
64
#define TC_FORCE_RELOCATION_SUB_LOCAL(fixP) 1
65
 
66
#undef GAS_CGEN_MAX_FIXUPS
67
#define GAS_CGEN_MAX_FIXUPS 1
68
 
69
void frv_frob_label PARAMS ((symbolS *));
70
#define tc_frob_label(sym) frv_frob_label(sym)
71
 
72
#define tc_gen_reloc gas_cgen_tc_gen_reloc
73
 
74
#define md_cgen_record_fixup_exp frv_cgen_record_fixup_exp
75
 
76
/* Call md_pcrel_from_section(), not md_pcrel_from().  */
77
#define MD_PCREL_FROM_SECTION(FIX, SEC) md_pcrel_from_section (FIX, SEC)
78
extern long md_pcrel_from_section PARAMS ((struct fix *, segT));
79
 
80
/* After all of the symbols have been adjusted, go over the file looking
81
   for any relocations that pic won't support.  */
82
#define tc_frob_file() frv_frob_file ()
83
extern void frv_frob_file       PARAMS ((void));
84
 
85
/* We don't want 0x00 for code alignment because this generates `add.p
86
   gr0, gr0, gr0' patterns.  Although it's fine as a nop instruction,
87
   it has the VLIW packing bit set, which means if you have a bunch of
88
   them in a row and attempt to execute them, you'll exceed the VLIW
89
   capacity and fail.  This also gets GDB confused sometimes, because
90
   it won't set breakpoints in instructions other than the first of a
91
   VLIW pack, so you used to be unable to set a breakpoint in the
92
   initial instruction of a function that followed such
93
   alignment-introduced instructions.
94
 
95
   We could have arranged to emit `nop' instructions (0x80880000),
96
   maybe even VLIW-pack sequences of nop instructions as much as
97
   possible for the selected machine type, just in case the alignment
98
   code actually happens to run, but this is probably too much effort
99
   for little gain.  This code is not meant to be run anyway, so just
100
   emit nops.  */
101
#define MAX_MEM_FOR_RS_ALIGN_CODE (3 + 4)
102
#define HANDLE_ALIGN(FRAGP) do                                          \
103
  if ((FRAGP)->fr_type == rs_align_code)                                \
104
    {                                                                   \
105
      valueT count = ((FRAGP)->fr_next->fr_address                      \
106
                      - ((FRAGP)->fr_address + (FRAGP)->fr_fix));       \
107
      char *dest = (FRAGP)->fr_literal + (FRAGP)->fr_fix;               \
108
      if ((count & 3) != 0)                                              \
109
        {                                                               \
110
          memset (dest, 0, (count & 3));                         \
111
          (FRAGP)->fr_fix += (count & 3);                               \
112
          dest += (count & 3);                                          \
113
          count -= (count & 3);                                         \
114
        }                                                               \
115
      if (count)                                                        \
116
        {                                                               \
117
          (FRAGP)->fr_var = 4;                                          \
118
          *dest++ = 0x80;                                               \
119
          *dest++ = 0x88;                                               \
120
          *dest++ = 0x00;                                               \
121
          *dest++ = 0x00;                                               \
122
        }                                                               \
123
    }                                                                   \
124
 while (0)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.