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[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [arm/] [armv1-bad.l] - Blame information for rev 832

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[^:]*: Assembler messages:
[^:]*:4: Error: invalid pseudo operation -- `str r0,=0x00ff0000'
[^:]*:5: Error: bad expression -- `ldr r0,{r1}'
[^:]*:6: Error: bad instruction `cmpl r0,r0'
[^:]*:7: Error: selected processor does not support `strh r0,\[r1\]'
[^:]*:8: Warning: writeback of base register is UNPREDICTABLE
[^:]*:9: Warning: writeback of base register when in register list is UNPREDICTABLE
[^:]*:10: Warning: writeback of base register is UNPREDICTABLE
[^:]*:12: Warning: if writeback register is in list, it must be the lowest reg in the list

Line No.	Rev	Author	Line
1	38	julius	`[^:]*: Assembler messages:`
2			[^:]*:4: Error: invalid pseudo operation -- `str r0,=0x00ff0000'
3			[^:]*:5: Error: bad expression -- `ldr r0,{r1}'
4			[^:]*:6: Error: bad instruction `cmpl r0,r0'
5			[^:]*:7: Error: selected processor does not support `strh r0,\[r1\]'
6			`[^:]*:8: Warning: writeback of base register is UNPREDICTABLE`
7			`[^:]*:9: Warning: writeback of base register when in register list is UNPREDICTABLE`
8			`[^:]*:10: Warning: writeback of base register is UNPREDICTABLE`
9			`[^:]*:12: Warning: if writeback register is in list, it must be the lowest reg in the list`

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[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [arm/] [armv1-bad.l] - Blame information for rev 832