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[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [arm/] [neon-cond-bad.l] - Blame information for rev 38

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Line No. Rev Author Line
1 38 julius
[^:]*: Assembler messages:
2
[^:]*:10: Error: instruction cannot be conditional -- `vmoveq q0,q1'
3
[^:]*:11: Error: instruction cannot be conditional -- `vmoveq d0,d1'
4
[^:]*:12: Error: instruction cannot be conditional -- `vmoveq\.i32 q0,#0'
5
[^:]*:13: Error: instruction cannot be conditional -- `vmoveq\.i32 d0,#0'
6
[^:]*:27: Error: instruction cannot be conditional -- `vmuleq\.f32 d0,d1,d2'
7
[^:]*:27: Error: instruction cannot be conditional -- `vmuleq\.f32 q0,q1,q2'
8
[^:]*:28: Error: instruction cannot be conditional -- `vmlaeq\.f32 d0,d1,d2'
9
[^:]*:28: Error: instruction cannot be conditional -- `vmlaeq\.f32 q0,q1,q2'
10
[^:]*:29: Error: instruction cannot be conditional -- `vmlseq\.f32 d0,d1,d2'
11
[^:]*:29: Error: instruction cannot be conditional -- `vmlseq\.f32 q0,q1,q2'
12
[^:]*:30: Error: instruction cannot be conditional -- `vaddeq\.f32 d0,d1,d2'
13
[^:]*:30: Error: instruction cannot be conditional -- `vaddeq\.f32 q0,q1,q2'
14
[^:]*:31: Error: instruction cannot be conditional -- `vsubeq\.f32 d0,d1,d2'
15
[^:]*:31: Error: instruction cannot be conditional -- `vsubeq\.f32 q0,q1,q2'
16
[^:]*:39: Error: instruction cannot be conditional -- `vabseq\.f32 d0,d1'
17
[^:]*:39: Error: instruction cannot be conditional -- `vabseq\.f32 q0,q1'
18
[^:]*:40: Error: instruction cannot be conditional -- `vnegeq\.f32 d0,d1'
19
[^:]*:40: Error: instruction cannot be conditional -- `vnegeq\.f32 q0,q1'
20
[^:]*:48: Error: instruction cannot be conditional -- `vcvteq\.s32\.f32 d0,d1'
21
[^:]*:48: Error: instruction cannot be conditional -- `vcvteq\.s32\.f32 q0,q1'
22
[^:]*:49: Error: instruction cannot be conditional -- `vcvteq\.u32\.f32 d0,d1'
23
[^:]*:49: Error: instruction cannot be conditional -- `vcvteq\.u32\.f32 q0,q1'
24
[^:]*:50: Error: instruction cannot be conditional -- `vcvteq\.f32\.s32 d0,d1'
25
[^:]*:50: Error: instruction cannot be conditional -- `vcvteq\.f32\.s32 q0,q1'
26
[^:]*:51: Error: instruction cannot be conditional -- `vcvteq\.f32\.u32 d0,d1'
27
[^:]*:51: Error: instruction cannot be conditional -- `vcvteq\.f32\.u32 q0,q1'
28
[^:]*:56: Error: instruction cannot be conditional -- `vdupeq\.32 d0,d1\[0\]'
29
[^:]*:57: Error: instruction cannot be conditional -- `vdupeq\.32 q0,d1\[1\]'

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