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[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [d30v/] [opt.s] - Blame information for rev 816

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1 38 julius
# D30V parallel optimization test
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# assemble with "-O"
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        .text
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start:
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        abs     r1,r2
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        abs     r3,r4
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        notfg   f0,f4
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        notfg   f1,f2
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        abs     r1,r2
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        notfg   f1,f2
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# both change C flag
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        add     r1,r2,r3
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        notfg   C,f0
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# one uses and one changes C flag
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        add     r1,r2,r3
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        notfg   f0,C
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        bra     .
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        abs     r1,r2
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        abs     r1,r2
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        bra     .
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        bsr     .
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        abs     r1,r2
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        abs     r1,r2
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        abs     r1,r2
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        bsr     .
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        ldb     r1,@(r2,r3)
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        stb     r7,@(r8,r9)
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        stb     r7,@(r8,r9)
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        ldb     r1,@(r2,r3)
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        ldb     r7,@(r8,r9)
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        ldb     r1,@(r2,r3)
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        stb     r7,@(r8,r9)
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        stb     r1,@(r2,r3)
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        add     r3, r3, r6
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        stw     r2, @(r3, 0)
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# should be serial because of conditional execution
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        cmple   f0,r4,r5
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        jmp/tx  0x0
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        cmple   f0,r4,r5
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        jmp/fx  0x0
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        cmple   f0,r4,r5
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        jmp/xt  0x0
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        cmple   f0,r4,r5
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        jmp/xf  0x0
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        cmple   f0,r4,r5
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        jmp/tt  0x0
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        cmple   f0,r4,r5
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        jmp/tf  0x0
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        cmple   f1,r4,r5
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        jmp/tx  0x0
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        cmple   f1,r4,r5
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        jmp/xt  0x0
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        # serial because of the r4 dependency
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        add     r4, r0, 1
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        cmple   f0, r4, r5
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        # parallel
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        add     r4, r0, 1
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        cmple   f0, r3, r5
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        # serial because ld2w loads r5
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        ld2w    r4,@(r0,r6)
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        adds    r5,r19,r20
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        # serial because ld2w loads r5
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        ld2w    r4,@(r0,r6)
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        adds    r3,r5,r20
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        # parallel even though ld2w uses r6 and adds changes it
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        ld2w    r4,@(r0,r6)
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        adds    r6,r19,r20
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        # parallel
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        ld2w    r4,@(r0,r6)
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        adds    r7,r19,r20
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        # parallel
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        ld2w    r4,@(r0,r6)
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        adds    r7,r0,r20
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        # parallel even though st2w uses r5 and adds modifies it
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        st2w    r4,@(r0,r6)
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        adds    r5,r19,r20
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        # parallel, both use but don't modify r5
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        st2w    r4,@(r0,r6)
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        adds    r3,r5,r20
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        # parallel even though st2w uses r6 and adds changes it
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        st2w    r4,@(r0,r6)
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        adds    r6,r19,r20
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        # parallel
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        st2w    r4,@(r0,r6)
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        adds    r7,r19,r20
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        # parallel
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        st2w    r4,@(r0,r6)
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        adds    r7,r0,r20
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# test memory dependencies
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        # always serial because one could overwrite the other
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        st2w    r10,@(r3,r4)
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        st2w    r40,@(r43,r44)
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        # always serial
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        stw     r1,@(r2,r3)
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        ldw     r41,@(r42,r43)
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        # reads can happen in parallel but the current architecture
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        # doesn't support it
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        ldw     r1,@(r2,r3)
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        ldb     r41,@(r42,r43)
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# test post increment and decrement dependencies
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        # serial
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        ldw     r4,@(r6+,r11)
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        adds    r9,r6,2
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        # parallel, modification to r6 happens last
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        adds    r9,r6,2
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        ldw     r4,@(r6-,r11)
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        # serial
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        stw     r4,@(r6-,r11)
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        adds    r9,r6,2
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        # parallel
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        ldw     r4,@(r6,r11)
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        adds    r9,r6,2
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        # parallel
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        adds    r9,r6,2
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        ldw     r4,@(r6,r11)
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# if the first instruction is a jmp, don't parallelize
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        jmp     0
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        abs     r1,r2
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        jsr     0
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        abs     r1,r2
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        .align  3
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        bra     0
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        abs     r1,r2
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        bsr     0
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        abs     r1,r2
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# Explicitly prohibited from parallel execution.
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# The labels are here to prevent instruction pairs
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#  from being merged with following pairs.
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label1:
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        st2w     r2, @(r2, r3)
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        addhlll  r4, r5, r6
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label2:
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        st4hb    r8, @(r8, r9)
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        subhllh  r10, r11, r12
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label3:
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        ld2w     r14, @(r14, r15)
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        mulhxhl  r16, r17, r18
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label4:
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        ldw      r19, @(r20, r21)
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        mulx2h   r22, r23, r24
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label5:
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        ldh      r25, @(r26, r27)
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        mul2h    r28, r29, r30
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# Insertion of NOPs required to prevent pipeline clashes.
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label6:
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        mul r1,r2,r3
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        mulhxll r4,r5,r6
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        add r7, r8, r9
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label7:
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        mul  r2,r3,r4
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        ldw  r5, @(r6,r0)
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        ldw  r10, @(r11, r0) <- mul r7,r8,r9
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        mul  r12,r13,r14 -> ldw r15, @(r16, r0)
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        mac1 r2,r3,r4
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        ldw  r5, @(r6,r0)
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        ldw  r10, @(r11, r0) <- mac0 r7,r8,r9
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        ldw  r10, @(r11, r0)
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