OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [hppa/] [basic/] [system.s] - Blame information for rev 156

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius
        .level 1.1
2
        .code
3
        .align 4
4
; Basic immediate instruction tests.  
5
;
6
; We could/should test some of the corner cases for register and 
7
; immediate fields.  We should also check the assorted field
8
; selectors to make sure they're handled correctly.
9
        break 5,12
10
        rfi
11
        rfir
12
        ssm 5,%r4
13
        rsm 5,%r4
14
        mtsm %r4
15
        ldsid (%sr0,%r5),%r4
16
        mtsp %r4,%sr0
17
        mtctl %r4,%cr10
18
        mfsp %sr0,%r4
19
        mfctl %cr10,%r4
20
        sync
21
        syncdma
22
        diag 1234
23
 
24
        prober (%sr0,%r5),%r6,%r7
25
        proberi (%sr0,%r5),1,%r7
26
        probew (%sr0,%r5),%r6,%r7
27
        probewi (%sr0,%r5),1,%r7
28
 
29
        lpa %r4(%sr0,%r5),%r6
30
        lpa,m %r4(%sr0,%r5),%r6
31
        lci %r4(%sr0,%r5),%r6
32
 
33
        idtlba %r4,(%sr0,%r5)
34
        iitlba %r4,(%sr4,%r5)
35
        idtlbp %r4,(%sr0,%r5)
36
        iitlbp %r4,(%sr4,%r5)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.