OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [i386/] [x86-64-cbw-intel.d] - Blame information for rev 830

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius
#source: x86-64-cbw.s
2
#objdump: -dwMintel
3
#name: x86-64 CBW/CWD & Co (Intel disassembly)
4
 
5
.*: +file format .*
6
 
7
Disassembly of section .text:
8
 
9
0+000 <_cbw>:
10
   0:   66 98                   cbw
11
   2:   98                      cwde
12
   3:   48 98                   cdqe
13
   5:   66 40 98                rex cbw
14
   8:   40 98                   rex cwde
15
   a:   66                      data16
16
   b:   48 98                   cdqe
17
 
18
0+00d <_cwd>:
19
   d:   66 99                   cwd
20
   f:   99                      cdq
21
  10:   48 99                   cqo
22
  12:   66 40 99                rex cwd
23
  15:   40 99                   rex cdq
24
  17:   66                      data16
25
  18:   48 99                   cqo
26
#pass

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.