OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [ia64/] [nostkreg.d] - Blame information for rev 816

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius
#objdump: -dr
2
#name: ia64 not stacked registers
3
 
4
.*: +file format .*
5
 
6
Disassembly of section \.text:
7
 
8
0+000 <_start>:
9
[[:space:]]*[[:xdigit:]]+:[[:space:][:xdigit:]]+\[M[IM]I\][[:space:]]+mov[[:space:]]+r5=0
10
[[:space:]]+0:[[:space:]]+IMM22[[:space:]]+in00
11
[[:space:]]+1:[[:space:]]+IMM22[[:space:]]+loc96
12
[[:space:]]*[[:xdigit:]]+:[[:space:][:xdigit:]]+mov[[:space:]]+r6=0
13
[[:space:]]*[[:xdigit:]]+:[[:space:][:xdigit:]]+mov[[:space:]]+r7=r32
14
[[:space:]]*[[:xdigit:]]+:[[:space:][:xdigit:]]+\[M[IM]B\][[:space:]]+mov[[:space:]]+r8=r34
15
[[:space:]]*[[:xdigit:]]+:[[:space:][:xdigit:]]+mov[[:space:]]+r9=r36
16
[[:space:]]*[[:xdigit:]]+:[[:space:][:xdigit:]]+br\.ret\.sptk\.few[[:space:]]+(b0|rp);;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.