OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [ia64/] [tls.d] - Blame information for rev 816

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius 
#as: -xnone -mtune=itanium1
2 
#objdump: -dr
3 
#name: ia64 tls
4 
 
5 
.*: +file format .*
6 
 
7 
Disassembly of section \.text:
8 
 
9 
0+000 :
10 
   0:   0d 20 21 0a 80 05       \[MFI\]       alloc r36=ar\.pfs,8,5,0
11 
                        2: LTOFF_TPREL22        x
12 
   6:   00 00 00 02 00 00                   nop\.f 0x0
13 
   c:   04 08 00 90                         addl r32=0,r1;;
14 
  10:   0b 00 01 40 18 10       \[MMI\]       ld8 r32=\[r32\];;
15 
  16:   10 02 35 00 40 00                   add r33=r32,r13
16 
  1c:   00 00 04 00                         nop\.i 0x0;;
17 
  20:   0b 10 00 1a 00 21       \[MMI\]       mov r2=r13;;
18 
                        21: TPREL22     y
19 
  26:   10 02 08 00 48 00                   addl r33=0,r2
20 
  2c:   00 00 04 00                         nop\.i 0x0;;
21 
  30:   01 00 01 02 00 21       \[MII\]       mov r32=r1
22 
                        31: LTOFF_DTPMOD22      z
23 
                        32: LTOFF_DTPREL22      z
24 
  36:   50 02 04 00 48 c0                   addl r37=0,r1
25 
  3c:   04 08 00 90                         addl r38=0,r1;;
26 
  40:   19 28 01 4a 18 10       \[MMB\]       ld8 r37=\[r37\]
27 
                        42: PCREL21B    __tls_get_addr
28 
  46:   60 02 98 30 20 00                   ld8 r38=\[r38\]
29 
  4c:   08 00 00 50                         br\.call\.sptk\.many b0=40 ;;
30 
  50:   0b 08 00 40 00 21       \[MMI\]       mov r1=r32;;
31 
                        51: LTOFF_DTPMOD22      a
32 
                        52: DTPREL22    a
33 
  56:   50 02 04 00 48 c0                   addl r37=0,r1
34 
  5c:   04 00 00 90                         mov r38=0;;
35 
  60:   1d 28 01 4a 18 10       \[MFB\]       ld8 r37=\[r37\]
36 
                        62: PCREL21B    __tls_get_addr
37 
  66:   00 00 00 02 00 00                   nop\.f 0x0
38 
  6c:   08 00 00 50                         br\.call\.sptk\.many b0=60 ;;
39 
  70:   0b 08 00 40 00 21       \[MMI\]       mov r1=r32;;
40 
                        71: LTOFF_DTPMOD22      b
41 
  76:   50 02 04 00 48 c0                   addl r37=0,r1
42 
  7c:   04 00 00 84                         mov r38=r0;;
43 
  80:   1d 28 01 4a 18 10       \[MFB\]       ld8 r37=\[r37\]
44 
                        82: PCREL21B    __tls_get_addr
45 
  86:   00 00 00 02 00 00                   nop\.f 0x0
46 
  8c:   08 00 00 50                         br\.call\.sptk\.many b0=80 ;;
47 
  90:   02 08 00 40 00 21       \[MII\]       mov r1=r32
48 
                        92: DTPREL22    b
49 
  96:   20 00 20 00 42 20                   mov r2=r8;;
50 
  9c:   04 10 00 90                         addl r33=0,r2
51 
  a0:   1d 10 01 04 00 24       \[MFB\]       addl r34=0,r2
52 
                        a0: DTPREL22    c
53 
  a6:   00 00 00 02 00 80                   nop\.f 0x0
54 
  ac:   08 00 84 00                         br\.ret\.sptk\.many b0;;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.