| 1 |
38 |
julius |
#objdump: -dr --prefix-addresses --show-raw-insn -mmips:isa32 -M gpr-names=numeric,cp0-names=mips64r2
|
| 2 |
|
|
#name: MIPS CP0 with sel register disassembly (mips64r2)
|
| 3 |
|
|
#as: -32 -march=mips32
|
| 4 |
|
|
#source: cp0sel-names.s
|
| 5 |
|
|
|
| 6 |
|
|
# Check objdump's handling of -M cp0-names=foo options.
|
| 7 |
|
|
|
| 8 |
|
|
.*: +file format .*mips.*
|
| 9 |
|
|
|
| 10 |
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|
Disassembly of section .text:
|
| 11 |
|
|
0+0000 <[^>]*> 40800001 mtc0 \$0,c0_mvpcontrol
|
| 12 |
|
|
0+0004 <[^>]*> 40800002 mtc0 \$0,c0_mvpconf0
|
| 13 |
|
|
0+0008 <[^>]*> 40800003 mtc0 \$0,c0_mvpconf1
|
| 14 |
|
|
0+000c <[^>]*> 40800004 mtc0 \$0,\$0,4
|
| 15 |
|
|
0+0010 <[^>]*> 40800005 mtc0 \$0,\$0,5
|
| 16 |
|
|
0+0014 <[^>]*> 40800006 mtc0 \$0,\$0,6
|
| 17 |
|
|
0+0018 <[^>]*> 40800007 mtc0 \$0,\$0,7
|
| 18 |
|
|
0+001c <[^>]*> 40800801 mtc0 \$0,c0_vpecontrol
|
| 19 |
|
|
0+0020 <[^>]*> 40800802 mtc0 \$0,c0_vpeconf0
|
| 20 |
|
|
0+0024 <[^>]*> 40800803 mtc0 \$0,c0_vpeconf1
|
| 21 |
|
|
0+0028 <[^>]*> 40800804 mtc0 \$0,c0_yqmask
|
| 22 |
|
|
0+002c <[^>]*> 40800805 mtc0 \$0,c0_vpeschedule
|
| 23 |
|
|
0+0030 <[^>]*> 40800806 mtc0 \$0,c0_vpeschefback
|
| 24 |
|
|
0+0034 <[^>]*> 40800807 mtc0 \$0,\$1,7
|
| 25 |
|
|
0+0038 <[^>]*> 40801001 mtc0 \$0,c0_tcstatus
|
| 26 |
|
|
0+003c <[^>]*> 40801002 mtc0 \$0,c0_tcbind
|
| 27 |
|
|
0+0040 <[^>]*> 40801003 mtc0 \$0,c0_tcrestart
|
| 28 |
|
|
0+0044 <[^>]*> 40801004 mtc0 \$0,c0_tchalt
|
| 29 |
|
|
0+0048 <[^>]*> 40801005 mtc0 \$0,c0_tccontext
|
| 30 |
|
|
0+004c <[^>]*> 40801006 mtc0 \$0,c0_tcschedule
|
| 31 |
|
|
0+0050 <[^>]*> 40801007 mtc0 \$0,c0_tcschefback
|
| 32 |
|
|
0+0054 <[^>]*> 40801801 mtc0 \$0,\$3,1
|
| 33 |
|
|
0+0058 <[^>]*> 40801802 mtc0 \$0,\$3,2
|
| 34 |
|
|
0+005c <[^>]*> 40801803 mtc0 \$0,\$3,3
|
| 35 |
|
|
0+0060 <[^>]*> 40801804 mtc0 \$0,\$3,4
|
| 36 |
|
|
0+0064 <[^>]*> 40801805 mtc0 \$0,\$3,5
|
| 37 |
|
|
0+0068 <[^>]*> 40801806 mtc0 \$0,\$3,6
|
| 38 |
|
|
0+006c <[^>]*> 40801807 mtc0 \$0,\$3,7
|
| 39 |
|
|
0+0070 <[^>]*> 40802001 mtc0 \$0,c0_contextconfig
|
| 40 |
|
|
0+0074 <[^>]*> 40802002 mtc0 \$0,\$4,2
|
| 41 |
|
|
0+0078 <[^>]*> 40802003 mtc0 \$0,\$4,3
|
| 42 |
|
|
0+007c <[^>]*> 40802004 mtc0 \$0,\$4,4
|
| 43 |
|
|
0+0080 <[^>]*> 40802005 mtc0 \$0,\$4,5
|
| 44 |
|
|
0+0084 <[^>]*> 40802006 mtc0 \$0,\$4,6
|
| 45 |
|
|
0+0088 <[^>]*> 40802007 mtc0 \$0,\$4,7
|
| 46 |
|
|
0+008c <[^>]*> 40802801 mtc0 \$0,c0_pagegrain
|
| 47 |
|
|
0+0090 <[^>]*> 40802802 mtc0 \$0,\$5,2
|
| 48 |
|
|
0+0094 <[^>]*> 40802803 mtc0 \$0,\$5,3
|
| 49 |
|
|
0+0098 <[^>]*> 40802804 mtc0 \$0,\$5,4
|
| 50 |
|
|
0+009c <[^>]*> 40802805 mtc0 \$0,\$5,5
|
| 51 |
|
|
0+00a0 <[^>]*> 40802806 mtc0 \$0,\$5,6
|
| 52 |
|
|
0+00a4 <[^>]*> 40802807 mtc0 \$0,\$5,7
|
| 53 |
|
|
0+00a8 <[^>]*> 40803001 mtc0 \$0,c0_srsconf0
|
| 54 |
|
|
0+00ac <[^>]*> 40803002 mtc0 \$0,c0_srsconf1
|
| 55 |
|
|
0+00b0 <[^>]*> 40803003 mtc0 \$0,c0_srsconf2
|
| 56 |
|
|
0+00b4 <[^>]*> 40803004 mtc0 \$0,c0_srsconf3
|
| 57 |
|
|
0+00b8 <[^>]*> 40803005 mtc0 \$0,c0_srsconf4
|
| 58 |
|
|
0+00bc <[^>]*> 40803006 mtc0 \$0,\$6,6
|
| 59 |
|
|
0+00c0 <[^>]*> 40803007 mtc0 \$0,\$6,7
|
| 60 |
|
|
0+00c4 <[^>]*> 40803801 mtc0 \$0,\$7,1
|
| 61 |
|
|
0+00c8 <[^>]*> 40803802 mtc0 \$0,\$7,2
|
| 62 |
|
|
0+00cc <[^>]*> 40803803 mtc0 \$0,\$7,3
|
| 63 |
|
|
0+00d0 <[^>]*> 40803804 mtc0 \$0,\$7,4
|
| 64 |
|
|
0+00d4 <[^>]*> 40803805 mtc0 \$0,\$7,5
|
| 65 |
|
|
0+00d8 <[^>]*> 40803806 mtc0 \$0,\$7,6
|
| 66 |
|
|
0+00dc <[^>]*> 40803807 mtc0 \$0,\$7,7
|
| 67 |
|
|
0+00e0 <[^>]*> 40804001 mtc0 \$0,\$8,1
|
| 68 |
|
|
0+00e4 <[^>]*> 40804002 mtc0 \$0,\$8,2
|
| 69 |
|
|
0+00e8 <[^>]*> 40804003 mtc0 \$0,\$8,3
|
| 70 |
|
|
0+00ec <[^>]*> 40804004 mtc0 \$0,\$8,4
|
| 71 |
|
|
0+00f0 <[^>]*> 40804005 mtc0 \$0,\$8,5
|
| 72 |
|
|
0+00f4 <[^>]*> 40804006 mtc0 \$0,\$8,6
|
| 73 |
|
|
0+00f8 <[^>]*> 40804007 mtc0 \$0,\$8,7
|
| 74 |
|
|
0+00fc <[^>]*> 40804801 mtc0 \$0,\$9,1
|
| 75 |
|
|
0+0100 <[^>]*> 40804802 mtc0 \$0,\$9,2
|
| 76 |
|
|
0+0104 <[^>]*> 40804803 mtc0 \$0,\$9,3
|
| 77 |
|
|
0+0108 <[^>]*> 40804804 mtc0 \$0,\$9,4
|
| 78 |
|
|
0+010c <[^>]*> 40804805 mtc0 \$0,\$9,5
|
| 79 |
|
|
0+0110 <[^>]*> 40804806 mtc0 \$0,\$9,6
|
| 80 |
|
|
0+0114 <[^>]*> 40804807 mtc0 \$0,\$9,7
|
| 81 |
|
|
0+0118 <[^>]*> 40805001 mtc0 \$0,\$10,1
|
| 82 |
|
|
0+011c <[^>]*> 40805002 mtc0 \$0,\$10,2
|
| 83 |
|
|
0+0120 <[^>]*> 40805003 mtc0 \$0,\$10,3
|
| 84 |
|
|
0+0124 <[^>]*> 40805004 mtc0 \$0,\$10,4
|
| 85 |
|
|
0+0128 <[^>]*> 40805005 mtc0 \$0,\$10,5
|
| 86 |
|
|
0+012c <[^>]*> 40805006 mtc0 \$0,\$10,6
|
| 87 |
|
|
0+0130 <[^>]*> 40805007 mtc0 \$0,\$10,7
|
| 88 |
|
|
0+0134 <[^>]*> 40805801 mtc0 \$0,\$11,1
|
| 89 |
|
|
0+0138 <[^>]*> 40805802 mtc0 \$0,\$11,2
|
| 90 |
|
|
0+013c <[^>]*> 40805803 mtc0 \$0,\$11,3
|
| 91 |
|
|
0+0140 <[^>]*> 40805804 mtc0 \$0,\$11,4
|
| 92 |
|
|
0+0144 <[^>]*> 40805805 mtc0 \$0,\$11,5
|
| 93 |
|
|
0+0148 <[^>]*> 40805806 mtc0 \$0,\$11,6
|
| 94 |
|
|
0+014c <[^>]*> 40805807 mtc0 \$0,\$11,7
|
| 95 |
|
|
0+0150 <[^>]*> 40806001 mtc0 \$0,c0_intctl
|
| 96 |
|
|
0+0154 <[^>]*> 40806002 mtc0 \$0,c0_srsctl
|
| 97 |
|
|
0+0158 <[^>]*> 40806003 mtc0 \$0,c0_srsmap
|
| 98 |
|
|
0+015c <[^>]*> 40806004 mtc0 \$0,\$12,4
|
| 99 |
|
|
0+0160 <[^>]*> 40806005 mtc0 \$0,\$12,5
|
| 100 |
|
|
0+0164 <[^>]*> 40806006 mtc0 \$0,\$12,6
|
| 101 |
|
|
0+0168 <[^>]*> 40806007 mtc0 \$0,\$12,7
|
| 102 |
|
|
0+016c <[^>]*> 40806801 mtc0 \$0,\$13,1
|
| 103 |
|
|
0+0170 <[^>]*> 40806802 mtc0 \$0,\$13,2
|
| 104 |
|
|
0+0174 <[^>]*> 40806803 mtc0 \$0,\$13,3
|
| 105 |
|
|
0+0178 <[^>]*> 40806804 mtc0 \$0,\$13,4
|
| 106 |
|
|
0+017c <[^>]*> 40806805 mtc0 \$0,\$13,5
|
| 107 |
|
|
0+0180 <[^>]*> 40806806 mtc0 \$0,\$13,6
|
| 108 |
|
|
0+0184 <[^>]*> 40806807 mtc0 \$0,\$13,7
|
| 109 |
|
|
0+0188 <[^>]*> 40807001 mtc0 \$0,\$14,1
|
| 110 |
|
|
0+018c <[^>]*> 40807002 mtc0 \$0,\$14,2
|
| 111 |
|
|
0+0190 <[^>]*> 40807003 mtc0 \$0,\$14,3
|
| 112 |
|
|
0+0194 <[^>]*> 40807004 mtc0 \$0,\$14,4
|
| 113 |
|
|
0+0198 <[^>]*> 40807005 mtc0 \$0,\$14,5
|
| 114 |
|
|
0+019c <[^>]*> 40807006 mtc0 \$0,\$14,6
|
| 115 |
|
|
0+01a0 <[^>]*> 40807007 mtc0 \$0,\$14,7
|
| 116 |
|
|
0+01a4 <[^>]*> 40807801 mtc0 \$0,c0_ebase
|
| 117 |
|
|
0+01a8 <[^>]*> 40807802 mtc0 \$0,\$15,2
|
| 118 |
|
|
0+01ac <[^>]*> 40807803 mtc0 \$0,\$15,3
|
| 119 |
|
|
0+01b0 <[^>]*> 40807804 mtc0 \$0,\$15,4
|
| 120 |
|
|
0+01b4 <[^>]*> 40807805 mtc0 \$0,\$15,5
|
| 121 |
|
|
0+01b8 <[^>]*> 40807806 mtc0 \$0,\$15,6
|
| 122 |
|
|
0+01bc <[^>]*> 40807807 mtc0 \$0,\$15,7
|
| 123 |
|
|
0+01c0 <[^>]*> 40808001 mtc0 \$0,c0_config1
|
| 124 |
|
|
0+01c4 <[^>]*> 40808002 mtc0 \$0,c0_config2
|
| 125 |
|
|
0+01c8 <[^>]*> 40808003 mtc0 \$0,c0_config3
|
| 126 |
|
|
0+01cc <[^>]*> 40808004 mtc0 \$0,\$16,4
|
| 127 |
|
|
0+01d0 <[^>]*> 40808005 mtc0 \$0,\$16,5
|
| 128 |
|
|
0+01d4 <[^>]*> 40808006 mtc0 \$0,\$16,6
|
| 129 |
|
|
0+01d8 <[^>]*> 40808007 mtc0 \$0,\$16,7
|
| 130 |
|
|
0+01dc <[^>]*> 40808801 mtc0 \$0,\$17,1
|
| 131 |
|
|
0+01e0 <[^>]*> 40808802 mtc0 \$0,\$17,2
|
| 132 |
|
|
0+01e4 <[^>]*> 40808803 mtc0 \$0,\$17,3
|
| 133 |
|
|
0+01e8 <[^>]*> 40808804 mtc0 \$0,\$17,4
|
| 134 |
|
|
0+01ec <[^>]*> 40808805 mtc0 \$0,\$17,5
|
| 135 |
|
|
0+01f0 <[^>]*> 40808806 mtc0 \$0,\$17,6
|
| 136 |
|
|
0+01f4 <[^>]*> 40808807 mtc0 \$0,\$17,7
|
| 137 |
|
|
0+01f8 <[^>]*> 40809001 mtc0 \$0,c0_watchlo,1
|
| 138 |
|
|
0+01fc <[^>]*> 40809002 mtc0 \$0,c0_watchlo,2
|
| 139 |
|
|
0+0200 <[^>]*> 40809003 mtc0 \$0,c0_watchlo,3
|
| 140 |
|
|
0+0204 <[^>]*> 40809004 mtc0 \$0,c0_watchlo,4
|
| 141 |
|
|
0+0208 <[^>]*> 40809005 mtc0 \$0,c0_watchlo,5
|
| 142 |
|
|
0+020c <[^>]*> 40809006 mtc0 \$0,c0_watchlo,6
|
| 143 |
|
|
0+0210 <[^>]*> 40809007 mtc0 \$0,c0_watchlo,7
|
| 144 |
|
|
0+0214 <[^>]*> 40809801 mtc0 \$0,c0_watchhi,1
|
| 145 |
|
|
0+0218 <[^>]*> 40809802 mtc0 \$0,c0_watchhi,2
|
| 146 |
|
|
0+021c <[^>]*> 40809803 mtc0 \$0,c0_watchhi,3
|
| 147 |
|
|
0+0220 <[^>]*> 40809804 mtc0 \$0,c0_watchhi,4
|
| 148 |
|
|
0+0224 <[^>]*> 40809805 mtc0 \$0,c0_watchhi,5
|
| 149 |
|
|
0+0228 <[^>]*> 40809806 mtc0 \$0,c0_watchhi,6
|
| 150 |
|
|
0+022c <[^>]*> 40809807 mtc0 \$0,c0_watchhi,7
|
| 151 |
|
|
0+0230 <[^>]*> 4080a001 mtc0 \$0,\$20,1
|
| 152 |
|
|
0+0234 <[^>]*> 4080a002 mtc0 \$0,\$20,2
|
| 153 |
|
|
0+0238 <[^>]*> 4080a003 mtc0 \$0,\$20,3
|
| 154 |
|
|
0+023c <[^>]*> 4080a004 mtc0 \$0,\$20,4
|
| 155 |
|
|
0+0240 <[^>]*> 4080a005 mtc0 \$0,\$20,5
|
| 156 |
|
|
0+0244 <[^>]*> 4080a006 mtc0 \$0,\$20,6
|
| 157 |
|
|
0+0248 <[^>]*> 4080a007 mtc0 \$0,\$20,7
|
| 158 |
|
|
0+024c <[^>]*> 4080a801 mtc0 \$0,\$21,1
|
| 159 |
|
|
0+0250 <[^>]*> 4080a802 mtc0 \$0,\$21,2
|
| 160 |
|
|
0+0254 <[^>]*> 4080a803 mtc0 \$0,\$21,3
|
| 161 |
|
|
0+0258 <[^>]*> 4080a804 mtc0 \$0,\$21,4
|
| 162 |
|
|
0+025c <[^>]*> 4080a805 mtc0 \$0,\$21,5
|
| 163 |
|
|
0+0260 <[^>]*> 4080a806 mtc0 \$0,\$21,6
|
| 164 |
|
|
0+0264 <[^>]*> 4080a807 mtc0 \$0,\$21,7
|
| 165 |
|
|
0+0268 <[^>]*> 4080b001 mtc0 \$0,\$22,1
|
| 166 |
|
|
0+026c <[^>]*> 4080b002 mtc0 \$0,\$22,2
|
| 167 |
|
|
0+0270 <[^>]*> 4080b003 mtc0 \$0,\$22,3
|
| 168 |
|
|
0+0274 <[^>]*> 4080b004 mtc0 \$0,\$22,4
|
| 169 |
|
|
0+0278 <[^>]*> 4080b005 mtc0 \$0,\$22,5
|
| 170 |
|
|
0+027c <[^>]*> 4080b006 mtc0 \$0,\$22,6
|
| 171 |
|
|
0+0280 <[^>]*> 4080b007 mtc0 \$0,\$22,7
|
| 172 |
|
|
0+0284 <[^>]*> 4080b801 mtc0 \$0,c0_tracecontrol
|
| 173 |
|
|
0+0288 <[^>]*> 4080b802 mtc0 \$0,c0_tracecontrol2
|
| 174 |
|
|
0+028c <[^>]*> 4080b803 mtc0 \$0,c0_usertracedata
|
| 175 |
|
|
0+0290 <[^>]*> 4080b804 mtc0 \$0,c0_tracebpc
|
| 176 |
|
|
0+0294 <[^>]*> 4080b805 mtc0 \$0,\$23,5
|
| 177 |
|
|
0+0298 <[^>]*> 4080b806 mtc0 \$0,\$23,6
|
| 178 |
|
|
0+029c <[^>]*> 4080b807 mtc0 \$0,\$23,7
|
| 179 |
|
|
0+02a0 <[^>]*> 4080c001 mtc0 \$0,\$24,1
|
| 180 |
|
|
0+02a4 <[^>]*> 4080c002 mtc0 \$0,\$24,2
|
| 181 |
|
|
0+02a8 <[^>]*> 4080c003 mtc0 \$0,\$24,3
|
| 182 |
|
|
0+02ac <[^>]*> 4080c004 mtc0 \$0,\$24,4
|
| 183 |
|
|
0+02b0 <[^>]*> 4080c005 mtc0 \$0,\$24,5
|
| 184 |
|
|
0+02b4 <[^>]*> 4080c006 mtc0 \$0,\$24,6
|
| 185 |
|
|
0+02b8 <[^>]*> 4080c007 mtc0 \$0,\$24,7
|
| 186 |
|
|
0+02bc <[^>]*> 4080c801 mtc0 \$0,c0_perfcnt,1
|
| 187 |
|
|
0+02c0 <[^>]*> 4080c802 mtc0 \$0,c0_perfcnt,2
|
| 188 |
|
|
0+02c4 <[^>]*> 4080c803 mtc0 \$0,c0_perfcnt,3
|
| 189 |
|
|
0+02c8 <[^>]*> 4080c804 mtc0 \$0,c0_perfcnt,4
|
| 190 |
|
|
0+02cc <[^>]*> 4080c805 mtc0 \$0,c0_perfcnt,5
|
| 191 |
|
|
0+02d0 <[^>]*> 4080c806 mtc0 \$0,c0_perfcnt,6
|
| 192 |
|
|
0+02d4 <[^>]*> 4080c807 mtc0 \$0,c0_perfcnt,7
|
| 193 |
|
|
0+02d8 <[^>]*> 4080d001 mtc0 \$0,\$26,1
|
| 194 |
|
|
0+02dc <[^>]*> 4080d002 mtc0 \$0,\$26,2
|
| 195 |
|
|
0+02e0 <[^>]*> 4080d003 mtc0 \$0,\$26,3
|
| 196 |
|
|
0+02e4 <[^>]*> 4080d004 mtc0 \$0,\$26,4
|
| 197 |
|
|
0+02e8 <[^>]*> 4080d005 mtc0 \$0,\$26,5
|
| 198 |
|
|
0+02ec <[^>]*> 4080d006 mtc0 \$0,\$26,6
|
| 199 |
|
|
0+02f0 <[^>]*> 4080d007 mtc0 \$0,\$26,7
|
| 200 |
|
|
0+02f4 <[^>]*> 4080d801 mtc0 \$0,c0_cacheerr,1
|
| 201 |
|
|
0+02f8 <[^>]*> 4080d802 mtc0 \$0,c0_cacheerr,2
|
| 202 |
|
|
0+02fc <[^>]*> 4080d803 mtc0 \$0,c0_cacheerr,3
|
| 203 |
|
|
0+0300 <[^>]*> 4080d804 mtc0 \$0,\$27,4
|
| 204 |
|
|
0+0304 <[^>]*> 4080d805 mtc0 \$0,\$27,5
|
| 205 |
|
|
0+0308 <[^>]*> 4080d806 mtc0 \$0,\$27,6
|
| 206 |
|
|
0+030c <[^>]*> 4080d807 mtc0 \$0,\$27,7
|
| 207 |
|
|
0+0310 <[^>]*> 4080e001 mtc0 \$0,c0_datalo
|
| 208 |
|
|
0+0314 <[^>]*> 4080e002 mtc0 \$0,c0_taglo1
|
| 209 |
|
|
0+0318 <[^>]*> 4080e003 mtc0 \$0,c0_datalo1
|
| 210 |
|
|
0+031c <[^>]*> 4080e004 mtc0 \$0,c0_taglo2
|
| 211 |
|
|
0+0320 <[^>]*> 4080e005 mtc0 \$0,c0_datalo2
|
| 212 |
|
|
0+0324 <[^>]*> 4080e006 mtc0 \$0,c0_taglo3
|
| 213 |
|
|
0+0328 <[^>]*> 4080e007 mtc0 \$0,c0_datalo3
|
| 214 |
|
|
0+032c <[^>]*> 4080e801 mtc0 \$0,c0_datahi
|
| 215 |
|
|
0+0330 <[^>]*> 4080e802 mtc0 \$0,c0_taghi1
|
| 216 |
|
|
0+0334 <[^>]*> 4080e803 mtc0 \$0,c0_datahi1
|
| 217 |
|
|
0+0338 <[^>]*> 4080e804 mtc0 \$0,c0_taghi2
|
| 218 |
|
|
0+033c <[^>]*> 4080e805 mtc0 \$0,c0_datahi2
|
| 219 |
|
|
0+0340 <[^>]*> 4080e806 mtc0 \$0,c0_taghi3
|
| 220 |
|
|
0+0344 <[^>]*> 4080e807 mtc0 \$0,c0_datahi3
|
| 221 |
|
|
0+0348 <[^>]*> 4080f001 mtc0 \$0,\$30,1
|
| 222 |
|
|
0+034c <[^>]*> 4080f002 mtc0 \$0,\$30,2
|
| 223 |
|
|
0+0350 <[^>]*> 4080f003 mtc0 \$0,\$30,3
|
| 224 |
|
|
0+0354 <[^>]*> 4080f004 mtc0 \$0,\$30,4
|
| 225 |
|
|
0+0358 <[^>]*> 4080f005 mtc0 \$0,\$30,5
|
| 226 |
|
|
0+035c <[^>]*> 4080f006 mtc0 \$0,\$30,6
|
| 227 |
|
|
0+0360 <[^>]*> 4080f007 mtc0 \$0,\$30,7
|
| 228 |
|
|
0+0364 <[^>]*> 4080f801 mtc0 \$0,\$31,1
|
| 229 |
|
|
0+0368 <[^>]*> 4080f802 mtc0 \$0,\$31,2
|
| 230 |
|
|
0+036c <[^>]*> 4080f803 mtc0 \$0,\$31,3
|
| 231 |
|
|
0+0370 <[^>]*> 4080f804 mtc0 \$0,\$31,4
|
| 232 |
|
|
0+0374 <[^>]*> 4080f805 mtc0 \$0,\$31,5
|
| 233 |
|
|
0+0378 <[^>]*> 4080f806 mtc0 \$0,\$31,6
|
| 234 |
|
|
0+037c <[^>]*> 4080f807 mtc0 \$0,\$31,7
|
| 235 |
|
|
\.\.\.
|
