OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [mips/] [elf-rel7.d] - Blame information for rev 156

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius
#objdump: -dr --prefix-addresses
2
#name: MIPS ELF reloc 7
3
#as: -32
4
 
5
.*: +file format elf.*mips.*
6
 
7
Disassembly of section \.text:
8
0+00 <.*> lui       a0,0x0
9
                        0: R_MIPS_HI16  bar
10
0+04 <.*> lw        a0,0\(a0\)
11
                        4: R_MIPS_LO16  bar
12
0+08 <.*> lui       a0,0x0
13
                        8: R_MIPS_HI16  bar
14
0+0c <.*> lw        a0,4\(a0\)
15
                        c: R_MIPS_LO16  bar
16
0+10 <.*> lui       a0,0x0
17
                        10: R_MIPS_HI16 bar
18
0+14 <.*> lw        a0,8\(a0\)
19
                        14: R_MIPS_LO16 bar
20
0+18 <.*> lui       a0,0x0
21
                        18: R_MIPS_HI16 frob
22
0+1c <.*> lw        a0,0\(a0\)
23
                        1c: R_MIPS_LO16 frob
24
0+20 <.*> lui       a0,0x0
25
                        20: R_MIPS_HI16 frob
26
0+24 <.*> lw        a0,4\(a0\)
27
                        24: R_MIPS_LO16 frob
28
0+28 <.*> lui       a0,0x0
29
                        28: R_MIPS_HI16 frob
30
0+2c <.*> lw        a0,16\(a0\)
31
                        2c: R_MIPS_LO16 frob
32
#pass

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.