OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [mips/] [itbl] - Blame information for rev 38

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius
 
2
    ; Test case for assembler option "itbl".
3
    ; Run as "as --itbl itbl itbl.s"
4
    ; or with stand-alone test case "itbl-test itbl itbl.s".
5
    ; Here, the processors represent mips coprocessors.
6
 
7
    p1 dreg d1 1        ; data register "d1" for COP1 has value 1
8
    p1 creg c3 3        ; ctrl register "c3" for COP1 has value 3
9
    p3 insn fie 0x1e:24-20      ; function "fill" for COP3 has value 31
10
    p3 dreg d3 3        ; data register "d3" for COP3 has value 3
11
    p3 creg c2 22       ; control register "c2" for COP3 has value 22
12
    p3 insn fee 0x1e:24-20,dreg:17-13,creg:12-8,immed:7-0
13
 
14
    p3 dreg d3 3        ; data register "d3" for COP3 has value 3
15
    p3 creg c2 22       ; control register "c2" for COP3 has value 22
16
    p3 insn fum 0x01e00001 dreg:17-13 creg:12-8
17
    p3 insn foh 0xf:24-21 dreg:20-16 immed:15-0
18
 
19
    p3 insn pig 0x1:24-21*[0x100|0x2], dreg:20-16, immed:15-0*0x10000

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.