OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [mips/] [ldstla-eabi64.d] - Blame information for rev 156

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius
#objdump: -dr
2
#as: -mabi=eabi -mips3 -G8 -EB
3
#name: MIPS ld-st-la (EABI64)
4
#source: ldstla-sym32.s
5
 
6
.*file format .*
7
 
8
Disassembly .*:
9
 
10
0+00 <.*>:
11
#
12
# dla constants
13
#
14
.*      li      a0,0xa800
15
.*      dsll32  a0,a0,0x10
16
.*      li      a0,0xa800
17
.*      dsll32  a0,a0,0x10
18
.*      daddu   a0,a0,v1
19
.*      lui     a0,0x8000
20
.*      lui     a0,0x8000
21
.*      daddu   a0,a0,v1
22
.*      lui     a0,0x7fff
23
.*      ori     a0,a0,0x7ff8
24
.*      lui     a0,0x7fff
25
.*      ori     a0,a0,0x7ff8
26
.*      daddu   a0,a0,v1
27
.*      lui     a0,0x7fff
28
.*      ori     a0,a0,0xfff8
29
.*      lui     a0,0x7fff
30
.*      ori     a0,a0,0xfff8
31
.*      daddu   a0,a0,v1
32
.*      lui     a0,0x1234
33
.*      ori     a0,a0,0x5678
34
.*      dsll    a0,a0,0x10
35
.*      ori     a0,a0,0x9abc
36
.*      dsll    a0,a0,0x10
37
.*      ori     a0,a0,0xdef0
38
.*      lui     a0,0x1234
39
.*      ori     a0,a0,0x5678
40
.*      dsll    a0,a0,0x10
41
.*      ori     a0,a0,0x9abc
42
.*      dsll    a0,a0,0x10
43
.*      ori     a0,a0,0xdef0
44
.*      daddu   a0,a0,v1
45
#
46
# dla small_comm
47
#
48
.*      daddiu  a0,gp,0
49
.*: R_MIPS_GPREL16      small_comm
50
.*      daddiu  a0,gp,0
51
.*: R_MIPS_GPREL16      small_comm
52
.*      daddu   a0,a0,v1
53
.*      daddiu  a0,gp,3
54
.*: R_MIPS_GPREL16      small_comm
55
.*      daddiu  a0,gp,3
56
.*: R_MIPS_GPREL16      small_comm
57
.*      daddu   a0,a0,v1
58
#
59
# dla big_comm
60
#
61
.*      lui     a0,0x0
62
.*: R_MIPS_HI16 big_comm
63
.*      d?addiu a0,a0,0
64
.*: R_MIPS_LO16 big_comm
65
.*      lui     a0,0x0
66
.*: R_MIPS_HI16 big_comm
67
.*      d?addiu a0,a0,0
68
.*: R_MIPS_LO16 big_comm
69
.*      daddu   a0,a0,v1
70
.*      lui     a0,0x0
71
.*: R_MIPS_HI16 big_comm
72
.*      d?addiu a0,a0,3
73
.*: R_MIPS_LO16 big_comm
74
.*      lui     a0,0x0
75
.*: R_MIPS_HI16 big_comm
76
.*      d?addiu a0,a0,3
77
.*: R_MIPS_LO16 big_comm
78
.*      daddu   a0,a0,v1
79
#
80
# dla small_data
81
#
82
.*      daddiu  a0,gp,0
83
.*: R_MIPS_GPREL16      small_data
84
.*      daddiu  a0,gp,0
85
.*: R_MIPS_GPREL16      small_data
86
.*      daddu   a0,a0,v1
87
.*      daddiu  a0,gp,3
88
.*: R_MIPS_GPREL16      small_data
89
.*      daddiu  a0,gp,3
90
.*: R_MIPS_GPREL16      small_data
91
.*      daddu   a0,a0,v1
92
#
93
# dla big_data
94
#
95
.*      lui     a0,0x0
96
.*: R_MIPS_HI16 big_data
97
.*      d?addiu a0,a0,0
98
.*: R_MIPS_LO16 big_data
99
.*      lui     a0,0x0
100
.*: R_MIPS_HI16 big_data
101
.*      d?addiu a0,a0,0
102
.*: R_MIPS_LO16 big_data
103
.*      daddu   a0,a0,v1
104
.*      lui     a0,0x0
105
.*: R_MIPS_HI16 big_data
106
.*      d?addiu a0,a0,3
107
.*: R_MIPS_LO16 big_data
108
.*      lui     a0,0x0
109
.*: R_MIPS_HI16 big_data
110
.*      d?addiu a0,a0,3
111
.*: R_MIPS_LO16 big_data
112
.*      daddu   a0,a0,v1
113
#
114
# dla extern
115
#
116
.*      lui     a0,0x0
117
.*: R_MIPS_HI16 extern
118
.*      d?addiu a0,a0,0
119
.*: R_MIPS_LO16 extern
120
.*      lui     a0,0x0
121
.*: R_MIPS_HI16 extern
122
.*      d?addiu a0,a0,0
123
.*: R_MIPS_LO16 extern
124
.*      daddu   a0,a0,v1
125
.*      lui     a0,0x3
126
.*: R_MIPS_HI16 extern
127
.*      d?addiu a0,a0,16384
128
.*: R_MIPS_LO16 extern
129
.*      lui     a0,0x3
130
.*: R_MIPS_HI16 extern
131
.*      d?addiu a0,a0,16384
132
.*: R_MIPS_LO16 extern
133
.*      daddu   a0,a0,v1
134
.*      lui     a0,0xfffd
135
.*: R_MIPS_HI16 extern
136
.*      d?addiu a0,a0,-16384
137
.*: R_MIPS_LO16 extern
138
.*      lui     a0,0xfffd
139
.*: R_MIPS_HI16 extern
140
.*      d?addiu a0,a0,-16384
141
.*: R_MIPS_LO16 extern
142
.*      daddu   a0,a0,v1
143
#
144
# lw constants
145
#
146
.*      li      a0,0xa800
147
.*      dsll32  a0,a0,0x10
148
.*      lw      a0,0\(a0\)
149
.*      li      a0,0xa800
150
.*      dsll32  a0,a0,0x10
151
.*      daddu   a0,a0,v1
152
.*      lw      a0,0\(a0\)
153
.*      lui     a0,0x8000
154
.*      lw      a0,0\(a0\)
155
.*      lui     a0,0x8000
156
.*      daddu   a0,a0,v1
157
.*      lw      a0,0\(a0\)
158
.*      lui     a0,0x7fff
159
.*      lw      a0,32760\(a0\)
160
.*      lui     a0,0x7fff
161
.*      daddu   a0,a0,v1
162
.*      lw      a0,32760\(a0\)
163
.*      li      a0,0x8000
164
.*      dsll    a0,a0,0x10
165
.*      lw      a0,-8\(a0\)
166
.*      li      a0,0x8000
167
.*      dsll    a0,a0,0x10
168
.*      daddu   a0,a0,v1
169
.*      lw      a0,-8\(a0\)
170
.*      lui     a0,0x1234
171
.*      ori     a0,a0,0x5678
172
.*      dsll    a0,a0,0x10
173
.*      ori     a0,a0,0x9abd
174
.*      dsll    a0,a0,0x10
175
.*      lw      a0,-8464\(a0\)
176
.*      lui     a0,0x1234
177
.*      ori     a0,a0,0x5678
178
.*      dsll    a0,a0,0x10
179
.*      ori     a0,a0,0x9abd
180
.*      dsll    a0,a0,0x10
181
.*      daddu   a0,a0,v1
182
.*      lw      a0,-8464\(a0\)
183
#
184
# lw small_comm
185
#
186
.*      lw      a0,0\(gp\)
187
.*: R_MIPS_GPREL16      small_comm
188
.*      daddu   a0,v1,gp
189
.*      lw      a0,0\(a0\)
190
.*: R_MIPS_GPREL16      small_comm
191
.*      lw      a0,3\(gp\)
192
.*: R_MIPS_GPREL16      small_comm
193
.*      daddu   a0,v1,gp
194
.*      lw      a0,3\(a0\)
195
.*: R_MIPS_GPREL16      small_comm
196
#
197
# lw big_comm
198
#
199
.*      lui     a0,0x0
200
.*: R_MIPS_HI16 big_comm
201
.*      lw      a0,0\(a0\)
202
.*: R_MIPS_LO16 big_comm
203
.*      lui     a0,0x0
204
.*: R_MIPS_HI16 big_comm
205
.*      daddu   a0,a0,v1
206
.*      lw      a0,0\(a0\)
207
.*: R_MIPS_LO16 big_comm
208
.*      lui     a0,0x0
209
.*: R_MIPS_HI16 big_comm
210
.*      lw      a0,3\(a0\)
211
.*: R_MIPS_LO16 big_comm
212
.*      lui     a0,0x0
213
.*: R_MIPS_HI16 big_comm
214
.*      daddu   a0,a0,v1
215
.*      lw      a0,3\(a0\)
216
.*: R_MIPS_LO16 big_comm
217
#
218
# lw small_data
219
#
220
.*      lw      a0,0\(gp\)
221
.*: R_MIPS_GPREL16      small_data
222
.*      daddu   a0,v1,gp
223
.*      lw      a0,0\(a0\)
224
.*: R_MIPS_GPREL16      small_data
225
.*      lw      a0,3\(gp\)
226
.*: R_MIPS_GPREL16      small_data
227
.*      daddu   a0,v1,gp
228
.*      lw      a0,3\(a0\)
229
.*: R_MIPS_GPREL16      small_data
230
#
231
# lw big_data
232
#
233
.*      lui     a0,0x0
234
.*: R_MIPS_HI16 big_data
235
.*      lw      a0,0\(a0\)
236
.*: R_MIPS_LO16 big_data
237
.*      lui     a0,0x0
238
.*: R_MIPS_HI16 big_data
239
.*      daddu   a0,a0,v1
240
.*      lw      a0,0\(a0\)
241
.*: R_MIPS_LO16 big_data
242
.*      lui     a0,0x0
243
.*: R_MIPS_HI16 big_data
244
.*      lw      a0,3\(a0\)
245
.*: R_MIPS_LO16 big_data
246
.*      lui     a0,0x0
247
.*: R_MIPS_HI16 big_data
248
.*      daddu   a0,a0,v1
249
.*      lw      a0,3\(a0\)
250
.*: R_MIPS_LO16 big_data
251
#
252
# lw extern
253
#
254
.*      lui     a0,0x0
255
.*: R_MIPS_HI16 extern
256
.*      lw      a0,0\(a0\)
257
.*: R_MIPS_LO16 extern
258
.*      lui     a0,0x0
259
.*: R_MIPS_HI16 extern
260
.*      daddu   a0,a0,v1
261
.*      lw      a0,0\(a0\)
262
.*: R_MIPS_LO16 extern
263
.*      lui     a0,0x3
264
.*: R_MIPS_HI16 extern
265
.*      lw      a0,16384\(a0\)
266
.*: R_MIPS_LO16 extern
267
.*      lui     a0,0x3
268
.*: R_MIPS_HI16 extern
269
.*      daddu   a0,a0,v1
270
.*      lw      a0,16384\(a0\)
271
.*: R_MIPS_LO16 extern
272
.*      lui     a0,0xfffd
273
.*: R_MIPS_HI16 extern
274
.*      lw      a0,-16384\(a0\)
275
.*: R_MIPS_LO16 extern
276
.*      lui     a0,0xfffd
277
.*: R_MIPS_HI16 extern
278
.*      daddu   a0,a0,v1
279
.*      lw      a0,-16384\(a0\)
280
.*: R_MIPS_LO16 extern
281
#
282
# sw constants
283
#
284
.*      li      at,0xa800
285
.*      dsll32  at,at,0x10
286
.*      sw      a0,0\(at\)
287
.*      li      at,0xa800
288
.*      dsll32  at,at,0x10
289
.*      daddu   at,at,v1
290
.*      sw      a0,0\(at\)
291
.*      lui     at,0x8000
292
.*      sw      a0,0\(at\)
293
.*      lui     at,0x8000
294
.*      daddu   at,at,v1
295
.*      sw      a0,0\(at\)
296
.*      lui     at,0x7fff
297
.*      sw      a0,32760\(at\)
298
.*      lui     at,0x7fff
299
.*      daddu   at,at,v1
300
.*      sw      a0,32760\(at\)
301
.*      li      at,0x8000
302
.*      dsll    at,at,0x10
303
.*      sw      a0,-8\(at\)
304
.*      li      at,0x8000
305
.*      dsll    at,at,0x10
306
.*      daddu   at,at,v1
307
.*      sw      a0,-8\(at\)
308
.*      lui     at,0x1234
309
.*      ori     at,at,0x5678
310
.*      dsll    at,at,0x10
311
.*      ori     at,at,0x9abd
312
.*      dsll    at,at,0x10
313
.*      sw      a0,-8464\(at\)
314
.*      lui     at,0x1234
315
.*      ori     at,at,0x5678
316
.*      dsll    at,at,0x10
317
.*      ori     at,at,0x9abd
318
.*      dsll    at,at,0x10
319
.*      daddu   at,at,v1
320
.*      sw      a0,-8464\(at\)
321
#
322
# sw small_comm
323
#
324
.*      sw      a0,0\(gp\)
325
.*: R_MIPS_GPREL16      small_comm
326
.*      daddu   at,v1,gp
327
.*      sw      a0,0\(at\)
328
.*: R_MIPS_GPREL16      small_comm
329
.*      sw      a0,3\(gp\)
330
.*: R_MIPS_GPREL16      small_comm
331
.*      daddu   at,v1,gp
332
.*      sw      a0,3\(at\)
333
.*: R_MIPS_GPREL16      small_comm
334
#
335
# sw big_comm
336
#
337
.*      lui     at,0x0
338
.*: R_MIPS_HI16 big_comm
339
.*      sw      a0,0\(at\)
340
.*: R_MIPS_LO16 big_comm
341
.*      lui     at,0x0
342
.*: R_MIPS_HI16 big_comm
343
.*      daddu   at,at,v1
344
.*      sw      a0,0\(at\)
345
.*: R_MIPS_LO16 big_comm
346
.*      lui     at,0x0
347
.*: R_MIPS_HI16 big_comm
348
.*      sw      a0,3\(at\)
349
.*: R_MIPS_LO16 big_comm
350
.*      lui     at,0x0
351
.*: R_MIPS_HI16 big_comm
352
.*      daddu   at,at,v1
353
.*      sw      a0,3\(at\)
354
.*: R_MIPS_LO16 big_comm
355
#
356
# sw small_data
357
#
358
.*      sw      a0,0\(gp\)
359
.*: R_MIPS_GPREL16      small_data
360
.*      daddu   at,v1,gp
361
.*      sw      a0,0\(at\)
362
.*: R_MIPS_GPREL16      small_data
363
.*      sw      a0,3\(gp\)
364
.*: R_MIPS_GPREL16      small_data
365
.*      daddu   at,v1,gp
366
.*      sw      a0,3\(at\)
367
.*: R_MIPS_GPREL16      small_data
368
#
369
# sw big_data
370
#
371
.*      lui     at,0x0
372
.*: R_MIPS_HI16 big_data
373
.*      sw      a0,0\(at\)
374
.*: R_MIPS_LO16 big_data
375
.*      lui     at,0x0
376
.*: R_MIPS_HI16 big_data
377
.*      daddu   at,at,v1
378
.*      sw      a0,0\(at\)
379
.*: R_MIPS_LO16 big_data
380
.*      lui     at,0x0
381
.*: R_MIPS_HI16 big_data
382
.*      sw      a0,3\(at\)
383
.*: R_MIPS_LO16 big_data
384
.*      lui     at,0x0
385
.*: R_MIPS_HI16 big_data
386
.*      daddu   at,at,v1
387
.*      sw      a0,3\(at\)
388
.*: R_MIPS_LO16 big_data
389
#
390
# sw extern
391
#
392
.*      lui     at,0x0
393
.*: R_MIPS_HI16 extern
394
.*      sw      a0,0\(at\)
395
.*: R_MIPS_LO16 extern
396
.*      lui     at,0x0
397
.*: R_MIPS_HI16 extern
398
.*      daddu   at,at,v1
399
.*      sw      a0,0\(at\)
400
.*: R_MIPS_LO16 extern
401
.*      lui     at,0x3
402
.*: R_MIPS_HI16 extern
403
.*      sw      a0,16384\(at\)
404
.*: R_MIPS_LO16 extern
405
.*      lui     at,0x3
406
.*: R_MIPS_HI16 extern
407
.*      daddu   at,at,v1
408
.*      sw      a0,16384\(at\)
409
.*: R_MIPS_LO16 extern
410
.*      lui     at,0xfffd
411
.*: R_MIPS_HI16 extern
412
.*      sw      a0,-16384\(at\)
413
.*: R_MIPS_LO16 extern
414
.*      lui     at,0xfffd
415
.*: R_MIPS_HI16 extern
416
.*      daddu   at,at,v1
417
.*      sw      a0,-16384\(at\)
418
.*: R_MIPS_LO16 extern
419
#
420
# usw constants
421
#
422
.*      li      at,0xa800
423
.*      dsll32  at,at,0x10
424
.*      swl     a0,0\(at\)
425
.*      swr     a0,3\(at\)
426
.*      li      at,0xa800
427
.*      dsll32  at,at,0x10
428
.*      daddu   at,at,v1
429
.*      swl     a0,0\(at\)
430
.*      swr     a0,3\(at\)
431
.*      lui     at,0x8000
432
.*      swl     a0,0\(at\)
433
.*      swr     a0,3\(at\)
434
.*      lui     at,0x8000
435
.*      daddu   at,at,v1
436
.*      swl     a0,0\(at\)
437
.*      swr     a0,3\(at\)
438
.*      lui     at,0x7fff
439
.*      ori     at,at,0x7ff8
440
.*      swl     a0,0\(at\)
441
.*      swr     a0,3\(at\)
442
.*      lui     at,0x7fff
443
.*      ori     at,at,0x7ff8
444
.*      daddu   at,at,v1
445
.*      swl     a0,0\(at\)
446
.*      swr     a0,3\(at\)
447
.*      lui     at,0x7fff
448
.*      ori     at,at,0xfff8
449
.*      swl     a0,0\(at\)
450
.*      swr     a0,3\(at\)
451
.*      lui     at,0x7fff
452
.*      ori     at,at,0xfff8
453
.*      daddu   at,at,v1
454
.*      swl     a0,0\(at\)
455
.*      swr     a0,3\(at\)
456
.*      lui     at,0x1234
457
.*      ori     at,at,0x5678
458
.*      dsll    at,at,0x10
459
.*      ori     at,at,0x9abc
460
.*      dsll    at,at,0x10
461
.*      ori     at,at,0xdef0
462
.*      swl     a0,0\(at\)
463
.*      swr     a0,3\(at\)
464
.*      lui     at,0x1234
465
.*      ori     at,at,0x5678
466
.*      dsll    at,at,0x10
467
.*      ori     at,at,0x9abc
468
.*      dsll    at,at,0x10
469
.*      ori     at,at,0xdef0
470
.*      daddu   at,at,v1
471
.*      swl     a0,0\(at\)
472
.*      swr     a0,3\(at\)
473
#
474
# usw small_comm
475
#
476
.*      daddiu  at,gp,0
477
.*: R_MIPS_GPREL16      small_comm
478
.*      swl     a0,0\(at\)
479
.*      swr     a0,3\(at\)
480
.*      daddiu  at,gp,0
481
.*: R_MIPS_GPREL16      small_comm
482
.*      daddu   at,at,v1
483
.*      swl     a0,0\(at\)
484
.*      swr     a0,3\(at\)
485
.*      daddiu  at,gp,3
486
.*: R_MIPS_GPREL16      small_comm
487
.*      swl     a0,0\(at\)
488
.*      swr     a0,3\(at\)
489
.*      daddiu  at,gp,3
490
.*: R_MIPS_GPREL16      small_comm
491
.*      daddu   at,at,v1
492
.*      swl     a0,0\(at\)
493
.*      swr     a0,3\(at\)
494
#
495
# usw big_comm
496
#
497
.*      lui     at,0x0
498
.*: R_MIPS_HI16 big_comm
499
.*      d?addiu at,at,0
500
.*: R_MIPS_LO16 big_comm
501
.*      swl     a0,0\(at\)
502
.*      swr     a0,3\(at\)
503
.*      lui     at,0x0
504
.*: R_MIPS_HI16 big_comm
505
.*      d?addiu at,at,0
506
.*: R_MIPS_LO16 big_comm
507
.*      daddu   at,at,v1
508
.*      swl     a0,0\(at\)
509
.*      swr     a0,3\(at\)
510
.*      lui     at,0x0
511
.*: R_MIPS_HI16 big_comm
512
.*      d?addiu at,at,3
513
.*: R_MIPS_LO16 big_comm
514
.*      swl     a0,0\(at\)
515
.*      swr     a0,3\(at\)
516
.*      lui     at,0x0
517
.*: R_MIPS_HI16 big_comm
518
.*      d?addiu at,at,3
519
.*: R_MIPS_LO16 big_comm
520
.*      daddu   at,at,v1
521
.*      swl     a0,0\(at\)
522
.*      swr     a0,3\(at\)
523
#
524
# usw small_data
525
#
526
.*      daddiu  at,gp,0
527
.*: R_MIPS_GPREL16      small_data
528
.*      swl     a0,0\(at\)
529
.*      swr     a0,3\(at\)
530
.*      daddiu  at,gp,0
531
.*: R_MIPS_GPREL16      small_data
532
.*      daddu   at,at,v1
533
.*      swl     a0,0\(at\)
534
.*      swr     a0,3\(at\)
535
.*      daddiu  at,gp,3
536
.*: R_MIPS_GPREL16      small_data
537
.*      swl     a0,0\(at\)
538
.*      swr     a0,3\(at\)
539
.*      daddiu  at,gp,3
540
.*: R_MIPS_GPREL16      small_data
541
.*      daddu   at,at,v1
542
.*      swl     a0,0\(at\)
543
.*      swr     a0,3\(at\)
544
#
545
# usw big_data
546
#
547
.*      lui     at,0x0
548
.*: R_MIPS_HI16 big_data
549
.*      d?addiu at,at,0
550
.*: R_MIPS_LO16 big_data
551
.*      swl     a0,0\(at\)
552
.*      swr     a0,3\(at\)
553
.*      lui     at,0x0
554
.*: R_MIPS_HI16 big_data
555
.*      d?addiu at,at,0
556
.*: R_MIPS_LO16 big_data
557
.*      daddu   at,at,v1
558
.*      swl     a0,0\(at\)
559
.*      swr     a0,3\(at\)
560
.*      lui     at,0x0
561
.*: R_MIPS_HI16 big_data
562
.*      d?addiu at,at,3
563
.*: R_MIPS_LO16 big_data
564
.*      swl     a0,0\(at\)
565
.*      swr     a0,3\(at\)
566
.*      lui     at,0x0
567
.*: R_MIPS_HI16 big_data
568
.*      d?addiu at,at,3
569
.*: R_MIPS_LO16 big_data
570
.*      daddu   at,at,v1
571
.*      swl     a0,0\(at\)
572
.*      swr     a0,3\(at\)
573
#
574
# usw extern
575
#
576
.*      lui     at,0x0
577
.*: R_MIPS_HI16 extern
578
.*      d?addiu at,at,0
579
.*: R_MIPS_LO16 extern
580
.*      swl     a0,0\(at\)
581
.*      swr     a0,3\(at\)
582
.*      lui     at,0x0
583
.*: R_MIPS_HI16 extern
584
.*      d?addiu at,at,0
585
.*: R_MIPS_LO16 extern
586
.*      daddu   at,at,v1
587
.*      swl     a0,0\(at\)
588
.*      swr     a0,3\(at\)
589
.*      lui     at,0x3
590
.*: R_MIPS_HI16 extern
591
.*      d?addiu at,at,16384
592
.*: R_MIPS_LO16 extern
593
.*      swl     a0,0\(at\)
594
.*      swr     a0,3\(at\)
595
.*      lui     at,0x3
596
.*: R_MIPS_HI16 extern
597
.*      d?addiu at,at,16384
598
.*: R_MIPS_LO16 extern
599
.*      daddu   at,at,v1
600
.*      swl     a0,0\(at\)
601
.*      swr     a0,3\(at\)
602
.*      lui     at,0xfffd
603
.*: R_MIPS_HI16 extern
604
.*      d?addiu at,at,-16384
605
.*: R_MIPS_LO16 extern
606
.*      swl     a0,0\(at\)
607
.*      swr     a0,3\(at\)
608
.*      lui     at,0xfffd
609
.*: R_MIPS_HI16 extern
610
.*      d?addiu at,at,-16384
611
.*: R_MIPS_LO16 extern
612
.*      daddu   at,at,v1
613
.*      swl     a0,0\(at\)
614
.*      swr     a0,3\(at\)
615
#
616
# with sym32 off (has no effect for EABI64)
617
#
618
.*      lui     a0,0x0
619
.*: R_MIPS_HI16 extern
620
.*      daddiu  a0,a0,0
621
.*: R_MIPS_LO16 extern
622
.*      lui     a0,0x0
623
.*: R_MIPS_HI16 extern
624
.*      lw      a0,0\(a0\)
625
.*: R_MIPS_LO16 extern
626
.*      lui     at,0x0
627
.*: R_MIPS_HI16 extern
628
.*      sw      a0,0\(at\)
629
.*: R_MIPS_LO16 extern
630
.*      lui     at,0x0
631
.*: R_MIPS_HI16 extern
632
.*      daddiu  at,at,0
633
.*: R_MIPS_LO16 extern
634
.*      swl     a0,0\(at\)
635
.*      swr     a0,3\(at\)
636
#
637
# ...and back on again
638
#
639
.*      lui     a0,0x0
640
.*: R_MIPS_HI16 extern
641
.*      daddiu  a0,a0,0
642
.*: R_MIPS_LO16 extern
643
.*      lui     a0,0x0
644
.*: R_MIPS_HI16 extern
645
.*      lw      a0,0\(a0\)
646
.*: R_MIPS_LO16 extern
647
.*      lui     at,0x0
648
.*: R_MIPS_HI16 extern
649
.*      sw      a0,0\(at\)
650
.*: R_MIPS_LO16 extern
651
.*      lui     at,0x0
652
.*: R_MIPS_HI16 extern
653
.*      daddiu  at,at,0
654
.*: R_MIPS_LO16 extern
655
.*      swl     a0,0\(at\)
656
.*      swr     a0,3\(at\)
657
#pass

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.