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[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [mips/] [mips32.s] - Blame information for rev 816

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1 38 julius
# source file to test assembly of mips32 instructions
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        .set noreorder
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      .set noat
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      .text
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text_label:
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      # unprivileged CPU instructions
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      clo     $1, $2
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      clz     $3, $4
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      madd    $5, $6
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      maddu   $7, $8
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      msub    $9, $10
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      msubu   $11, $12
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      mul     $13, $14, $15
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      pref    4, ($16)
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      pref    4, 32767($17)
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      pref    4, -32768($18)
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      ssnop
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      # unprivileged coprocessor instructions.
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      # these tests use cp2 to avoid other (cp0, fpu, prefetch) opcodes.
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      bc2f    text_label
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      nop
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      bc2fl   text_label
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      nop
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      bc2t    text_label
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      nop
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      bc2tl   text_label
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      nop
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      # XXX other BCzCond encodings not currently expressable
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      cfc2    $1, $2
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      cop2    0x1234567               # disassembles as c2 ...
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      ctc2    $2, $3
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      mfc2    $3, $4
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      mfc2    $4, $5, 0               # disassembles without sel
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      mfc2    $5, $6, 7
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      mtc2    $6, $7
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      mtc2    $7, $8, 0               # disassembles without sel
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      mtc2    $8, $9, 7
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      # privileged instructions
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      cache   5, ($1)
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      cache   5, 32767($2)
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      cache   5, -32768($3)
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      .set at
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      cache   5, 32768($4)
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      cache   5, -32769($5)
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      cache   5, 32768
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      cache   5, -32769
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      .set noat
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      eret
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      tlbp
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      tlbr
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      tlbwi
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      tlbwr
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      wait
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      wait    0                       # disassembles without code
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      wait    0x56789
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      # For a while break for the mips32 ISA interpreted a single argument
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      # as a 20-bit code, placing it in the opcode differently to
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      # traditional ISAs.  This turned out to cause problems, so it has
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      # been removed.  This test is to assure consistent interpretation.
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      break
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      break   0                       # disassembles without code
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      break   0x345
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      break   0x48,0x345              # this still specifies a 20-bit code
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      # Instructions in previous ISAs or CPUs which are now slightly
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      # different.
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      sdbbp
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      sdbbp   0                       # disassembles without code
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      sdbbp   0x56789
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      # Cop2 branches with cond code number, like bc1t/f
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      bc2f    $cc0,text_label
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      nop
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      bc2fl   $cc1,text_label
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      nop
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      bc2t    $cc6,text_label
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      nop
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      bc2tl   $cc7,text_label
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      nop
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# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
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      .space  8

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