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[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [mips/] [mips32r2.s] - Blame information for rev 856

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Line No. Rev Author Line
1 38 julius
# source file to test assembly of mips32r2 *non-fp* instructions
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        .set noreorder
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        .set noat
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        .text
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text_label:
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      # unprivileged CPU instructions
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        ehb
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        ext     $4, $5, 6, 8
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        ins     $4, $5, 6, 8
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        jalr.hb $8
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        jalr.hb $20, $9
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        jr.hb   $8
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        # Note, further testing of rdhwr is done in hwr-names-mips32r2.d
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        rdhwr   $10, $0
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        rdhwr   $11, $1
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        rdhwr   $12, $2
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        rdhwr   $13, $3
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        rdhwr   $14, $4
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        rdhwr   $15, $5
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        # This file checks that in fact HW rotate will
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        # be used for this arch, and checks assembly
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        # of the official MIPS mnemonics.  (Note that disassembly
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        # uses the traditional "ror" and "rorv" mnemonics.)
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        # Additional rotate tests are done by rol-hw.d.
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        rotl    $25, $10, 4
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        rotr    $25, $10, 4
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        rotl    $25, $10, $4
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        rotr    $25, $10, $4
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        rotrv   $25, $10, $4
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        seb     $7
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        seb     $8, $10
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        seh     $7
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        seh     $8, $10
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        synci   0x5555($10)
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        wsbh    $7
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        wsbh    $8, $10
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      # cp0 instructions
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        di
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        di      $0
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        di      $10
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        ei
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        ei      $0
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        ei      $10
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        rdpgpr  $10, $25
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        wrpgpr  $10, $25
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      # cp2 instructions
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        mfhc2   $17, 0x5555
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        mthc2   $17, 0x5555
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# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
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        .space  8

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