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[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [mips/] [relax-swap1-mips1.d] - Blame information for rev 830

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1 38 julius
#objdump: -dr --prefix-addresses -mmips:3000
2
#name: MIPS1 branch relaxation with swapping
3
#as: -32 -mips1 -KPIC -relax-branch
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#source: relax-swap1.s
5
#stderr: relax-swap1.l
6
 
7
.*: +file format .*mips.*
8
 
9
Disassembly of section \.text:
10
0+0000 <[^>]*> b    00000000 
11
0+0004 <[^>]*> move v0,a0
12
0+0008 <[^>]*> lw   at,2\(gp\)
13
[       ]*8: R_MIPS_GOT16       \.text
14
0+000c <[^>]*> nop
15
0+0010 <[^>]*> addiu        at,at,992
16
[       ]*10: R_MIPS_LO16       \.text
17
0+0014 <[^>]*> jr   at
18
0+0018 <[^>]*> move v0,a0
19
0+001c <[^>]*> lw   v0,0\(a0\)
20
0+0020 <[^>]*> b    00000000 
21
0+0024 <[^>]*> nop
22
0+0028 <[^>]*> lw   v0,0\(a0\)
23
0+002c <[^>]*> lw   at,2\(gp\)
24
[       ]*2c: R_MIPS_GOT16      \.text
25
0+0030 <[^>]*> nop
26
0+0034 <[^>]*> addiu        at,at,992
27
[       ]*34: R_MIPS_LO16       \.text
28
0+0038 <[^>]*> jr   at
29
0+003c <[^>]*> nop
30
0+0040 <[^>]*> b    00000000 
31
0+0044 <[^>]*> sw   v0,0\(a0\)
32
0+0048 <[^>]*> lw   at,2\(gp\)
33
[       ]*48: R_MIPS_GOT16      \.text
34
0+004c <[^>]*> nop
35
0+0050 <[^>]*> addiu        at,at,992
36
[       ]*50: R_MIPS_LO16       \.text
37
0+0054 <[^>]*> jr   at
38
0+0058 <[^>]*> sw   v0,0\(a0\)
39
0+005c <[^>]*> move v0,a0
40
0+0060 <[^>]*> beq  v0,v1,00000000 
41
0+0064 <[^>]*> nop
42
0+0068 <[^>]*> move v0,a0
43
0+006c <[^>]*> bne  v0,v1,00000084 
44
0+0070 <[^>]*> nop
45
0+0074 <[^>]*> lw   at,2\(gp\)
46
[       ]*74: R_MIPS_GOT16      \.text
47
0+0078 <[^>]*> nop
48
0+007c <[^>]*> addiu        at,at,992
49
[       ]*7c: R_MIPS_LO16       \.text
50
0+0080 <[^>]*> jr   at
51
0+0084 <[^>]*> nop
52
0+0088 <[^>]*> beq  a0,a1,00000000 
53
0+008c <[^>]*> move v0,a0
54
0+0090 <[^>]*> bne  a0,a1,000000a8 
55
0+0094 <[^>]*> nop
56
0+0098 <[^>]*> lw   at,2\(gp\)
57
[       ]*98: R_MIPS_GOT16      \.text
58
0+009c <[^>]*> nop
59
0+00a0 <[^>]*> addiu        at,at,992
60
[       ]*a0: R_MIPS_LO16       \.text
61
0+00a4 <[^>]*> jr   at
62
0+00a8 <[^>]*> move v0,a0
63
0+00ac <[^>]*> addiu        v0,a0,1
64
0+00b0 <[^>]*> beq  v0,v1,00000000 
65
0+00b4 <[^>]*> nop
66
0+00b8 <[^>]*> addiu        v0,a0,1
67
0+00bc <[^>]*> bne  v0,v1,000000d4 
68
0+00c0 <[^>]*> nop
69
0+00c4 <[^>]*> lw   at,2\(gp\)
70
[       ]*c4: R_MIPS_GOT16      \.text
71
0+00c8 <[^>]*> nop
72
0+00cc <[^>]*> addiu        at,at,992
73
[       ]*cc: R_MIPS_LO16       \.text
74
0+00d0 <[^>]*> jr   at
75
0+00d4 <[^>]*> nop
76
0+00d8 <[^>]*> beq  a0,a1,00000000 
77
0+00dc <[^>]*> addiu        v0,a0,1
78
0+00e0 <[^>]*> bne  a0,a1,000000f8 
79
0+00e4 <[^>]*> nop
80
0+00e8 <[^>]*> lw   at,2\(gp\)
81
[       ]*e8: R_MIPS_GOT16      \.text
82
0+00ec <[^>]*> nop
83
0+00f0 <[^>]*> addiu        at,at,992
84
[       ]*f0: R_MIPS_LO16       \.text
85
0+00f4 <[^>]*> jr   at
86
0+00f8 <[^>]*> addiu        v0,a0,1
87
0+00fc <[^>]*> lw   v0,0\(a0\)
88
0+0100 <[^>]*> nop
89
0+0104 <[^>]*> beq  v0,v1,00000000 
90
0+0108 <[^>]*> nop
91
0+010c <[^>]*> lw   v0,0\(a0\)
92
0+0110 <[^>]*> nop
93
0+0114 <[^>]*> bne  v0,v1,0000012c 
94
0+0118 <[^>]*> nop
95
0+011c <[^>]*> lw   at,2\(gp\)
96
[       ]*11c: R_MIPS_GOT16     \.text
97
0+0120 <[^>]*> nop
98
0+0124 <[^>]*> addiu        at,at,992
99
[       ]*124: R_MIPS_LO16      \.text
100
0+0128 <[^>]*> jr   at
101
0+012c <[^>]*> nop
102
0+0130 <[^>]*> lw   v0,0\(a0\)
103
0+0134 <[^>]*> beq  a0,a1,00000000 
104
0+0138 <[^>]*> nop
105
0+013c <[^>]*> lw   v0,0\(a0\)
106
0+0140 <[^>]*> bne  a0,a1,00000158 
107
0+0144 <[^>]*> nop
108
0+0148 <[^>]*> lw   at,2\(gp\)
109
[       ]*148: R_MIPS_GOT16     \.text
110
0+014c <[^>]*> nop
111
0+0150 <[^>]*> addiu        at,at,992
112
[       ]*150: R_MIPS_LO16      \.text
113
0+0154 <[^>]*> jr   at
114
0+0158 <[^>]*> nop
115
0+015c <[^>]*> beq  v0,v1,00000000 
116
0+0160 <[^>]*> sw   v0,0\(a0\)
117
0+0164 <[^>]*> bne  v0,v1,0000017c 
118
0+0168 <[^>]*> nop
119
0+016c <[^>]*> lw   at,2\(gp\)
120
[       ]*16c: R_MIPS_GOT16     \.text
121
0+0170 <[^>]*> nop
122
0+0174 <[^>]*> addiu        at,at,992
123
[       ]*174: R_MIPS_LO16      \.text
124
0+0178 <[^>]*> jr   at
125
0+017c <[^>]*> sw   v0,0\(a0\)
126
0+0180 <[^>]*> beq  a0,a1,00000000 
127
0+0184 <[^>]*> sw   v0,0\(a0\)
128
0+0188 <[^>]*> bne  a0,a1,000001a0 
129
0+018c <[^>]*> nop
130
0+0190 <[^>]*> lw   at,2\(gp\)
131
[       ]*190: R_MIPS_GOT16     \.text
132
0+0194 <[^>]*> nop
133
0+0198 <[^>]*> addiu        at,at,992
134
[       ]*198: R_MIPS_LO16      \.text
135
0+019c <[^>]*> jr   at
136
0+01a0 <[^>]*> sw   v0,0\(a0\)
137
0+01a4 <[^>]*> mfc1 v0,\$f0
138
0+01a8 <[^>]*> move a2,a3
139
0+01ac <[^>]*> beq  v0,v1,00000000 
140
0+01b0 <[^>]*> nop
141
0+01b4 <[^>]*> mfc1 v0,\$f0
142
0+01b8 <[^>]*> move a2,a3
143
0+01bc <[^>]*> bne  v0,v1,000001d4 
144
0+01c0 <[^>]*> nop
145
0+01c4 <[^>]*> lw   at,2\(gp\)
146
[       ]*1c4: R_MIPS_GOT16     \.text
147
0+01c8 <[^>]*> nop
148
0+01cc <[^>]*> addiu        at,at,992
149
[       ]*1cc: R_MIPS_LO16      \.text
150
0+01d0 <[^>]*> jr   at
151
0+01d4 <[^>]*> nop
152
0+01d8 <[^>]*> mfc1 v0,\$f0
153
0+01dc <[^>]*> beq  a0,a1,00000000 
154
0+01e0 <[^>]*> move a2,a3
155
0+01e4 <[^>]*> mfc1 v0,\$f0
156
0+01e8 <[^>]*> bne  a0,a1,00000200 
157
0+01ec <[^>]*> nop
158
0+01f0 <[^>]*> lw   at,2\(gp\)
159
[       ]*1f0: R_MIPS_GOT16     \.text
160
0+01f4 <[^>]*> nop
161
0+01f8 <[^>]*> addiu        at,at,992
162
[       ]*1f8: R_MIPS_LO16      \.text
163
0+01fc <[^>]*> jr   at
164
0+0200 <[^>]*> move a2,a3
165
0+0204 <[^>]*> bc1t 00000000 
166
0+0208 <[^>]*> move v0,a0
167
0+020c <[^>]*> bc1f 00000224 
168
0+0210 <[^>]*> nop
169
0+0214 <[^>]*> lw   at,2\(gp\)
170
[       ]*214: R_MIPS_GOT16     \.text
171
0+0218 <[^>]*> nop
172
0+021c <[^>]*> addiu        at,at,992
173
[       ]*21c: R_MIPS_LO16      \.text
174
0+0220 <[^>]*> jr   at
175
0+0224 <[^>]*> move v0,a0
176
0+0228 <[^>]*> move v0,a0
177
0+022c <[^>]*> b    00000000 
178
0+0230 <[^>]*> nop
179
0+0234 <[^>]*> move v0,a0
180
0+0238 <[^>]*> lw   at,2\(gp\)
181
[       ]*238: R_MIPS_GOT16     \.text
182
0+023c <[^>]*> nop
183
0+0240 <[^>]*> addiu        at,at,992
184
[       ]*240: R_MIPS_LO16      \.text
185
0+0244 <[^>]*> jr   at
186
0+0248 <[^>]*> nop
187
0+024c <[^>]*> move v0,a0
188
0+0250 <[^>]*> b    00000000 
189
0+0254 <[^>]*> nop
190
0+0258 <[^>]*> move v0,a0
191
0+025c <[^>]*> lw   at,2\(gp\)
192
[       ]*25c: R_MIPS_GOT16     \.text
193
0+0260 <[^>]*> nop
194
0+0264 <[^>]*> addiu        at,at,992
195
[       ]*264: R_MIPS_LO16      \.text
196
0+0268 <[^>]*> jr   at
197
0+026c <[^>]*> nop
198
0+0270 <[^>]*> move a2,a3
199
0+0274 <[^>]*> move v0,a0
200
0+0278 <[^>]*> b    00000000 
201
0+027c <[^>]*> nop
202
0+0280 <[^>]*> move a2,a3
203
0+0284 <[^>]*> move v0,a0
204
0+0288 <[^>]*> lw   at,2\(gp\)
205
[       ]*288: R_MIPS_GOT16     \.text
206
0+028c <[^>]*> nop
207
0+0290 <[^>]*> addiu        at,at,992
208
[       ]*290: R_MIPS_LO16      \.text
209
0+0294 <[^>]*> jr   at
210
0+0298 <[^>]*> nop
211
0+029c <[^>]*> lw   at,0\(gp\)
212
[       ]*29c: R_MIPS_GOT16     \.text
213
0+02a0 <[^>]*> nop
214
0+02a4 <[^>]*> addiu        at,at,684
215
[       ]*2a4: R_MIPS_LO16      \.text
216
0+02a8 <[^>]*> sw   v0,0\(at\)
217
0+02ac <[^>]*> b    00000000 
218
0+02b0 <[^>]*> nop
219
0+02b4 <[^>]*> lw   at,0\(gp\)
220
[       ]*2b4: R_MIPS_GOT16     \.text
221
0+02b8 <[^>]*> nop
222
0+02bc <[^>]*> addiu        at,at,708
223
[       ]*2bc: R_MIPS_LO16      \.text
224
0+02c0 <[^>]*> sw   v0,0\(at\)
225
0+02c4 <[^>]*> lw   at,2\(gp\)
226
[       ]*2c4: R_MIPS_GOT16     \.text
227
0+02c8 <[^>]*> nop
228
0+02cc <[^>]*> addiu        at,at,992
229
[       ]*2cc: R_MIPS_LO16      \.text
230
0+02d0 <[^>]*> jr   at
231
0+02d4 <[^>]*> nop
232
0+02d8 <[^>]*> lwc1 \$f0,0\(a0\)
233
0+02dc <[^>]*> b    00000000 
234
0+02e0 <[^>]*> nop
235
0+02e4 <[^>]*> lwc1 \$f0,0\(a0\)
236
0+02e8 <[^>]*> lw   at,2\(gp\)
237
[       ]*2e8: R_MIPS_GOT16     \.text
238
0+02ec <[^>]*> nop
239
0+02f0 <[^>]*> addiu        at,at,992
240
[       ]*2f0: R_MIPS_LO16      \.text
241
0+02f4 <[^>]*> jr   at
242
0+02f8 <[^>]*> nop
243
0+02fc <[^>]*> cfc1 v0,\$31
244
0+0300 <[^>]*> b    00000000 
245
0+0304 <[^>]*> nop
246
0+0308 <[^>]*> cfc1 v0,\$31
247
0+030c <[^>]*> lw   at,2\(gp\)
248
[       ]*30c: R_MIPS_GOT16     \.text
249
0+0310 <[^>]*> nop
250
0+0314 <[^>]*> addiu        at,at,992
251
[       ]*314: R_MIPS_LO16      \.text
252
0+0318 <[^>]*> jr   at
253
0+031c <[^>]*> nop
254
0+0320 <[^>]*> ctc1 v0,\$31
255
0+0324 <[^>]*> b    00000000 
256
0+0328 <[^>]*> nop
257
0+032c <[^>]*> ctc1 v0,\$31
258
0+0330 <[^>]*> lw   at,2\(gp\)
259
[       ]*330: R_MIPS_GOT16     \.text
260
0+0334 <[^>]*> nop
261
0+0338 <[^>]*> addiu        at,at,992
262
[       ]*338: R_MIPS_LO16      \.text
263
0+033c <[^>]*> jr   at
264
0+0340 <[^>]*> nop
265
0+0344 <[^>]*> mtc1 v0,\$f31
266
0+0348 <[^>]*> b    00000000 
267
0+034c <[^>]*> nop
268
0+0350 <[^>]*> mtc1 v0,\$f31
269
0+0354 <[^>]*> lw   at,2\(gp\)
270
[       ]*354: R_MIPS_GOT16     \.text
271
0+0358 <[^>]*> nop
272
0+035c <[^>]*> addiu        at,at,992
273
[       ]*35c: R_MIPS_LO16      \.text
274
0+0360 <[^>]*> jr   at
275
0+0364 <[^>]*> nop
276
0+0368 <[^>]*> mfhi v0
277
0+036c <[^>]*> b    00000000 
278
0+0370 <[^>]*> nop
279
0+0374 <[^>]*> mfhi v0
280
0+0378 <[^>]*> lw   at,2\(gp\)
281
[       ]*378: R_MIPS_GOT16     \.text
282
0+037c <[^>]*> nop
283
0+0380 <[^>]*> addiu        at,at,992
284
[       ]*380: R_MIPS_LO16      \.text
285
0+0384 <[^>]*> jr   at
286
0+0388 <[^>]*> nop
287
0+038c <[^>]*> move v0,a0
288
0+0390 <[^>]*> jr   v0
289
0+0394 <[^>]*> nop
290
0+0398 <[^>]*> jr   a0
291
0+039c <[^>]*> move v0,a0
292
0+03a0 <[^>]*> move v0,a0
293
0+03a4 <[^>]*> jalr v0
294
0+03a8 <[^>]*> nop
295
0+03ac <[^>]*> jalr a0
296
0+03b0 <[^>]*> move v0,a0
297
0+03b4 <[^>]*> move v0,ra
298
0+03b8 <[^>]*> jalr v1
299
0+03bc <[^>]*> nop
300
0+03c0 <[^>]*> move ra,a0
301
0+03c4 <[^>]*> jalr a1
302
0+03c8 <[^>]*> nop
303
0+03cc <[^>]*> jalr v0,v1
304
0+03d0 <[^>]*> move ra,a0
305
0+03d4 <[^>]*> move v0,ra
306
0+03d8 <[^>]*> jalr v0,v1
307
0+03dc <[^>]*> nop
308
        \.\.\.
309
        \.\.\.

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