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[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [mips/] [vr4130.s] - Blame information for rev 816

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1 38 julius
        .macro  check2 insn
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        mflo    $2
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        \insn   $3,$3
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        .endm
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        .macro  check3 insn
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        mfhi    $2
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        \insn   $0,$3,$3
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        .endm
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        .macro  main func
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        .ent    \func
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        .type   \func,@function
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\func:
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        # PART A
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        #
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        # Check that mfhis and mflos in .set noreorder blocks are not
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        # considered.
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        .set    noreorder
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        mfhi    $2
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        .set    reorder
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        mult    $3,$3
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        .set    noreorder
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        mflo    $2
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        .set    reorder
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        mult    $3,$3
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        # PART B
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        #
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        # Check for simple instances.
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        mfhi    $2
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        mult    $3,$3   # 4 nops
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        mfhi    $2
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        addiu   $3,1
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        mult    $4,$4   # 3 nops
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        mfhi    $2
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        addiu   $3,1
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        addiu   $4,1
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        mult    $5,$5   # 2 nops
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        mfhi    $2
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        addiu   $3,1
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        addiu   $4,1
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        addiu   $5,1
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        mult    $6,$6   # 1 nop
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        mfhi    $2
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        addiu   $3,1
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        addiu   $4,1
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        addiu   $5,1
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        addiu   $6,1
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        mult    $7,$7   # 0 nops
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        # PART C
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        #
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        # Check that no nops are inserted after the result has been read.
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        mfhi    $2
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        addiu   $2,1
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        addiu   $3,1
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        addiu   $4,1
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        mult    $5,$5
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        mfhi    $2
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        addiu   $3,1
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        addiu   $2,1
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        addiu   $4,1
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        mult    $5,$5
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        mfhi    $2
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        addiu   $3,1
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        addiu   $4,1
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        addiu   $2,1
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        mult    $5,$5
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        mfhi    $2
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        addiu   $3,1
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        addiu   $4,1
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        addiu   $5,1
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        mult    $2,$2
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        # PART D
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        #
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        # Check that we still insert the usual interlocking nops in cases
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        # where the VR4130 errata doesn't apply.
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        mfhi    $2
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        mult    $2,$2   # 2 nops
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        mfhi    $2
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        addiu   $2,1
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        mult    $3,$3   # 1 nop
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        mfhi    $2
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        addiu   $3,1
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        mult    $2,$2   # 1 nop
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        # PART E
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        #
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        # Check for branches whose targets might be affected.
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        mfhi    $2
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        bnez    $3,1f   # 2 nops for normal mode, 3 for mips16
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        mfhi    $2
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        addiu   $3,1
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        bnez    $3,1f   # 1 nop for normal mode, 2 for mips16
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        mfhi    $2
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        addiu   $3,1
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        addiu   $3,1
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        bnez    $3,1f   # 0 nops for normal mode, 1 for mips16
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        mfhi    $2
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        addiu   $3,1
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        addiu   $3,1
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        addiu   $3,1
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        bnez    $3,1f   # 0 nops
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        # PART F
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        #
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        # As above, but with no dependencies between the branch and
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        # the previous instruction.  The final branch can use the
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        # preceding addiu as its delay slot.
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        mfhi    $2
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        addiu   $3,1
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        bnez    $4,1f   # 1 nop for normal mode, 2 for mips16
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        mfhi    $2
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        addiu   $3,1
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        addiu   $4,1
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        bnez    $5,1f   # 0 nops for normal mode, 1 for mips16
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        mfhi    $2
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        addiu   $3,1
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        addiu   $4,1
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        addiu   $5,1
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        bnez    $6,1f   # 0 nops, fill delay slot in normal mode
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1:
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        # PART G
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        #
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        # Like part B, but check that intervening .set noreorders don't
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        # affect the number of nops.
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        mfhi    $2
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        .set    noreorder
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        addiu   $3,1
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        .set    reorder
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        mult    $4,$4   # 3 nops
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        mfhi    $2
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        .set    noreorder
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        addiu   $3,1
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        .set    reorder
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        addiu   $4,1
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        mult    $5,$5   # 2 nops
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        mfhi    $2
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        addiu   $3,1
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        .set    noreorder
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        addiu   $4,1
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        .set    reorder
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        mult    $5,$5   # 2 nops
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        mfhi    $2
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        .set    noreorder
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        addiu   $3,1
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        addiu   $4,1
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        .set    reorder
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        mult    $5,$5   # 2 nops
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        mfhi    $2
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        addiu   $3,1
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        .set    noreorder
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        addiu   $4,1
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        .set    reorder
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        addiu   $5,1
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        mult    $6,$6   # 1 nop
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        mfhi    $2
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        .set    noreorder
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        addiu   $3,1
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        addiu   $4,1
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        addiu   $5,1
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        .set    reorder
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        mult    $6,$6   # 1 nop
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        mfhi    $2
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        .set    noreorder
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        addiu   $3,1
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        addiu   $4,1
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        addiu   $5,1
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        addiu   $6,1
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        .set    reorder
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        mult    $7,$7   # 0 nops
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        # PART H
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        #
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        # Like part B, but the mult occurs in a .set noreorder block.
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        mfhi    $2
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        .set    noreorder
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        mult    $3,$3   # 4 nops
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        .set    reorder
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        mfhi    $2
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        .set    noreorder
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        addiu   $3,1
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        mult    $4,$4   # 3 nops
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        .set    reorder
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        mfhi    $2
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        addiu   $3,1
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        .set    noreorder
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        addiu   $4,1
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        mult    $5,$5   # 2 nops
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        .set    reorder
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        mfhi    $2
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        .set    noreorder
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        addiu   $3,1
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        addiu   $4,1
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        addiu   $5,1
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        mult    $6,$6   # 1 nop
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        .set    reorder
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        mfhi    $2
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        .set    noreorder
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        addiu   $3,1
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        addiu   $4,1
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        addiu   $5,1
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        addiu   $6,1
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        mult    $7,$7   # 0 nops
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        .set    reorder
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        # PART I
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        #
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        # Check every affected multiplication and division instruction.
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249
        check2  mult
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        check2  multu
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        check2  dmult
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        check2  dmultu
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254
        check3  div
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        check3  divu
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        check3  ddiv
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        check3  ddivu
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259
        .end    \func
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        .endm
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        .set    nomips16
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        main    foo
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        # PART J
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        #
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        # Check every affected multiply-accumulate instruction.
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269
        check3  macc
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        check3  macchi
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        check3  macchis
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        check3  macchiu
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        check3  macchius
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        check3  maccs
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        check3  maccu
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        check3  maccus
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        check3  dmacc
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        check3  dmacchi
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        check3  dmacchis
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        check3  dmacchiu
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        check3  dmacchius
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        check3  dmaccs
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        check3  dmaccu
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        check3  dmaccus
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        # PART K
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        #
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        # Check that mtlo and mthi are exempt from the VR4130 errata,
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        # although the usual interlocking delay applies.
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        mflo    $2
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        mtlo    $3
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        mflo    $2
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        mthi    $3
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        mfhi    $2
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        mtlo    $3
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        mfhi    $2
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        mthi    $3
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        .set    mips16
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        main    bar

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