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[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [ppc/] [altivec_and_spe.d] - Blame information for rev 832

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#as: -maltivec -mspe -mppc64
#objdump: -d -Mppc64
#name: Check that ISA extensions can be specified before CPU selection
 
.*: +file format elf.*-powerpc.*
 
Disassembly of section \.text:
 
0+00 <.*>:
   0:   7e 00 06 6c     dssall
   4:   7d 00 83 a6     mtspr   512,r8
   8:   4c 00 00 24     rfid

Line No.	Rev	Author	Line
1	38	julius	`#as: -maltivec -mspe -mppc64`
2			`#objdump: -d -Mppc64`
3			`#name: Check that ISA extensions can be specified before CPU selection`
4
5			`.: +file format elf.-powerpc.*`
6
7			`Disassembly of section \.text:`
8
9			`0+00 <.*>:`
10			`0: 7e 00 06 6c dssall`
11			`4: 7d 00 83 a6 mtspr 512,r8`
12			`8: 4c 00 00 24 rfid`

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[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [ppc/] [altivec_and_spe.d] - Blame information for rev 832