OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [ppc/] [cell.d] - Blame information for rev 38

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius 
#as: -mcell
2 
#objdump: -dr -Mcell
3 
#name: Cell tests
4 
 
5 
 
6 
.*: +file format elf(32)?(64)?-powerpc.*
7 
 
8 
 
9 
Disassembly of section \.text:
10 
 
11 
0000000000000000 <.text>:
12 
   0:   7c 01 14 0e     lvlx    v0,r1,r2
13 
   4:   7c 00 14 0e     lvlx    v0,0,r2
14 
   8:   7c 01 16 0e     lvlxl   v0,r1,r2
15 
   c:   7c 00 16 0e     lvlxl   v0,0,r2
16 
  10:   7c 01 14 4e     lvrx    v0,r1,r2
17 
  14:   7c 00 14 4e     lvrx    v0,0,r2
18 
  18:   7c 01 16 4e     lvrxl   v0,r1,r2
19 
  1c:   7c 00 16 4e     lvrxl   v0,0,r2
20 
  20:   7c 01 15 0e     stvlx   v0,r1,r2
21 
  24:   7c 00 15 0e     stvlx   v0,0,r2
22 
  28:   7c 01 17 0e     stvlxl  v0,r1,r2
23 
  2c:   7c 00 17 0e     stvlxl  v0,0,r2
24 
  30:   7c 01 15 4e     stvrx   v0,r1,r2
25 
  34:   7c 00 15 4e     stvrx   v0,0,r2
26 
  38:   7c 01 17 4e     stvrxl  v0,r1,r2
27 
  3c:   7c 00 17 4e     stvrxl  v0,0,r2
28 
  40:   7c 00 0c 28     ldbrx   r0,0,r1
29 
  44:   7c 01 14 28     ldbrx   r0,r1,r2
30 
  48:   7c 00 0d 28     stdbrx  r0,0,r1
31 
  4c:   7c 01 15 28     stdbrx  r0,r1,r2

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.