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[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [score/] [rD_rA_BN.s] - Blame information for rev 816

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Line No. Rev Author Line
1 38 julius
/*
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 * test relax
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 * bitclr.c <-> bitclr! : register number must be in 0-15
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 * bitset.c <-> bitset! : register number must be in 0-15
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 * bittgl.c <-> bittgl! : register number must be in 0-15
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 * slli.c <-> slli!     : register number must be in 0-15
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 * srli.c <-> srli!     : register number must be in 0-15
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 * Author: ligang
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 */
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/* This macro transform 32b instruction to 16b. */
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.macro tran3216 insn32, insn16
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.align 4
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  \insn32 r0, r0, 2          #32b -> 16b
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  \insn16 r0, 2
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  \insn32 r15, r15, 4        #32b -> 16b
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  \insn16 r15, 4
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  \insn32 r15, r15, 1        #32b -> 16b
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  \insn16 r15, 1
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  \insn16 r15, 3
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  \insn32 r15, r15, 3        #32b -> 16b
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  \insn32 r8, r8, 3          #32b -> 16b
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  \insn32 r8, r8, 3          #32b -> 16b
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  \insn32 r15, r15, 1        #No transform
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  \insn32 r26, r23, 4
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.endm
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/* This macro transform 16b instruction to 32b. */
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.macro tran1632 insn32, insn16
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.align 4
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  \insn16 r0, 2         #16b -> 32b
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  \insn32 r20, r21, 2
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  \insn16 r15, 4        #16b -> 32b
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  \insn32 r25, r21, 4
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  \insn16 r15, 1        #16b -> 32b
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  \insn32 r25, r22, 1
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  \insn16 r8, 3         #No transform
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  \insn16 r8, 3         #No transform
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  \insn16 r6, 4         #No transform
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  \insn32 r6, r6, 4     #32b -> 16b
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  \insn32 r9, r9, 2     #32b -> 16b
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  \insn16 r9, 2         #No transform
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.endm
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.text
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  tran3216 "bitclr.c", "bitclr!"
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  tran3216 "bitset.c", "bitset!"
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  tran3216 "bittgl.c", "bittgl!"
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  tran3216 "slli.c", "slli!"
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  tran3216 "srli.c", "srli!"
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  tran1632 "bitclr.c", "bitclr!"
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  tran1632 "bitset.c", "bitset!"
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  tran1632 "bittgl.c", "bittgl!"
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  tran1632 "slli.c", "slli!"
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  tran1632 "srli.c", "srli!"
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