| 1 |
38 |
julius |
;;
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;; test all addressing modes and register constraints
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;; (types/classes is read from include/opcodes/tic4x.h)
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;;
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.text
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start:
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;;
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;; Type B - infix condition branch
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| 10 |
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;;
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Type_BI:bu Type_BI ; Unconditional branch (00000)
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| 12 |
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bc Type_BI ; Carry branch (00001)
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| 13 |
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blo Type_BI ; Lower than branch (00001)
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bls Type_BI ; Lower than or same branch (00010)
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bhi Type_BI ; Higher than branch (00011)
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bhs Type_BI ; Higher than or same branch (00100)
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bnc Type_BI ; No carry branch (00100)
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| 18 |
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beq Type_BI ; Equal to branch (00101)
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bz Type_BI ; Zero branch (00101)
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bne Type_BI ; Not equal to branch (00110)
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| 21 |
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bnz Type_BI ; Not zero branch (00110)
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| 22 |
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blt Type_BI ; Less than branch (00111)
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bn Type_BI ; Negative branch (00111)
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ble Type_BI ; Less than or equal to branch (01000)
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bgt Type_BI ; Greater than branch (01001)
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bp Type_BI ; Positive branch (01001)
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bge Type_BI ; Greater than or equal branch (01010)
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bnn Type_BI ; Nonnegative branch (01010)
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bnv Type_BI ; No overflow branch (01000)
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| 30 |
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bv Type_BI ; Overflow branch (01101)
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bnuf Type_BI ; No underflow branch (01110)
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buf Type_BI ; Underflow branch (01111)
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bnlv Type_BI ; No latched overflow branch (10000)
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blv Type_BI ; Latched overflow branch (10001)
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bnluf Type_BI ; No latched FP underflow branch (10010)
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bluf Type_BI ; Latched FP underflow branch (10011)
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bzuf Type_BI ; Zero or FP underflow branch (10100)
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b Type_BI ; Unconditional branch (00000)
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;;
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;; Type C - infix condition load
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;;
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Type_CI:ldiu R0,R0 ; Unconditional load (00000)
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ldic R0,R0 ; Carry load (00001)
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ldilo R0,R0 ; Lower than load (00001)
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ldils R0,R0 ; Lower than or same load (00010)
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ldihi R0,R0 ; Higher than load (00011)
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| 48 |
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ldihs R0,R0 ; Higher than or same load (00100)
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ldinc R0,R0 ; No carry load (00100)
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ldieq R0,R0 ; Equal to load (00101)
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ldiz R0,R0 ; Zero load (00101)
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ldine R0,R0 ; Not equal to load (00110)
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ldinz R0,R0 ; Not zero load (00110)
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ldil R0,R0 ; Less than load (00111)
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ldin R0,R0 ; Negative load (00111)
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ldile R0,R0 ; Less than or equal to load (01000)
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ldigt R0,R0 ; Greater than load (01001)
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ldip R0,R0 ; Positive load (01001)
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ldige R0,R0 ; Greater than or equal load (01010)
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ldinn R0,R0 ; Nonnegative load (01010)
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ldinv R0,R0 ; No overflow load (01000)
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ldiv R0,R0 ; Overflow load (01101)
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ldinuf R0,R0 ; No underflow load (01110)
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ldiuf R0,R0 ; Underflow load (01111)
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ldinlv R0,R0 ; No latched overflow load (10000)
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ldilv R0,R0 ; Latched overflow load (10001)
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ldinluf R0,R0 ; No latched FP underflow load (10010)
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ldiluf R0,R0 ; Latched FP underflow load (10011)
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ldizuf R0,R0 ; Zero or FP underflow load (10100)
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;;
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;; Type * - Indirect (full)
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;;
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Type_ind:
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ldi *AR0,R0 ; Indirect addressing (G=10)
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ldi *+AR0(5),R0 ; with predisplacement add
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ldi *-AR0(5),R0 ; with predisplacement subtract
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ldi *++AR0(5),R0 ; with predisplacement add and modify
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ldi *--AR0(5),R0 ; with predisplacement subtract and modify
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ldi *AR0++(5),R0 ; with postdisplacement add and modify
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ldi *AR0--(5),R0 ; with postdisplacement subtract and modify
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ldi *AR0++(5)%,R0 ; with postdisplacement add and circular modify
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| 83 |
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ldi *AR0--(5)%,R0 ; with postdisplacement subtract and circular modify
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ldi *+AR0(IR0),R0 ; with predisplacement add
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| 85 |
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ldi *-AR0(IR0),R0 ; with predisplacement subtract
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ldi *++AR0(IR0),R0 ; with predisplacement add and modify
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ldi *--AR0(IR0),R0 ; with predisplacement subtract and modify
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ldi *AR0++(IR0),R0 ; with postdisplacement add and modify
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| 89 |
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ldi *AR0--(IR0),R0 ; with postdisplacement subtract and modify
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| 90 |
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ldi *AR0++(IR0)%,R0 ; with postdisplacement add and circular modify
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| 91 |
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ldi *AR0--(IR0)%,R0 ; with postdisplacement subtract and circular modify
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| 92 |
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ldi *AR0++(IR0)B,R0 ; with postincrement add and bit-reversed modify
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ldi *AR0++,R0 ; Same as *AR0++(1)
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| 95 |
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;;
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;; Type # - Direct for ldp
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;;
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Type_ldp:
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ldp 12
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ldp @start
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ldp start
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;;
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;; Type @ - Direct
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;;
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Type_dir:
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ldi @start,R0
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ldi start,R0
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ldi @16,R0
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| 110 |
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ldi @65535,R0
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| 112 |
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;;
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;; Type A - Address register
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| 114 |
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;;
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Type_A: dbc AR0,R0
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dbc AR2,R0
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dbc AR7,R0
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| 119 |
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;;
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| 120 |
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;; Type B - Unsigned integer (PC)
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| 121 |
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;;
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| 122 |
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Type_B: br start
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br 0x809800
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| 124 |
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| 125 |
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;;
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| 126 |
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;; Type C - Indirect
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| 127 |
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;;
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| 128 |
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.ifdef TEST_C4X
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Type_C: addc3 *+AR0(5),R0,R0
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.endif
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| 131 |
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| 132 |
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;;
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| 133 |
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;; Type E - Register (all)
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| 134 |
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;;
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Type_E: andn3 R0,R0,R0
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| 136 |
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andn3 AR0,R0,R0
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addc3 DP,R0,R0
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| 138 |
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andn3 R7,R0,R0
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| 139 |
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| 140 |
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;;
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| 141 |
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;; Type e - Register (0-11)
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| 142 |
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;;
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Type_ee:subf3 R7,R0,R0
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addf3 R0,R0,R0
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addf3 R7,R0,R0
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cmpf3 R7,R0
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.ifdef TEST_C4X
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addf3 R11,R0,R0
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.endif
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| 150 |
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| 151 |
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;;
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;; Type F - Short float immediate
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;;
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Type_F: ldf 0,R0
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ldf 3.5,R0
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ldf -3.5,R0
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ldf 0e-3.5e-1,R0
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| 159 |
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;;
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| 160 |
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;; Type G - Register (all)
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;;
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Type_G: andn3 R0,AR0,R0
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addc3 R0,DP,R0
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addc3 R0,R0,R0
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andn3 R0,R7,R0
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;;
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| 168 |
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;; Type g - Register (0-11)
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;;
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Type_gg:subf3 R0,R7,R0
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addf3 R0,R0,R0
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addf3 R0,R7,R0
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cmpf3 R0,R7
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.ifdef TEST_C4X
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addf3 R0,R11,R0
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.endif
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| 177 |
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| 178 |
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;;
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| 179 |
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;; Type H - Register (0-7)
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| 180 |
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;;
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| 181 |
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Type_H: stf R0,*AR0 &|| stf R0,*AR0
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| 182 |
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stf R0,*AR0 &|| stf R2,*AR0
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| 183 |
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stf R0,*AR0 &|| stf R7,*AR0
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| 184 |
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| 185 |
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;;
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| 186 |
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;; Type I - Indirect
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| 187 |
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;;
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| 188 |
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Type_I: addf3 *AR0,R0,R0 ; Indirect addressing (G=10)
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| 189 |
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addf3 *+AR0(1),R0,R0 ; with predisplacement add
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| 190 |
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addf3 *-AR0(1),R0,R0 ; with predisplacement subtract
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| 191 |
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addf3 *++AR0(1),R0,R0 ; with predisplacement add and modify
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| 192 |
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addf3 *--AR0(1),R0,R0 ; with predisplacement subtract and modify
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| 193 |
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addf3 *AR0++(1),R0,R0 ; with postdisplacement add and modify
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| 194 |
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addf3 *AR0--(1),R0,R0 ; with postdisplacement subtract and modify
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| 195 |
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addf3 *AR0++(1)%,R0,R0; with postdisplacement add and circular modify
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| 196 |
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addf3 *AR0--(1)%,R0,R0; with postdisplacement subtract and circular modify
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| 197 |
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addf3 *+AR0(IR0),R0,R0; with predisplacement add
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| 198 |
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addf3 *-AR0(IR0),R0,R0; with predisplacement subtract
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| 199 |
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addf3 *++AR0(IR0),R0,R0; with predisplacement add and modify
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| 200 |
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addf3 *--AR0(IR0),R0,R0; with predisplacement subtract and modify
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| 201 |
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addf3 *AR0++(IR0),R0,R0; with postdisplacement add and modify
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| 202 |
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addf3 *AR0--(IR0),R0,R0; with postdisplacement subtract and modify
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| 203 |
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addf3 *AR0++(IR0)%,R0,R0; with postdisplacement add and circular modify
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| 204 |
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addf3 *AR0--(IR0)%,R0,R0; with postdisplacement subtract and circular modify
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| 205 |
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addf3 *AR0++(IR0)B,R0,R0; with postincrement add and bit-reversed modify
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| 206 |
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addf3 *AR0++,R0,R0 ; Same as *AR0++(1)
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| 207 |
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| 208 |
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;;
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| 209 |
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;; Type J - Indirect
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| 210 |
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;;
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| 211 |
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Type_J: addf3 R0,*AR0,R0 ; Indirect addressing (G=10)
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| 212 |
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addf3 R0,*+AR0(1),R0 ; with predisplacement add
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| 213 |
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addf3 R0,*-AR0(1),R0 ; with predisplacement subtract
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| 214 |
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addf3 R0,*++AR0(1),R0 ; with predisplacement add and modify
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| 215 |
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addf3 R0,*--AR0(1),R0 ; with predisplacement subtract and modify
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| 216 |
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addf3 R0,*AR0++(1),R0 ; with postdisplacement add and modify
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| 217 |
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addf3 R0,*AR0--(1),R0 ; with postdisplacement subtract and modify
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| 218 |
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addf3 R0,*AR0++(1)%,R0; with postdisplacement add and circular modify
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| 219 |
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addf3 R0,*AR0--(1)%,R0; with postdisplacement subtract and circular modify
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| 220 |
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addf3 R0,*+AR0(IR0),R0; with predisplacement add
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| 221 |
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addf3 R0,*-AR0(IR0),R0; with predisplacement subtract
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| 222 |
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addf3 R0,*++AR0(IR0),R0; with predisplacement add and modify
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| 223 |
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addf3 R0,*--AR0(IR0),R0; with predisplacement subtract and modify
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| 224 |
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addf3 R0,*AR0++(IR0),R0; with postdisplacement add and modify
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| 225 |
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addf3 R0,*AR0--(IR0),R0; with postdisplacement subtract and modify
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| 226 |
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addf3 R0,*AR0++(IR0)%,R0; with postdisplacement add and circular modify
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| 227 |
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addf3 R0,*AR0--(IR0)%,R0; with postdisplacement subtract and circular modify
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| 228 |
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addf3 R0,*AR0++(IR0)B,R0; with postincrement add and bit-reversed modify
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| 229 |
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addf3 R0,*AR0++,R0 ; Same as *AR0++(1)
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| 230 |
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| 231 |
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;;
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| 232 |
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;; Type K - Register (0-7)
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| 233 |
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;;
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| 234 |
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Type_K: ldf *AR0,R0 &|| ldf *AR0,R1
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| 235 |
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ldf *AR0,R0 &|| ldf *AR0,R2
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| 236 |
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ldf *AR0,R0 &|| ldf *AR0,R7
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| 237 |
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| 238 |
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;;
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| 239 |
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;; Type L - Register (0-7)
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| 240 |
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;;
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| 241 |
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Type_L: stf R0,*AR0 &|| stf R0,*AR0
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| 242 |
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stf R2,*AR0 &|| stf R0,*AR0
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| 243 |
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stf R7,*AR0 &|| stf R0,*AR0
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| 244 |
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| 245 |
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;;
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| 246 |
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;; Type M - Register (2-3)
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| 247 |
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;;
|
| 248 |
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Type_M: mpyf3 *AR0,*AR0,R0 &|| addf3 R0,R0,R2
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| 249 |
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mpyf3 *AR0,*AR0,R0 &|| addf3 R0,R0,R3
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| 250 |
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| 251 |
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;;
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| 252 |
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;; Type N - Register (0-1)
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| 253 |
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;;
|
| 254 |
|
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Type_N: mpyf3 *AR0,*AR0,R0 &|| addf3 R0,R0,R2
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| 255 |
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mpyf3 *AR0,*AR0,R1 &|| addf3 R0,R0,R2
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| 256 |
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| 257 |
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;;
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| 258 |
|
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;; Type O - Indirect
|
| 259 |
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;;
|
| 260 |
|
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.ifdef TEST_C4X
|
| 261 |
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Type_O: addc3 *+AR0(5),*+AR0(5),R0
|
| 262 |
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.endif
|
| 263 |
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| 264 |
|
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;;
|
| 265 |
|
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;; Type P - Displacement (PC rel)
|
| 266 |
|
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;;
|
| 267 |
|
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Type_P: callc start
|
| 268 |
|
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callc 1
|
| 269 |
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|
| 270 |
|
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;;
|
| 271 |
|
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;; Type Q - Register (all)
|
| 272 |
|
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;;
|
| 273 |
|
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Type_Q: ldi R0,R0
|
| 274 |
|
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ldi AR0,R0
|
| 275 |
|
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ldi DP,R0
|
| 276 |
|
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ldi SP,R0
|
| 277 |
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|
| 278 |
|
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;;
|
| 279 |
|
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;; Type q - Register (0-11)
|
| 280 |
|
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;;
|
| 281 |
|
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Type_qq:fix R0,R0
|
| 282 |
|
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fix R7,R0
|
| 283 |
|
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.ifdef TEST_C4X
|
| 284 |
|
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fix R11,R0
|
| 285 |
|
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absf R11,R0
|
| 286 |
|
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.endif
|
| 287 |
|
|
|
| 288 |
|
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;;
|
| 289 |
|
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;; Type R - Register (all)
|
| 290 |
|
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;;
|
| 291 |
|
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Type_R: ldi R0,R0
|
| 292 |
|
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ldi R0,AR0
|
| 293 |
|
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ldi R0,DP
|
| 294 |
|
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ldi R0,SP
|
| 295 |
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|
| 296 |
|
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;;
|
| 297 |
|
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;; Type r - Register (0-11)
|
| 298 |
|
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;;
|
| 299 |
|
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Type_rr:ldf R0,R0
|
| 300 |
|
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ldf R0,R7
|
| 301 |
|
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.ifdef TEST_C4X
|
| 302 |
|
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ldf R0,R11
|
| 303 |
|
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.endif
|
| 304 |
|
|
|
| 305 |
|
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;;
|
| 306 |
|
|
;; Type S - Signed immediate
|
| 307 |
|
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;;
|
| 308 |
|
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Type_S: ldi 0,R0
|
| 309 |
|
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ldi -123,R0
|
| 310 |
|
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ldi 6543,R0
|
| 311 |
|
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ldi -32768, R0
|
| 312 |
|
|
|
| 313 |
|
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;;
|
| 314 |
|
|
;; Type T - Integer
|
| 315 |
|
|
;;
|
| 316 |
|
|
.ifdef TEST_C4X
|
| 317 |
|
|
Type_T: stik 0,*AR0
|
| 318 |
|
|
stik 12,*AR0
|
| 319 |
|
|
stik -5,*AR0
|
| 320 |
|
|
.endif
|
| 321 |
|
|
|
| 322 |
|
|
;;
|
| 323 |
|
|
;; Type U - Unsigned integer
|
| 324 |
|
|
;;
|
| 325 |
|
|
Type_U: and 0,R0
|
| 326 |
|
|
and 256,R0
|
| 327 |
|
|
and 65535,R0
|
| 328 |
|
|
|
| 329 |
|
|
;;
|
| 330 |
|
|
;; Type V - Vector
|
| 331 |
|
|
;;
|
| 332 |
|
|
Type_V: trapu 12
|
| 333 |
|
|
trapu 0
|
| 334 |
|
|
trapu 31
|
| 335 |
|
|
.ifdef TEST_C4X
|
| 336 |
|
|
trapu 511
|
| 337 |
|
|
.endif
|
| 338 |
|
|
|
| 339 |
|
|
;;
|
| 340 |
|
|
;; Type W - Short int
|
| 341 |
|
|
;;
|
| 342 |
|
|
.ifdef TEST_C4X
|
| 343 |
|
|
Type_W: addc3 -3,R0,R0
|
| 344 |
|
|
addc3 5,R0,R0
|
| 345 |
|
|
.endif
|
| 346 |
|
|
|
| 347 |
|
|
;;
|
| 348 |
|
|
;; Type X - Expansion register
|
| 349 |
|
|
;;
|
| 350 |
|
|
.ifdef TEST_C4X
|
| 351 |
|
|
Type_X: ldep IVTP,R0
|
| 352 |
|
|
ldep TVTP,R0
|
| 353 |
|
|
.endif
|
| 354 |
|
|
|
| 355 |
|
|
;;
|
| 356 |
|
|
;; Type Y - Address register
|
| 357 |
|
|
;;
|
| 358 |
|
|
.ifdef TEST_C4X
|
| 359 |
|
|
Type_Y: lda R0,AR0
|
| 360 |
|
|
lda R0,DP
|
| 361 |
|
|
lda R0,SP
|
| 362 |
|
|
lda R0,IR0
|
| 363 |
|
|
.endif
|
| 364 |
|
|
|
| 365 |
|
|
;;
|
| 366 |
|
|
;; Type Z - Expansion register
|
| 367 |
|
|
;;
|
| 368 |
|
|
.ifdef TEST_C4X
|
| 369 |
|
|
Type_Z: ldpe R0,IVTP
|
| 370 |
|
|
ldpe R0,TVTP
|
| 371 |
|
|
.endif
|
