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[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [ld/] [testsuite/] [ld-mips-elf/] [mips16-intermix-1.s] - Blame information for rev 825

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Line No. Rev Author Line
1 38 julius
        .text
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        .align  2
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        .globl  __start
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        .set    nomips16
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        .ent    __start
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__start:
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        .frame  $sp,56,$31              # vars= 0, regs= 3/2, args= 24, gp= 0
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        .mask   0x80030000,-24
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        .fmask  0x00f00000,-8
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        .set    noreorder
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        .set    nomacro
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        addiu   $sp,$sp,-56
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        sw      $31,32($sp)
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        sw      $17,28($sp)
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        sw      $16,24($sp)
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        sdc1    $f22,48($sp)
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        sdc1    $f20,40($sp)
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        jal     m32_l
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        move    $4,$17
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        move    $4,$17
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        jal     m16_l
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        move    $16,$2
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        addu    $16,$16,$2
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        jal     m32_d
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        mov.d   $f12,$f22
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        addu    $16,$16,$2
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        jal     m16_d
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        mov.d   $f12,$f22
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        move    $4,$17
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        mfc1    $7,$f22
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        mfc1    $6,$f23
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        jal     m32_ld
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        addu    $16,$16,$2
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        move    $4,$17
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        mfc1    $7,$f22
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        mfc1    $6,$f23
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        jal     m16_ld
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        addu    $16,$16,$2
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        move    $6,$17
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        mov.d   $f12,$f22
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        jal     m32_dl
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        addu    $16,$16,$2
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        move    $6,$17
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        mov.d   $f12,$f22
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        jal     m16_dl
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        addu    $16,$16,$2
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        move    $6,$17
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        move    $7,$17
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        sdc1    $f22,16($sp)
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        mov.d   $f12,$f22
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        jal     m32_dlld
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        addu    $16,$16,$2
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        move    $6,$17
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        move    $7,$17
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        mov.d   $f12,$f22
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        sdc1    $f22,16($sp)
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        jal     m16_dlld
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        addu    $16,$16,$2
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        move    $4,$17
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        jal     m32_d_l
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        addu    $16,$16,$2
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        move    $4,$17
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        jal     m16_d_l
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        mov.d   $f20,$f0
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        move    $4,$17
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        mfc1    $7,$f22
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        mfc1    $6,$f23
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        jal     f32
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        add.d   $f20,$f20,$f0
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        move    $4,$17
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        add.d   $f20,$f20,$f0
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        mfc1    $7,$f22
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        jal     f16
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        mfc1    $6,$f23
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        add.d   $f20,$f20,$f0
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        lw      $31,32($sp)
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        trunc.w.d $f0,$f20
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        lw      $17,28($sp)
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        mfc1    $3,$f0
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        addu    $2,$3,$16
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        lw      $16,24($sp)
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        ldc1    $f22,48($sp)
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        ldc1    $f20,40($sp)
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        j       $31
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        addiu   $sp,$sp,56
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        .set    macro
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        .set    reorder
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        .end    __start

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