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[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [ld/] [testsuite/] [ld-spu/] [ovl.d] - Blame information for rev 825

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Line No. Rev Author Line
1 38 julius
#source: ovl.s
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#ld: -N -T ovl1.lnk -T ovl.lnk --emit-relocs
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#objdump: -D -r
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.*elf32-spu
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Disassembly of section \.text:
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00000100 <_start>:
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.*      ai      \$1,\$1,-32
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.*      xor     \$0,\$0,\$0
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.*      stqd    \$0,0\(\$1\)
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.*      stqd    \$0,16\(\$1\)
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.*      brsl    \$0,.* <00000000\.ovl_call\.f1_a1>.*
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.*SPU_REL16     f1_a1
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.*      brsl    \$0,.* <00000000\.ovl_call\.f2_a1>.*
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.*SPU_REL16     f2_a1
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.*      brsl    \$0,.* <00000000\.ovl_call\.f1_a2>.*
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.*SPU_REL16     f1_a2
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#.*     ila     \$9,328 # 148
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.*      ila     \$9,352 # 160
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.*SPU_ADDR18    f2_a2
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.*      bisl    \$0,\$9
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.*      ai      \$1,\$1,32      # 20
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.*      br      100 <_start>    # 100
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.*SPU_REL16     _start
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0000012c :
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.*      bi      \$0
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#00000130 <00000000\.ovl_call\.f1_a1>:
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#.*     brsl    \$75,.* <__ovly_load>.*
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#.*00 04 04 00.*
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#
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#00000138 <00000000\.ovl_call\.f2_a1>:
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#.*     brsl    \$75,.* <__ovly_load>.*
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#.*00 04 04 04.*
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#
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#00000140 <00000000\.ovl_call\.f1_a2>:
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#.*     brsl    \$75,.* <__ovly_load>.*
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#.*00 08 04 00.*
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#
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#00000148 <00000000\.ovl_call\.f2_a2>:
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#.*     brsl    \$75,.* <__ovly_load>.*
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#.*00 08 04 24.*
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#
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#00000150 <00000000\.ovl_call\.f4_a1>:
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#.*     brsl    \$75,.* <__ovly_load>.*
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#.*00 04 04 10.*
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#
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#00000158 <00000000.ovl_call.14:8>:
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#.*     brsl    \$75,.* <__ovly_load>.*
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#.*00 08 04 34.*
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00000130 <00000000\.ovl_call\.f1_a1>:
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.*      ila     \$78,1
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.*      lnop
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.*      ila     \$79,1024       # 400
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.*      br      .* <__ovly_load>.*
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00000140 <00000000\.ovl_call\.f2_a1>:
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.*      ila     \$78,1
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.*      lnop
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.*      ila     \$79,1028       # 404
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.*      br      .* <__ovly_load>.*
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00000150 <00000000.ovl_call.f1_a2>:
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.*      ila     \$78,2
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.*      lnop
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.*      ila     \$79,1024       # 400
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.*      br      .* <__ovly_load>.*
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00000160 <00000000\.ovl_call\.f2_a2>:
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.*      ila     \$78,2
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.*      lnop
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.*      ila     \$79,1060       # 424
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.*      br      .* <__ovly_load>.*
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00000170 <00000000\.ovl_call\.f4_a1>:
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.*      ila     \$78,1
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.*      lnop
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.*      ila     \$79,1040       # 410
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.*      br      .* <__ovly_load>.*
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00000180 <00000000.ovl_call.14:8>:
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.*      ila     \$78,2
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.*      lnop
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.*      ila     \$79,1076       # 434
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.*      br      .* <__ovly_load>.*
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#...
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[0-9a-f]+ <__ovly_return>:
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#...
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[0-9a-f]+ <__ovly_load>:
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#...
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[0-9a-f]+ <_ovly_debug_event>:
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#...
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Disassembly of section \.ov_a1:
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00000400 :
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.*      br      .* .*
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.*SPU_REL16     f3_a1
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00000404 :
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#.*     ila     \$3,336 # 150
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.*      ila     \$3,368 # 170
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.*SPU_ADDR18    f4_a1
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.*      bi      \$0
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0000040c :
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.*      bi      \$0
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00000410 :
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.*      bi      \$0
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        \.\.\.
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Disassembly of section \.ov_a2:
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00000400 :
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.*      stqd    \$0,16\(\$1\)
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.*      stqd    \$1,-32\(\$1\)
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.*      ai      \$1,\$1,-32
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.*      brsl    \$0,12c         # 12c
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.*SPU_REL16     f0
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.*      brsl    \$0,130 <00000000\.ovl_call\.f1_a1>        # 130
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.*SPU_REL16     f1_a1
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.*      brsl    \$0,430         # 430
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.*SPU_REL16     f3_a2
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.*      lqd     \$0,48\(\$1\)   # 30
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.*      ai      \$1,\$1,32      # 20
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.*      bi      \$0
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00000424 :
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.*      ilhu    \$3,0
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.*SPU_ADDR16_HI f4_a2
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#.*     iohl    \$3,344 # 158
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.*      iohl    \$3,384 # 180
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.*SPU_ADDR16_LO f4_a2
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.*      bi      \$0
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00000430 :
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.*      bi      \$0
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00000434 :
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.*      br      .* .*
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.*SPU_REL16     f3_a2
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        \.\.\.
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Disassembly of section .data:
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149
00000440 <_ovly_table-0x10>:
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 440:   00 00 00 00 .*
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 444:   00 00 00 01 .*
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        \.\.\.
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00000450 <_ovly_table>:
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 450:   00 00 04 00 .*
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 454:   00 00 00 20 .*
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# 458:  00 00 03 40 .*
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 458:   00 00 03 70 .*
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 45c:   00 00 00 01 .*
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 460:   00 00 04 00 .*
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 464:   00 00 00 40 .*
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# 468:  00 00 03 60 .*
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 468:   00 00 03 90 .*
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 46c:   00 00 00 01 .*
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00000470 <_ovly_buf_table>:
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 470:   00 00 00 00 .*
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Disassembly of section \.toe:
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00000480 <_EAR_>:
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        \.\.\.
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Disassembly of section \.note\.spu_name:
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.* <\.note\.spu_name>:
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.*:     00 00 00 08 .*
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.*:     00 00 00 0c .*
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.*:     00 00 00 01 .*
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.*:     53 50 55 4e .*
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.*:     41 4d 45 00 .*
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.*:     74 6d 70 64 .*
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.*:     69 72 2f 64 .*
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.*:     75 6d 70 00 .*

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