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/* SPU opcode list

   Copyright 2006, 2007 Free Software Foundation, Inc.

   This file is part of the GNU opcodes library.

   This library is free software; you can redistribute it and/or modify

   it under the terms of the GNU General Public License as published by

   the Free Software Foundation; either version 3, or (at your option)

   any later version.

   It is distributed in the hope that it will be useful, but WITHOUT

   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY

   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public

   License for more details.

   You should have received a copy of the GNU General Public License

   along with this file; see the file COPYING.  If not, write to the

   Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,

   MA 02110-1301, USA.  */

#include "opcode/spu.h"

/* This file holds the Spu opcode table */

/*

   Example contents of spu-insn.h

      id_tag    mode    mode    type    opcode  mnemonic        asmtype     dependency          FPU     L/S?    branch? instruction

                QUAD    WORD                                               (0,RC,RB,RA,RT)    latency

   APUOP(M_LQD, 1,      0,      RI9,    0x1f8,  "lqd",          ASM_RI9IDX,     00012,          FXU,    1,      0)      Load Quadword d-form

 */

const struct spu_opcode spu_opcodes[] = {

#define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \

        { MACFORMAT, OPCODE, MNEMONIC, ASMFORMAT },

#define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \

        { MACFORMAT, OPCODE, MNEMONIC, ASMFORMAT },

#include "opcode/spu-insns.h"

#undef APUOP

#undef APUOPFB

};

const int spu_num_opcodes =

  sizeof (spu_opcodes) / sizeof (spu_opcodes[0]);