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/* Subroutines for insn-output.c for ATMEL AVR micro controllers

   Copyright (C) 1998, 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007

   Free Software Foundation, Inc.

   Contributed by Denis Chertykov (denisc@overta.ru)

   This file is part of GCC.

   GCC is free software; you can redistribute it and/or modify

   it under the terms of the GNU General Public License as published by

   the Free Software Foundation; either version 3, or (at your option)

   any later version.

   GCC is distributed in the hope that it will be useful,

   but WITHOUT ANY WARRANTY; without even the implied warranty of

   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License

   along with GCC; see the file COPYING3.  If not see

   <http://www.gnu.org/licenses/>.  */

#include "config.h"

#include "system.h"

#include "coretypes.h"

#include "tm.h"

#include "rtl.h"

#include "regs.h"

#include "hard-reg-set.h"

#include "real.h"

#include "insn-config.h"

#include "conditions.h"

#include "insn-attr.h"

#include "flags.h"

#include "reload.h"

#include "tree.h"

#include "output.h"

#include "expr.h"

#include "toplev.h"

#include "obstack.h"

#include "function.h"

#include "recog.h"

#include "ggc.h"

#include "tm_p.h"

#include "target.h"

#include "target-def.h"

/* Maximal allowed offset for an address in the LD command */

#define MAX_LD_OFFSET(MODE) (64 - (signed)GET_MODE_SIZE (MODE))

static int avr_naked_function_p (tree);

static int interrupt_function_p (tree);

static int signal_function_p (tree);

static int avr_regs_to_save (HARD_REG_SET *);

static int sequent_regs_live (void);

static const char *ptrreg_to_str (int);

static const char *cond_string (enum rtx_code);

static int avr_num_arg_regs (enum machine_mode, tree);

static int out_adj_frame_ptr (FILE *, int);

static int out_set_stack_ptr (FILE *, int, int);

static RTX_CODE compare_condition (rtx insn);

static int compare_sign_p (rtx insn);

static tree avr_handle_progmem_attribute (tree *, tree, tree, int, bool *);

static tree avr_handle_fndecl_attribute (tree *, tree, tree, int, bool *);

static tree avr_handle_fntype_attribute (tree *, tree, tree, int, bool *);

const struct attribute_spec avr_attribute_table[];

static bool avr_assemble_integer (rtx, unsigned int, int);

static void avr_file_start (void);

static void avr_file_end (void);

static void avr_output_function_prologue (FILE *, HOST_WIDE_INT);

static void avr_output_function_epilogue (FILE *, HOST_WIDE_INT);

static void avr_insert_attributes (tree, tree *);

static void avr_asm_init_sections (void);

static unsigned int avr_section_type_flags (tree, const char *, int);

static void avr_reorg (void);

static void avr_asm_out_ctor (rtx, int);

static void avr_asm_out_dtor (rtx, int);

static int avr_operand_rtx_cost (rtx, enum machine_mode, enum rtx_code);

static bool avr_rtx_costs (rtx, int, int, int *);

static int avr_address_cost (rtx);

static bool avr_return_in_memory (tree, tree);

/* Allocate registers from r25 to r8 for parameters for function calls.  */

#define FIRST_CUM_REG 26

/* Temporary register RTX (gen_rtx_REG (QImode, TMP_REGNO)) */

static GTY(()) rtx tmp_reg_rtx;

/* Zeroed register RTX (gen_rtx_REG (QImode, ZERO_REGNO)) */

static GTY(()) rtx zero_reg_rtx;

/* AVR register names {"r0", "r1", ..., "r31"} */

static const char *const avr_regnames[] = REGISTER_NAMES;

/* This holds the last insn address.  */

static int last_insn_address = 0;

/* Commands count in the compiled file */

static int commands_in_file;

/* Commands in the functions prologues in the compiled file */

static int commands_in_prologues;

/* Commands in the functions epilogues in the compiled file */

static int commands_in_epilogues;

/* Prologue/Epilogue size in words */

static int prologue_size;

static int epilogue_size;

/* Size of all jump tables in the current function, in words.  */

static int jump_tables_size;

/* Preprocessor macros to define depending on MCU type.  */

const char *avr_base_arch_macro;

const char *avr_extra_arch_macro;

section *progmem_section;

/* More than 8K of program memory: use "call" and "jmp".  */

int avr_mega_p = 0;

/* Enhanced core: use "movw", "mul", ...  */

int avr_enhanced_p = 0;

/* Assembler only.  */

int avr_asm_only_p = 0;

/* Core have 'MOVW' and 'LPM Rx,Z' instructions.  */

int avr_have_movw_lpmx_p = 0;

struct base_arch_s {

  int asm_only;

  int enhanced;

  int mega;

  int have_movw_lpmx;

  const char *const macro;

};

static const struct base_arch_s avr_arch_types[] = {

  { 1, 0, 0, 0,  NULL },  /* unknown device specified */

  { 1, 0, 0, 0, "__AVR_ARCH__=1" },

  { 0, 0, 0, 0, "__AVR_ARCH__=2" },

  { 0, 0, 0, 1, "__AVR_ARCH__=25"},

  { 0, 0, 1, 0, "__AVR_ARCH__=3" },

  { 0, 1, 0, 1, "__AVR_ARCH__=4" },

  { 0, 1, 1, 1, "__AVR_ARCH__=5" }

};

/* These names are used as the index into the avr_arch_types[] table

   above.  */

enum avr_arch

{

  ARCH_UNKNOWN,

  ARCH_AVR1,

  ARCH_AVR2,

  ARCH_AVR25,

  ARCH_AVR3,

  ARCH_AVR4,

  ARCH_AVR5

};

struct mcu_type_s {

  const char *const name;

  int arch;  /* index in avr_arch_types[] */

  /* Must lie outside user's namespace.  NULL == no macro.  */

  const char *const macro;

};

/* List of all known AVR MCU types - if updated, it has to be kept

   in sync in several places (FIXME: is there a better way?):

    - here

    - avr.h (CPP_SPEC, LINK_SPEC, CRT_BINUTILS_SPECS)

    - t-avr (MULTILIB_MATCHES)

    - gas/config/tc-avr.c

    - avr-libc  */

static const struct mcu_type_s avr_mcu_types[] = {

    /* Classic, <= 8K.  */

  { "avr2",         ARCH_AVR2, NULL },

  { "at90s2313",    ARCH_AVR2, "__AVR_AT90S2313__" },

  { "at90s2323",    ARCH_AVR2, "__AVR_AT90S2323__" },

  { "at90s2333",    ARCH_AVR2, "__AVR_AT90S2333__" },

  { "at90s2343",    ARCH_AVR2, "__AVR_AT90S2343__" },

  { "attiny22",     ARCH_AVR2, "__AVR_ATtiny22__" },

  { "attiny26",     ARCH_AVR2, "__AVR_ATtiny26__" },

  { "at90s4414",    ARCH_AVR2, "__AVR_AT90S4414__" },

  { "at90s4433",    ARCH_AVR2, "__AVR_AT90S4433__" },

  { "at90s4434",    ARCH_AVR2, "__AVR_AT90S4434__" },

  { "at90s8515",    ARCH_AVR2, "__AVR_AT90S8515__" },

  { "at90c8534",    ARCH_AVR2, "__AVR_AT90C8534__" },

  { "at90s8535",    ARCH_AVR2, "__AVR_AT90S8535__" },

    /* Classic + MOVW, <= 8K.  */

  { "avr25",        ARCH_AVR25, NULL },

  { "attiny13",     ARCH_AVR25, "__AVR_ATtiny13__" },

  { "attiny2313",   ARCH_AVR25, "__AVR_ATtiny2313__" },

  { "attiny24",     ARCH_AVR25, "__AVR_ATtiny24__" },

  { "attiny44",     ARCH_AVR25, "__AVR_ATtiny44__" },

  { "attiny84",     ARCH_AVR25, "__AVR_ATtiny84__" },

  { "attiny25",     ARCH_AVR25, "__AVR_ATtiny25__" },

  { "attiny45",     ARCH_AVR25, "__AVR_ATtiny45__" },

  { "attiny85",     ARCH_AVR25, "__AVR_ATtiny85__" },

  { "attiny261",    ARCH_AVR25, "__AVR_ATtiny261__" },

  { "attiny461",    ARCH_AVR25, "__AVR_ATtiny461__" },

  { "attiny861",    ARCH_AVR25, "__AVR_ATtiny861__" },

  { "at86rf401",    ARCH_AVR25, "__AVR_AT86RF401__" },

    /* Classic, > 8K.  */

  { "avr3",         ARCH_AVR3, NULL },

  { "atmega103",    ARCH_AVR3, "__AVR_ATmega103__" },

  { "atmega603",    ARCH_AVR3, "__AVR_ATmega603__" },

  { "at43usb320",   ARCH_AVR3, "__AVR_AT43USB320__" },

  { "at43usb355",   ARCH_AVR3, "__AVR_AT43USB355__" },

  { "at76c711",     ARCH_AVR3, "__AVR_AT76C711__" },

    /* Enhanced, <= 8K.  */

  { "avr4",         ARCH_AVR4, NULL },

  { "atmega8",      ARCH_AVR4, "__AVR_ATmega8__" },

  { "atmega48",     ARCH_AVR4, "__AVR_ATmega48__" },

  { "atmega88",     ARCH_AVR4, "__AVR_ATmega88__" },

  { "atmega8515",   ARCH_AVR4, "__AVR_ATmega8515__" },

  { "atmega8535",   ARCH_AVR4, "__AVR_ATmega8535__" },

  { "atmega8hva",   ARCH_AVR4, "__AVR_ATmega8HVA__" },

  { "at90pwm1",     ARCH_AVR4, "__AVR_AT90PWM1__" },

  { "at90pwm2",     ARCH_AVR4, "__AVR_AT90PWM2__" },

  { "at90pwm3",     ARCH_AVR4, "__AVR_AT90PWM3__" },

    /* Enhanced, > 8K.  */

  { "avr5",         ARCH_AVR5, NULL },

  { "atmega16",     ARCH_AVR5, "__AVR_ATmega16__" },

  { "atmega161",    ARCH_AVR5, "__AVR_ATmega161__" },

  { "atmega162",    ARCH_AVR5, "__AVR_ATmega162__" },

  { "atmega163",    ARCH_AVR5, "__AVR_ATmega163__" },

  { "atmega164p",   ARCH_AVR5, "__AVR_ATmega164P__" },

  { "atmega165",    ARCH_AVR5, "__AVR_ATmega165__" },

  { "atmega165p",   ARCH_AVR5, "__AVR_ATmega165P__" },

  { "atmega168",    ARCH_AVR5, "__AVR_ATmega168__" },

  { "atmega169",    ARCH_AVR5, "__AVR_ATmega169__" },

  { "atmega169p",   ARCH_AVR5, "__AVR_ATmega169P__" },

  { "atmega32",     ARCH_AVR5, "__AVR_ATmega32__" },

  { "atmega323",    ARCH_AVR5, "__AVR_ATmega323__" },

  { "atmega324p",   ARCH_AVR5, "__AVR_ATmega324P__" },

  { "atmega325",    ARCH_AVR5, "__AVR_ATmega325__" },

  { "atmega325p",   ARCH_AVR5, "__AVR_ATmega325P__" },

  { "atmega3250",   ARCH_AVR5, "__AVR_ATmega3250__" },

  { "atmega3250p",  ARCH_AVR5, "__AVR_ATmega3250P__" },

  { "atmega329",    ARCH_AVR5, "__AVR_ATmega329__" },

  { "atmega329p",   ARCH_AVR5, "__AVR_ATmega329P__" },

  { "atmega3290",   ARCH_AVR5, "__AVR_ATmega3290__" },

  { "atmega3290p",  ARCH_AVR5, "__AVR_ATmega3290P__" },

  { "atmega406",    ARCH_AVR5, "__AVR_ATmega406__" },

  { "atmega64",     ARCH_AVR5, "__AVR_ATmega64__" },

  { "atmega640",    ARCH_AVR5, "__AVR_ATmega640__" },

  { "atmega644",    ARCH_AVR5, "__AVR_ATmega644__" },

  { "atmega644p",   ARCH_AVR5, "__AVR_ATmega644P__" },

  { "atmega645",    ARCH_AVR5, "__AVR_ATmega645__" },

  { "atmega6450",   ARCH_AVR5, "__AVR_ATmega6450__" },

  { "atmega649",    ARCH_AVR5, "__AVR_ATmega649__" },

  { "atmega6490",   ARCH_AVR5, "__AVR_ATmega6490__" },

  { "atmega128",    ARCH_AVR5, "__AVR_ATmega128__" },

  { "atmega1280",   ARCH_AVR5, "__AVR_ATmega1280__" },

  { "atmega1281",   ARCH_AVR5, "__AVR_ATmega1281__" },

  { "atmega16hva",  ARCH_AVR5, "__AVR_ATmega16HVA__" },

  { "at90can32",    ARCH_AVR5, "__AVR_AT90CAN32__" },

  { "at90can64",    ARCH_AVR5, "__AVR_AT90CAN64__" },

  { "at90can128",   ARCH_AVR5, "__AVR_AT90CAN128__" },

  { "at90usb82",    ARCH_AVR5, "__AVR_AT90USB82__" },

  { "at90usb162",   ARCH_AVR5, "__AVR_AT90USB162__" },

  { "at90usb646",   ARCH_AVR5, "__AVR_AT90USB646__" },

  { "at90usb647",   ARCH_AVR5, "__AVR_AT90USB647__" },

  { "at90usb1286",  ARCH_AVR5, "__AVR_AT90USB1286__" },

  { "at90usb1287",  ARCH_AVR5, "__AVR_AT90USB1287__" },

  { "at94k",        ARCH_AVR5, "__AVR_AT94K__" },

    /* Assembler only.  */

  { "avr1",         ARCH_AVR1, NULL },

  { "at90s1200",    ARCH_AVR1, "__AVR_AT90S1200__" },

  { "attiny11",     ARCH_AVR1, "__AVR_ATtiny11__" },

  { "attiny12",     ARCH_AVR1, "__AVR_ATtiny12__" },

  { "attiny15",     ARCH_AVR1, "__AVR_ATtiny15__" },

  { "attiny28",     ARCH_AVR1, "__AVR_ATtiny28__" },

  { NULL,           ARCH_UNKNOWN, NULL }

};

int avr_case_values_threshold = 30000;

/* Initialize the GCC target structure.  */

#undef TARGET_ASM_ALIGNED_HI_OP

#define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"

#undef TARGET_ASM_ALIGNED_SI_OP

#define TARGET_ASM_ALIGNED_SI_OP "\t.long\t"

#undef TARGET_ASM_UNALIGNED_HI_OP

#define TARGET_ASM_UNALIGNED_HI_OP "\t.word\t"

#undef TARGET_ASM_UNALIGNED_SI_OP

#define TARGET_ASM_UNALIGNED_SI_OP "\t.long\t"

#undef TARGET_ASM_INTEGER

#define TARGET_ASM_INTEGER avr_assemble_integer

#undef TARGET_ASM_FILE_START

#define TARGET_ASM_FILE_START avr_file_start

#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE

#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true

#undef TARGET_ASM_FILE_END

#define TARGET_ASM_FILE_END avr_file_end

#undef TARGET_ASM_FUNCTION_PROLOGUE

#define TARGET_ASM_FUNCTION_PROLOGUE avr_output_function_prologue

#undef TARGET_ASM_FUNCTION_EPILOGUE

#define TARGET_ASM_FUNCTION_EPILOGUE avr_output_function_epilogue

#undef TARGET_ATTRIBUTE_TABLE

#define TARGET_ATTRIBUTE_TABLE avr_attribute_table

#undef TARGET_ASM_FUNCTION_RODATA_SECTION

#define TARGET_ASM_FUNCTION_RODATA_SECTION default_no_function_rodata_section

#undef TARGET_INSERT_ATTRIBUTES

#define TARGET_INSERT_ATTRIBUTES avr_insert_attributes

#undef TARGET_SECTION_TYPE_FLAGS

#define TARGET_SECTION_TYPE_FLAGS avr_section_type_flags

#undef TARGET_RTX_COSTS

#define TARGET_RTX_COSTS avr_rtx_costs

#undef TARGET_ADDRESS_COST

#define TARGET_ADDRESS_COST avr_address_cost

#undef TARGET_MACHINE_DEPENDENT_REORG

#define TARGET_MACHINE_DEPENDENT_REORG avr_reorg

#undef TARGET_RETURN_IN_MEMORY

#define TARGET_RETURN_IN_MEMORY avr_return_in_memory

#undef TARGET_STRICT_ARGUMENT_NAMING

#define TARGET_STRICT_ARGUMENT_NAMING hook_bool_CUMULATIVE_ARGS_true

struct gcc_target targetm = TARGET_INITIALIZER;

void

avr_override_options (void)

{

  const struct mcu_type_s *t;

  const struct base_arch_s *base;

  flag_delete_null_pointer_checks = 0;

  for (t = avr_mcu_types; t->name; t++)

    if (strcmp (t->name, avr_mcu_name) == 0)

      break;

  if (!t->name)

    {

      fprintf (stderr, "unknown MCU '%s' specified\nKnown MCU names:\n",

               avr_mcu_name);

      for (t = avr_mcu_types; t->name; t++)

        fprintf (stderr,"   %s\n", t->name);

    }

  base = &avr_arch_types[t->arch];

  avr_asm_only_p = base->asm_only;

  avr_enhanced_p = base->enhanced;

  avr_mega_p = base->mega;

  avr_have_movw_lpmx_p = base->have_movw_lpmx;

  avr_base_arch_macro = base->macro;

  avr_extra_arch_macro = t->macro;

  if (optimize && !TARGET_NO_TABLEJUMP)

    avr_case_values_threshold = (!AVR_MEGA || TARGET_CALL_PROLOGUES) ? 8 : 17;

  tmp_reg_rtx  = gen_rtx_REG (QImode, TMP_REGNO);

  zero_reg_rtx = gen_rtx_REG (QImode, ZERO_REGNO);

}

/*  return register class from register number.  */

static const int reg_class_tab[]={

  GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,

  GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,

  GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,

  GENERAL_REGS, /* r0 - r15 */

  LD_REGS,LD_REGS,LD_REGS,LD_REGS,LD_REGS,LD_REGS,LD_REGS,

  LD_REGS,                      /* r16 - 23 */

  ADDW_REGS,ADDW_REGS,          /* r24,r25 */

  POINTER_X_REGS,POINTER_X_REGS, /* r26,27 */

  POINTER_Y_REGS,POINTER_Y_REGS, /* r28,r29 */

  POINTER_Z_REGS,POINTER_Z_REGS, /* r30,r31 */

  STACK_REG,STACK_REG           /* SPL,SPH */

};

/* Return register class for register R.  */

enum reg_class

avr_regno_reg_class (int r)

{

  if (r <= 33)

    return reg_class_tab[r];

  return ALL_REGS;

}

/* Return nonzero if FUNC is a naked function.  */

static int

avr_naked_function_p (tree func)

{

  tree a;

  gcc_assert (TREE_CODE (func) == FUNCTION_DECL);

  a = lookup_attribute ("naked", TYPE_ATTRIBUTES (TREE_TYPE (func)));

  return a != NULL_TREE;

}

/* Return nonzero if FUNC is an interrupt function as specified

   by the "interrupt" attribute.  */

static int

interrupt_function_p (tree func)

{

  tree a;

  if (TREE_CODE (func) != FUNCTION_DECL)

    return 0;

  a = lookup_attribute ("interrupt", DECL_ATTRIBUTES (func));

  return a != NULL_TREE;

}

/* Return nonzero if FUNC is a signal function as specified

   by the "signal" attribute.  */

static int

signal_function_p (tree func)

{

  tree a;

  if (TREE_CODE (func) != FUNCTION_DECL)

    return 0;

  a = lookup_attribute ("signal", DECL_ATTRIBUTES (func));

  return a != NULL_TREE;

}

/* Return the number of hard registers to push/pop in the prologue/epilogue

   of the current function, and optionally store these registers in SET.  */

static int

avr_regs_to_save (HARD_REG_SET *set)

{

  int reg, count;

  int int_or_sig_p = (interrupt_function_p (current_function_decl)

                      || signal_function_p (current_function_decl));

  int leaf_func_p = leaf_function_p ();

  if (set)

    CLEAR_HARD_REG_SET (*set);

  count = 0;

  /* No need to save any registers if the function never returns.  */

  if (TREE_THIS_VOLATILE (current_function_decl))

    return 0;

  for (reg = 0; reg < 32; reg++)

    {

      /* Do not push/pop __tmp_reg__, __zero_reg__, as well as

         any global register variables.  */

      if (fixed_regs[reg])

        continue;

      if ((int_or_sig_p && !leaf_func_p && call_used_regs[reg])

          || (regs_ever_live[reg]

              && (int_or_sig_p || !call_used_regs[reg])

              && !(frame_pointer_needed

                   && (reg == REG_Y || reg == (REG_Y+1)))))

        {

          if (set)

            SET_HARD_REG_BIT (*set, reg);

          count++;

        }

    }

  return count;

}

/* Compute offset between arg_pointer and frame_pointer.  */

int

initial_elimination_offset (int from, int to)

{

  if (from == FRAME_POINTER_REGNUM && to == STACK_POINTER_REGNUM)

    return 0;

  else

    {

      int offset = frame_pointer_needed ? 2 : 0;

      offset += avr_regs_to_save (NULL);

      return get_frame_size () + 2 + 1 + offset;

    }

}

/* Return 1 if the function epilogue is just a single "ret".  */

int

avr_simple_epilogue (void)

{

  return (! frame_pointer_needed

          && get_frame_size () == 0

          && avr_regs_to_save (NULL) == 0

          && ! interrupt_function_p (current_function_decl)

          && ! signal_function_p (current_function_decl)

          && ! avr_naked_function_p (current_function_decl)

          && ! MAIN_NAME_P (DECL_NAME (current_function_decl))

          && ! TREE_THIS_VOLATILE (current_function_decl));

}

/* This function checks sequence of live registers.  */

static int

sequent_regs_live (void)

{

  int reg;

  int live_seq=0;

  int cur_seq=0;

  for (reg = 0; reg < 18; ++reg)

    {

      if (!call_used_regs[reg])

        {

          if (regs_ever_live[reg])

            {

              ++live_seq;

              ++cur_seq;

            }

          else

            cur_seq = 0;

        }

    }

  if (!frame_pointer_needed)

    {

      if (regs_ever_live[REG_Y])

        {

          ++live_seq;

          ++cur_seq;

        }

      else

        cur_seq = 0;

      if (regs_ever_live[REG_Y+1])

        {

          ++live_seq;

          ++cur_seq;

        }

      else

        cur_seq = 0;

    }

  else

    {

      cur_seq += 2;

      live_seq += 2;

    }

  return (cur_seq == live_seq) ? live_seq : 0;

}

/* Output to FILE the asm instructions to adjust the frame pointer by

   ADJ (r29:r28 -= ADJ;) which can be positive (prologue) or negative

   (epilogue).  Returns the number of instructions generated.  */

static int

out_adj_frame_ptr (FILE *file, int adj)

{

  int size = 0;

  if (adj)

    {

      if (TARGET_TINY_STACK)

        {

          if (adj < -63 || adj > 63)

            warning (0, "large frame pointer change (%d) with -mtiny-stack", adj);

          /* The high byte (r29) doesn't change - prefer "subi" (1 cycle)

             over "sbiw" (2 cycles, same size).  */

          fprintf (file, (AS2 (subi, r28, %d) CR_TAB), adj);

          size++;

        }

      else if (adj < -63 || adj > 63)

        {

          fprintf (file, (AS2 (subi, r28, lo8(%d)) CR_TAB

                          AS2 (sbci, r29, hi8(%d)) CR_TAB),

                   adj, adj);

          size += 2;

        }

      else if (adj < 0)

        {

          fprintf (file, (AS2 (adiw, r28, %d) CR_TAB), -adj);

          size++;

        }

      else

        {

          fprintf (file, (AS2 (sbiw, r28, %d) CR_TAB), adj);

          size++;

        }

    }

  return size;

}

/* Output to FILE the asm instructions to copy r29:r28 to SPH:SPL,

   handling various cases of interrupt enable flag state BEFORE and AFTER

   (0=disabled, 1=enabled, -1=unknown/unchanged) and target_flags.

   Returns the number of instructions generated.  */

static int

out_set_stack_ptr (FILE *file, int before, int after)

{

  int do_sph, do_cli, do_save, do_sei, lock_sph, size;

  /* The logic here is so that -mno-interrupts actually means

     "it is safe to write SPH in one instruction, then SPL in the

     next instruction, without disabling interrupts first".

     The after != -1 case (interrupt/signal) is not affected.  */

  do_sph = !TARGET_TINY_STACK;

  lock_sph = do_sph && !TARGET_NO_INTERRUPTS;

  do_cli = (before != 0 && (after == 0 || lock_sph));

  do_save = (do_cli && before == -1 && after == -1);

  do_sei = ((do_cli || before != 1) && after == 1);

  size = 1;

  if (do_save)

    {

      fprintf (file, AS2 (in, __tmp_reg__, __SREG__) CR_TAB);

      size++;

    }

  if (do_cli)

    {

      fprintf (file, "cli" CR_TAB);

      size++;

    }

  /* Do SPH first - maybe this will disable interrupts for one instruction

     someday (a suggestion has been sent to avr@atmel.com for consideration

     in future devices - that would make -mno-interrupts always safe).  */

  if (do_sph)

    {

      fprintf (file, AS2 (out, __SP_H__, r29) CR_TAB);

      size++;

    }

  /* Set/restore the I flag now - interrupts will be really enabled only

     after the next instruction.  This is not clearly documented, but

     believed to be true for all AVR devices.  */

  if (do_save)

    {

      fprintf (file, AS2 (out, __SREG__, __tmp_reg__) CR_TAB);

      size++;

    }

  else if (do_sei)

    {

      fprintf (file, "sei" CR_TAB);