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/* Definitions of target machine for GNU compiler, Renesas M32R cpu.

   Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,

   2005, 2006, 2007 Free Software Foundation, Inc.

   This file is part of GCC.

   GCC is free software; you can redistribute it and/or modify it

   under the terms of the GNU General Public License as published

   by the Free Software Foundation; either version 3, or (at your

   option) any later version.

   GCC is distributed in the hope that it will be useful, but WITHOUT

   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY

   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public

   License for more details.

   You should have received a copy of the GNU General Public License

   along with GCC; see the file COPYING3.  If not see

   <http://www.gnu.org/licenses/>.  */

/* Things to do:

- longlong.h?

*/

#undef SWITCH_TAKES_ARG

#undef WORD_SWITCH_TAKES_ARG

#undef HANDLE_SYSV_PRAGMA

#undef SIZE_TYPE

#undef PTRDIFF_TYPE

#undef WCHAR_TYPE

#undef WCHAR_TYPE_SIZE

#undef TARGET_VERSION

#undef CPP_SPEC

#undef ASM_SPEC

#undef LINK_SPEC

#undef STARTFILE_SPEC

#undef ENDFILE_SPEC

#undef ASM_APP_ON

#undef ASM_APP_OFF

/* M32R/X overrides.  */

/* Print subsidiary information on the compiler version in use.  */

#define TARGET_VERSION fprintf (stderr, " (m32r/x/2)");

/* Additional flags for the preprocessor.  */

#define CPP_CPU_SPEC "%{m32rx:-D__M32RX__ -D__m32rx__ -U__M32R2__ -U__m32r2__} \

%{m32r2:-D__M32R2__ -D__m32r2__ -U__M32RX__ -U__m32rx__} \

%{m32r:-U__M32RX__  -U__m32rx__ -U__M32R2__ -U__m32r2__} \

 "

/* Assembler switches.  */

#define ASM_CPU_SPEC \

"%{m32r} %{m32rx} %{m32r2} %{!O0: %{O*: -O}} --no-warn-explicit-parallel-conflicts"

/* Use m32rx specific crt0/crtinit/crtfini files.  */

#define STARTFILE_CPU_SPEC "%{!shared:crt0.o%s} %{m32rx:m32rx/crtinit.o%s} %{!m32rx:crtinit.o%s}"

#define ENDFILE_CPU_SPEC "-lgloss %{m32rx:m32rx/crtfini.o%s} %{!m32rx:crtfini.o%s}"

/* Define this macro as a C expression for the initializer of an array of

   strings to tell the driver program which options are defaults for this

   target and thus do not need to be handled specially when using

   `MULTILIB_OPTIONS'.  */

#define SUBTARGET_MULTILIB_DEFAULTS , "m32r"

/* Number of additional registers the subtarget defines.  */

#define SUBTARGET_NUM_REGISTERS 1

/* 1 for registers that cannot be allocated.  */

#define SUBTARGET_FIXED_REGISTERS , 1

/* 1 for registers that are not available across function calls.  */

#define SUBTARGET_CALL_USED_REGISTERS , 1

/* Order to allocate model specific registers.  */

#define SUBTARGET_REG_ALLOC_ORDER , 19

/* Registers which are accumulators.  */

#define SUBTARGET_REG_CLASS_ACCUM 0x80000

/* All registers added.  */

#define SUBTARGET_REG_CLASS_ALL SUBTARGET_REG_CLASS_ACCUM

/* Additional accumulator registers.  */

#define SUBTARGET_ACCUM_P(REGNO) ((REGNO) == 19)

/* Define additional register names.  */

#define SUBTARGET_REGISTER_NAMES , "a1"

/* end M32R/X overrides.  */

/* Print subsidiary information on the compiler version in use.  */

#ifndef TARGET_VERSION

#define TARGET_VERSION fprintf (stderr, " (m32r)")

#endif

/* Switch  Recognition by gcc.c.  Add -G xx support.  */

#undef  SWITCH_TAKES_ARG

#define SWITCH_TAKES_ARG(CHAR) \

(DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')

/* Names to predefine in the preprocessor for this target machine.  */

/* __M32R__ is defined by the existing compiler so we use that.  */

#define TARGET_CPU_CPP_BUILTINS()               \

  do                                            \

    {                                           \

      builtin_define ("__M32R__");              \

      builtin_define ("__m32r__");              \

      builtin_assert ("cpu=m32r");              \

      builtin_assert ("machine=m32r");          \

      builtin_define (TARGET_BIG_ENDIAN         \

                      ? "__BIG_ENDIAN__" : "__LITTLE_ENDIAN__"); \

    }                                           \

  while (0)

/* This macro defines names of additional specifications to put in the specs

   that can be used in various specifications like CC1_SPEC.  Its definition

   is an initializer with a subgrouping for each command option.

   Each subgrouping contains a string constant, that defines the

   specification name, and a string constant that used by the GCC driver

   program.

   Do not define this macro if it does not need to do anything.  */

#ifndef SUBTARGET_EXTRA_SPECS

#define SUBTARGET_EXTRA_SPECS

#endif

#ifndef ASM_CPU_SPEC

#define ASM_CPU_SPEC ""

#endif

#ifndef CPP_CPU_SPEC

#define CPP_CPU_SPEC ""

#endif

#ifndef CC1_CPU_SPEC

#define CC1_CPU_SPEC ""

#endif

#ifndef LINK_CPU_SPEC

#define LINK_CPU_SPEC ""

#endif

#ifndef STARTFILE_CPU_SPEC

#define STARTFILE_CPU_SPEC "%{!shared:crt0.o%s} crtinit.o%s"

#endif

#ifndef ENDFILE_CPU_SPEC

#define ENDFILE_CPU_SPEC "-lgloss crtfini.o%s"

#endif

#ifndef RELAX_SPEC

#if 0 /* Not supported yet.  */

#define RELAX_SPEC "%{mrelax:-relax}"

#else

#define RELAX_SPEC ""

#endif

#endif

#define EXTRA_SPECS                                                     \

  { "asm_cpu",                  ASM_CPU_SPEC },                         \

  { "cpp_cpu",                  CPP_CPU_SPEC },                         \

  { "cc1_cpu",                  CC1_CPU_SPEC },                         \

  { "link_cpu",                 LINK_CPU_SPEC },                        \

  { "startfile_cpu",            STARTFILE_CPU_SPEC },                   \

  { "endfile_cpu",              ENDFILE_CPU_SPEC },                     \

  { "relax",                    RELAX_SPEC },                           \

  SUBTARGET_EXTRA_SPECS

#define CPP_SPEC "%(cpp_cpu)"

#undef  CC1_SPEC

#define CC1_SPEC "%{G*} %(cc1_cpu)"

/* Options to pass on to the assembler.  */

#undef  ASM_SPEC

#define ASM_SPEC "%{v} %(asm_cpu) %(relax) %{fpic|fpie:-K PIC} %{fPIC|fPIE:-K PIC}"

#define LINK_SPEC "%{v} %(link_cpu) %(relax)"

#undef  STARTFILE_SPEC

#define STARTFILE_SPEC "%(startfile_cpu)"

#undef  ENDFILE_SPEC

#define ENDFILE_SPEC "%(endfile_cpu)"

#undef LIB_SPEC

/* Run-time compilation parameters selecting different hardware subsets.  */

#define TARGET_M32R             (! TARGET_M32RX && ! TARGET_M32R2)

#ifndef TARGET_LITTLE_ENDIAN

#define TARGET_LITTLE_ENDIAN    0

#endif

#define TARGET_BIG_ENDIAN       (! TARGET_LITTLE_ENDIAN)

/* This defaults us to m32r.  */

#ifndef TARGET_CPU_DEFAULT

#define TARGET_CPU_DEFAULT 0

#endif

/* Code Models

   Code models are used to select between two choices of two separate

   possibilities (address space size, call insn to use):

   small: addresses use 24 bits, use bl to make calls

   medium: addresses use 32 bits, use bl to make calls (*1)

   large: addresses use 32 bits, use seth/add3/jl to make calls (*2)

   The fourth is "addresses use 24 bits, use seth/add3/jl to make calls" but

   using this one doesn't make much sense.

   (*1) The linker may eventually be able to relax seth/add3 -> ld24.

   (*2) The linker may eventually be able to relax seth/add3/jl -> bl.

   Internally these are recorded as TARGET_ADDR{24,32} and

   TARGET_CALL{26,32}.

   The __model__ attribute can be used to select the code model to use when

   accessing particular objects.  */

enum m32r_model { M32R_MODEL_SMALL, M32R_MODEL_MEDIUM, M32R_MODEL_LARGE };

extern enum m32r_model m32r_model;

#define TARGET_MODEL_SMALL  (m32r_model == M32R_MODEL_SMALL)

#define TARGET_MODEL_MEDIUM (m32r_model == M32R_MODEL_MEDIUM)

#define TARGET_MODEL_LARGE  (m32r_model == M32R_MODEL_LARGE)

#define TARGET_ADDR24       (m32r_model == M32R_MODEL_SMALL)

#define TARGET_ADDR32       (! TARGET_ADDR24)

#define TARGET_CALL26       (! TARGET_CALL32)

#define TARGET_CALL32       (m32r_model == M32R_MODEL_LARGE)

/* The default is the small model.  */

#ifndef M32R_MODEL_DEFAULT

#define M32R_MODEL_DEFAULT M32R_MODEL_SMALL

#endif

/* Small Data Area

   The SDA consists of sections .sdata, .sbss, and .scommon.

   .scommon isn't a real section, symbols in it have their section index

   set to SHN_M32R_SCOMMON, though support for it exists in the linker script.

   Two switches control the SDA:

   -G NNN        - specifies the maximum size of variable to go in the SDA

   -msdata=foo   - specifies how such variables are handled

        -msdata=none  - small data area is disabled

        -msdata=sdata - small data goes in the SDA, special code isn't

                        generated to use it, and special relocs aren't

                        generated

        -msdata=use   - small data goes in the SDA, special code is generated

                        to use the SDA and special relocs are generated

   The SDA is not multilib'd, it isn't necessary.

   MULTILIB_EXTRA_OPTS is set in tmake_file to -msdata=sdata so multilib'd

   libraries have small data in .sdata/SHN_M32R_SCOMMON so programs that use

   -msdata=use will successfully link with them (references in header files

   will cause the compiler to emit code that refers to library objects in

   .data).  ??? There can be a problem if the user passes a -G value greater

   than the default and a library object in a header file is that size.

   The default is 8 so this should be rare - if it occurs the user

   is required to rebuild the libraries or use a smaller value for -G.  */

/* Maximum size of variables that go in .sdata/.sbss.

   The -msdata=foo switch also controls how small variables are handled.  */

#ifndef SDATA_DEFAULT_SIZE

#define SDATA_DEFAULT_SIZE 8

#endif

enum m32r_sdata { M32R_SDATA_NONE, M32R_SDATA_SDATA, M32R_SDATA_USE };

extern enum m32r_sdata m32r_sdata;

#define TARGET_SDATA_NONE  (m32r_sdata == M32R_SDATA_NONE)

#define TARGET_SDATA_SDATA (m32r_sdata == M32R_SDATA_SDATA)

#define TARGET_SDATA_USE   (m32r_sdata == M32R_SDATA_USE)

/* Default is to disable the SDA

   [for upward compatibility with previous toolchains].  */

#ifndef M32R_SDATA_DEFAULT

#define M32R_SDATA_DEFAULT M32R_SDATA_NONE

#endif

/* Define this macro as a C expression for the initializer of an array of

   strings to tell the driver program which options are defaults for this

   target and thus do not need to be handled specially when using

   `MULTILIB_OPTIONS'.  */

#ifndef SUBTARGET_MULTILIB_DEFAULTS

#define SUBTARGET_MULTILIB_DEFAULTS

#endif

#ifndef MULTILIB_DEFAULTS

#define MULTILIB_DEFAULTS { "mmodel=small" SUBTARGET_MULTILIB_DEFAULTS }

#endif

/* Sometimes certain combinations of command options do not make

   sense on a particular target machine.  You can define a macro

   `OVERRIDE_OPTIONS' to take account of this.  This macro, if

   defined, is executed once just after all the command options have

   been parsed.

   Don't use this macro to turn on various extra optimizations for

   `-O'.  That is what `OPTIMIZATION_OPTIONS' is for.  */

#ifndef SUBTARGET_OVERRIDE_OPTIONS

#define SUBTARGET_OVERRIDE_OPTIONS

#endif

#define OVERRIDE_OPTIONS                        \

  do                                            \

    {                                           \

      /* These need to be done at start up.     \

         It's convenient to do them here.  */   \

      m32r_init ();                             \

      SUBTARGET_OVERRIDE_OPTIONS                \

    }                                           \

  while (0)

#ifndef SUBTARGET_OPTIMIZATION_OPTIONS

#define SUBTARGET_OPTIMIZATION_OPTIONS

#endif

#define OPTIMIZATION_OPTIONS(LEVEL, SIZE)       \

  do                                            \

    {                                           \

      if (LEVEL == 1)                           \

        flag_regmove = TRUE;                    \

                                                \

      if (SIZE)                                 \

        {                                       \

          flag_omit_frame_pointer = TRUE;       \

        }                                       \

                                                \

      SUBTARGET_OPTIMIZATION_OPTIONS            \

    }                                           \

  while (0)

/* Define this macro if debugging can be performed even without a

   frame pointer.  If this macro is defined, GCC will turn on the

   `-fomit-frame-pointer' option whenever `-O' is specified.  */

#define CAN_DEBUG_WITHOUT_FP

/* Target machine storage layout.  */

/* Define this if most significant bit is lowest numbered

   in instructions that operate on numbered bit-fields.  */

#define BITS_BIG_ENDIAN 1

/* Define this if most significant byte of a word is the lowest numbered.  */

#define BYTES_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0)

/* Define this if most significant word of a multiword number is the lowest

   numbered.  */

#define WORDS_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0)

/* Define this macro if WORDS_BIG_ENDIAN is not constant.  This must

   be a constant value with the same meaning as WORDS_BIG_ENDIAN,

   which will be used only when compiling libgcc2.c.  Typically the

   value will be set based on preprocessor defines.  */

/*#define LIBGCC2_WORDS_BIG_ENDIAN 1*/

/* Width of a word, in units (bytes).  */

#define UNITS_PER_WORD 4

/* Define this macro if it is advisable to hold scalars in registers

   in a wider mode than that declared by the program.  In such cases,

   the value is constrained to be within the bounds of the declared

   type, but kept valid in the wider mode.  The signedness of the

   extension may differ from that of the type.  */

#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)     \

  if (GET_MODE_CLASS (MODE) == MODE_INT         \

      && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \

    {                                           \

      (MODE) = SImode;                          \

    }

/* Allocation boundary (in *bits*) for storing arguments in argument list.  */

#define PARM_BOUNDARY 32

/* Boundary (in *bits*) on which stack pointer should be aligned.  */

#define STACK_BOUNDARY 32

/* ALIGN FRAMES on word boundaries */

#define M32R_STACK_ALIGN(LOC) (((LOC) + 3) & ~ 3)

/* Allocation boundary (in *bits*) for the code of a function.  */

#define FUNCTION_BOUNDARY 32

/* Alignment of field after `int : 0' in a structure.  */

#define EMPTY_FIELD_BOUNDARY 32

/* Every structure's size must be a multiple of this.  */

#define STRUCTURE_SIZE_BOUNDARY 8

/* A bit-field declared as `int' forces `int' alignment for the struct.  */

#define PCC_BITFIELD_TYPE_MATTERS 1

/* No data type wants to be aligned rounder than this.  */

#define BIGGEST_ALIGNMENT 32

/* The best alignment to use in cases where we have a choice.  */

#define FASTEST_ALIGNMENT 32

/* Make strings word-aligned so strcpy from constants will be faster.  */

#define CONSTANT_ALIGNMENT(EXP, ALIGN)  \

  ((TREE_CODE (EXP) == STRING_CST       \

    && (ALIGN) < FASTEST_ALIGNMENT)     \

   ? FASTEST_ALIGNMENT : (ALIGN))

/* Make arrays of chars word-aligned for the same reasons.  */

#define DATA_ALIGNMENT(TYPE, ALIGN)                                     \

  (TREE_CODE (TYPE) == ARRAY_TYPE                                       \

   && TYPE_MODE (TREE_TYPE (TYPE)) == QImode                            \

   && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))

/* Set this nonzero if move instructions will actually fail to work

   when given unaligned data.  */

#define STRICT_ALIGNMENT 1

/* Define LAVEL_ALIGN to calculate code length of PNOP at labels.  */

#define LABEL_ALIGN(insn) 2

/* Layout of source language data types.  */

#define SHORT_TYPE_SIZE         16

#define INT_TYPE_SIZE           32

#define LONG_TYPE_SIZE          32

#define LONG_LONG_TYPE_SIZE     64

#define FLOAT_TYPE_SIZE         32

#define DOUBLE_TYPE_SIZE        64

#define LONG_DOUBLE_TYPE_SIZE   64

/* Define this as 1 if `char' should by default be signed; else as 0.  */

#define DEFAULT_SIGNED_CHAR 1

#define SIZE_TYPE "long unsigned int"

#define PTRDIFF_TYPE "long int"

#define WCHAR_TYPE "short unsigned int"

#define WCHAR_TYPE_SIZE 16

/* Standard register usage.  */

/* Number of actual hardware registers.

   The hardware registers are assigned numbers for the compiler

   from 0 to just below FIRST_PSEUDO_REGISTER.

   All registers that the compiler knows about must be given numbers,

   even those that are not normally considered general registers.  */

#define M32R_NUM_REGISTERS      19

#ifndef SUBTARGET_NUM_REGISTERS

#define SUBTARGET_NUM_REGISTERS 0

#endif

#define FIRST_PSEUDO_REGISTER (M32R_NUM_REGISTERS + SUBTARGET_NUM_REGISTERS)

/* 1 for registers that have pervasive standard uses

   and are not available for the register allocator.

   0-3   - arguments/results

   4-5   - call used [4 is used as a tmp during prologue/epilogue generation]

   6     - call used, gptmp

   7     - call used, static chain pointer

   8-11  - call saved

   12    - call saved [reserved for global pointer]

   13    - frame pointer

   14    - subroutine link register

   15    - stack pointer

   16    - arg pointer

   17    - carry flag

   18    - accumulator

   19    - accumulator 1 in the m32r/x

   By default, the extension registers are not available.  */

#ifndef SUBTARGET_FIXED_REGISTERS

#define SUBTARGET_FIXED_REGISTERS

#endif

#define FIXED_REGISTERS         \

{                               \

  0, 0, 0, 0, 0, 0, 0, 0,       \

  0, 0, 0, 0, 0, 0, 0, 1,       \

  1, 1, 1                       \

  SUBTARGET_FIXED_REGISTERS     \

}

/* 1 for registers not available across function calls.

   These must include the FIXED_REGISTERS and also any

   registers that can be used without being saved.

   The latter must include the registers where values are returned

   and the register where structure-value addresses are passed.

   Aside from that, you can include as many other registers as you like.  */

#ifndef SUBTARGET_CALL_USED_REGISTERS

#define SUBTARGET_CALL_USED_REGISTERS

#endif

#define CALL_USED_REGISTERS     \

{                               \

  1, 1, 1, 1, 1, 1, 1, 1,       \

  0, 0, 0, 0, 0, 0, 1, 1,       \

  1, 1, 1                       \

  SUBTARGET_CALL_USED_REGISTERS \

}

#define CALL_REALLY_USED_REGISTERS CALL_USED_REGISTERS

/* Zero or more C statements that may conditionally modify two variables

   `fixed_regs' and `call_used_regs' (both of type `char []') after they

   have been initialized from the two preceding macros.

   This is necessary in case the fixed or call-clobbered registers depend

   on target flags.

   You need not define this macro if it has no work to do.  */

#ifdef SUBTARGET_CONDITIONAL_REGISTER_USAGE

#define CONDITIONAL_REGISTER_USAGE SUBTARGET_CONDITIONAL_REGISTER_USAGE

#else

#define CONDITIONAL_REGISTER_USAGE                       \

  do                                                     \

    {                                                    \

      if (flag_pic)                                      \

       {                                                 \

         fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;        \

         call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;    \

       }                                                 \

    }                                                    \

  while (0)

#endif

/* If defined, an initializer for a vector of integers, containing the

   numbers of hard registers in the order in which GCC should

   prefer to use them (from most preferred to least).  */

#ifndef SUBTARGET_REG_ALLOC_ORDER

#define SUBTARGET_REG_ALLOC_ORDER

#endif

#if 1 /* Better for int code.  */

#define REG_ALLOC_ORDER                         \

{                                               \

  4,  5,  6,  7,  2,  3,  8,  9, 10,            \

  11, 12, 13, 14,  0,  1, 15, 16, 17, 18        \

  SUBTARGET_REG_ALLOC_ORDER                     \

}

#else /* Better for fp code at expense of int code.  */

#define REG_ALLOC_ORDER                         \

{                                               \

   0,  1,  2,  3,  4,  5,  6,  7,  8,           \

   9, 10, 11, 12, 13, 14, 15, 16, 17, 18        \

  SUBTARGET_REG_ALLOC_ORDER                     \

}

#endif

/* Return number of consecutive hard regs needed starting at reg REGNO

   to hold something of mode MODE.

   This is ordinarily the length in words of a value of mode MODE

   but can be less for certain modes in special long registers.  */

#define HARD_REGNO_NREGS(REGNO, MODE) \

  ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.  */

extern const unsigned int m32r_hard_regno_mode_ok[FIRST_PSEUDO_REGISTER];

extern unsigned int m32r_mode_class[];

#define HARD_REGNO_MODE_OK(REGNO, MODE) \

  ((m32r_hard_regno_mode_ok[REGNO] & m32r_mode_class[MODE]) != 0)

/* A C expression that is nonzero if it is desirable to choose

   register allocation so as to avoid move instructions between a

   value of mode MODE1 and a value of mode MODE2.

   If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R,

   MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1,

   MODE2)' must be zero.  */

/* Tie QI/HI/SI modes together.  */

#define MODES_TIEABLE_P(MODE1, MODE2)           \

  (   GET_MODE_CLASS (MODE1) == MODE_INT        \

   && GET_MODE_CLASS (MODE2) == MODE_INT        \

   && GET_MODE_SIZE (MODE1) <= UNITS_PER_WORD   \

   && GET_MODE_SIZE (MODE2) <= UNITS_PER_WORD)

#define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \

  m32r_hard_regno_rename_ok (OLD_REG, NEW_REG)

/* Register classes and constants.  */

/* Define the classes of registers for register constraints in the

   machine description.  Also define ranges of constants.

   One of the classes must always be named ALL_REGS and include all hard regs.

   If there is more than one class, another class must be named NO_REGS

   and contain no registers.

   The name GENERAL_REGS must be the name of a class (or an alias for

   another name such as ALL_REGS).  This is the class of registers

   that is allowed by "g" or "r" in a register constraint.

   Also, registers outside this class are allocated only when

   instructions express preferences for them.

   The classes must be numbered in nondecreasing order; that is,

   a larger-numbered class must never be contained completely

   in a smaller-numbered class.

   For any two classes, it is very desirable that there be another

   class that represents their union.

   It is important that any condition codes have class NO_REGS.

   See `register_operand'.  */

enum reg_class

{

  NO_REGS, CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES

};

#define N_REG_CLASSES ((int) LIM_REG_CLASSES)

/* Give names of register classes as strings for dump file.  */

#define REG_CLASS_NAMES \

  { "NO_REGS", "CARRY_REG", "ACCUM_REGS", "GENERAL_REGS", "ALL_REGS" }

/* Define which registers fit in which classes.

   This is an initializer for a vector of HARD_REG_SET

   of length N_REG_CLASSES.  */

#ifndef SUBTARGET_REG_CLASS_CARRY

#define SUBTARGET_REG_CLASS_CARRY 0

#endif

#ifndef SUBTARGET_REG_CLASS_ACCUM

#define SUBTARGET_REG_CLASS_ACCUM 0

#endif

#ifndef SUBTARGET_REG_CLASS_GENERAL

#define SUBTARGET_REG_CLASS_GENERAL 0

#endif

#ifndef SUBTARGET_REG_CLASS_ALL

#define SUBTARGET_REG_CLASS_ALL 0

#endif

#define REG_CLASS_CONTENTS                                              \

{                                                                       \

  { 0x00000 },                                                          \

  { 0x20000 | SUBTARGET_REG_CLASS_CARRY },                              \

  { 0x40000 | SUBTARGET_REG_CLASS_ACCUM },                              \

  { 0x1ffff | SUBTARGET_REG_CLASS_GENERAL },                            \

  { 0x7ffff | SUBTARGET_REG_CLASS_ALL },                                \

}

/* The same information, inverted:

   Return the class number of the smallest class containing

   reg number REGNO.  This could be a conditional expression

   or could index an array.  */

extern enum reg_class m32r_regno_reg_class[FIRST_PSEUDO_REGISTER];

#define REGNO_REG_CLASS(REGNO) (m32r_regno_reg_class[REGNO])

/* The class value for index registers, and the one for base regs.  */

#define INDEX_REG_CLASS GENERAL_REGS

#define BASE_REG_CLASS GENERAL_REGS

#define REG_CLASS_FROM_LETTER(C)                        \

  (  (C) == 'c' ? CARRY_REG                             \

   : (C) == 'a' ? ACCUM_REGS                            \

   :              NO_REGS)

/* These assume that REGNO is a hard or pseudo reg number.

   They give nonzero only if REGNO is a hard reg of the suitable class

   or a pseudo reg currently allocated to a suitable hard reg.

   Since they use reg_renumber, they are safe only once reg_renumber

   has been allocated, which happens in local-alloc.c.  */

#define REGNO_OK_FOR_BASE_P(REGNO) \

  ((REGNO) < FIRST_PSEUDO_REGISTER                      \

   ? GPR_P (REGNO) || (REGNO) == ARG_POINTER_REGNUM     \

   : GPR_P (reg_renumber[REGNO]))

#define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO)

/* Given an rtx X being reloaded into a reg required to be

   in class CLASS, return the class of reg to actually use.

   In general this is just CLASS; but on some machines

   in some cases it is preferable to use a more restrictive class.  */

#define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)

/* Return the maximum number of consecutive registers

   needed to represent mode MODE in a register of class CLASS.  */

#define CLASS_MAX_NREGS(CLASS, MODE) \

  ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

/* The letters I, J, K, L, M, N, O, P in a register constraint string

   can be used to stand for particular ranges of immediate operands.

   This macro defines what the ranges are.

   C is the letter, and VALUE is a constant value.

   Return 1 if VALUE is in the range specified by C.  */

/* 'I' is used for 8 bit signed immediates.

   'J' is used for 16 bit signed immediates.

   'K' is used for 16 bit unsigned immediates.

   'L' is used for 16 bit immediates left shifted by 16 (sign ???).

   'M' is used for 24 bit unsigned immediates.

   'N' is used for any 32 bit non-symbolic value.

   'O' is used for 5 bit unsigned immediates (shift count).

   'P' is used for 16 bit signed immediates for compares

       (values in the range -32767 to +32768).  */

/* Return true if a value is inside a range.  */

#define IN_RANGE_P(VALUE, LOW, HIGH)                                    \

  (((unsigned HOST_WIDE_INT)((VALUE) - (LOW)))                          \

   <= ((unsigned HOST_WIDE_INT)((HIGH) - (LOW))))

/* Local to this file.  */

#define INT8_P(X)      ((X) >= -   0x80 && (X) <= 0x7f)

#define INT16_P(X)     ((X) >= - 0x8000 && (X) <= 0x7fff)

#define CMP_INT16_P(X) ((X) >= - 0x7fff && (X) <= 0x8000)

#define UPPER16_P(X)  (((X) & 0xffff) == 0                              \

                        && ((X) >> 16) >= - 0x8000                      \

                        && ((X) >> 16) <= 0x7fff)

#define UINT16_P(X)   (((unsigned HOST_WIDE_INT) (X)) <= 0x0000ffff)

#define UINT24_P(X)   (((unsigned HOST_WIDE_INT) (X)) <= 0x00ffffff)

#define UINT32_P(X)   (((unsigned HOST_WIDE_INT) (X)) <= 0xffffffff)

#define UINT5_P(X)    ((X) >= 0 && (X) < 32)

#define INVERTED_SIGNED_8BIT(VAL) ((VAL) >= -127 && (VAL) <= 128)

#define CONST_OK_FOR_LETTER_P(VALUE, C)                                 \

  (  (C) == 'I' ? INT8_P (VALUE)                                        \

   : (C) == 'J' ? INT16_P (VALUE)                                       \

   : (C) == 'K' ? UINT16_P (VALUE)                                      \

   : (C) == 'L' ? UPPER16_P (VALUE)                                     \

   : (C) == 'M' ? UINT24_P (VALUE)                                      \

   : (C) == 'N' ? INVERTED_SIGNED_8BIT (VALUE)                          \

   : (C) == 'O' ? UINT5_P (VALUE)                                       \

   : (C) == 'P' ? CMP_INT16_P (VALUE)                                   \

   : 0)

/* Similar, but for floating constants, and defining letters G and H.

   Here VALUE is the CONST_DOUBLE rtx itself.

   For the m32r, handle a few constants inline.

   ??? We needn't treat DI and DF modes differently, but for now we do.  */

#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)                          \

  (  (C) == 'G' ? easy_di_const (VALUE)                                 \

   : (C) == 'H' ? easy_df_const (VALUE)                                 \

   : 0)

/* A C expression that defines the optional machine-dependent constraint

   letters that can be used to segregate specific types of operands,

   usually memory references, for the target machine.  It should return 1 if

   VALUE corresponds to the operand type represented by the constraint letter

   C.  If C is not defined as an extra constraint, the value returned should

   be 0 regardless of VALUE.  */

/* Q is for symbolic addresses loadable with ld24.

   R is for symbolic addresses when ld24 can't be used.

   S is for stores with pre {inc,dec}rement

   T is for indirect of a pointer.

   U is for loads with post increment.  */

#define EXTRA_CONSTRAINT(VALUE, C)                                      \

  (  (C) == 'Q' ? ((TARGET_ADDR24 && GET_CODE (VALUE) == LABEL_REF)     \

                 || addr24_operand (VALUE, VOIDmode))                   \

   : (C) == 'R' ? ((TARGET_ADDR32 && GET_CODE (VALUE) == LABEL_REF)     \

                 || addr32_operand (VALUE, VOIDmode))                   \

   : (C) == 'S' ? (GET_CODE (VALUE) == MEM                              \

                 && STORE_PREINC_PREDEC_P (GET_MODE (VALUE),            \

                                           XEXP (VALUE, 0)))            \

   : (C) == 'T' ? (GET_CODE (VALUE) == MEM                              \

                 && memreg_operand (VALUE, GET_MODE (VALUE)))           \

   : (C) == 'U' ? (GET_CODE (VALUE) == MEM                              \

                 && LOAD_POSTINC_P (GET_MODE (VALUE),                   \

                                    XEXP (VALUE, 0)))                   \

   : 0)

/* Stack layout and stack pointer usage.  */

/* Define this macro if pushing a word onto the stack moves the stack

   pointer to a smaller address.  */

#define STACK_GROWS_DOWNWARD

/* Offset from frame pointer to start allocating local variables at.

   If FRAME_GROWS_DOWNWARD, this is the offset to the END of the

   first local allocated.  Otherwise, it is the offset to the BEGINNING

   of the first local allocated.  */

/* The frame pointer points at the same place as the stack pointer, except if

   alloca has been called.  */

#define STARTING_FRAME_OFFSET \

  M32R_STACK_ALIGN (current_function_outgoing_args_size)

/* Offset from the stack pointer register to the first location at which

   outgoing arguments are placed.  */

#define STACK_POINTER_OFFSET 0

/* Offset of first parameter from the argument pointer register value.  */

#define FIRST_PARM_OFFSET(FNDECL) 0

/* Register to use for pushing function arguments.  */

#define STACK_POINTER_REGNUM 15

/* Base register for access to local variables of the function.  */

#define FRAME_POINTER_REGNUM 13

/* Base register for access to arguments of the function.  */

#define ARG_POINTER_REGNUM 16

/* Register in which static-chain is passed to a function.

   This must not be a register used by the prologue.  */

#define STATIC_CHAIN_REGNUM  7

/* These aren't official macros.  */

#define PROLOGUE_TMP_REGNUM  4

#define RETURN_ADDR_REGNUM  14

/* #define GP_REGNUM        12 */

#define CARRY_REGNUM        17

#define ACCUM_REGNUM        18

#define M32R_MAX_INT_REGS   16

#ifndef SUBTARGET_GPR_P

#define SUBTARGET_GPR_P(REGNO) 0

#endif

#ifndef SUBTARGET_ACCUM_P

#define SUBTARGET_ACCUM_P(REGNO) 0

#endif

#ifndef SUBTARGET_CARRY_P

#define SUBTARGET_CARRY_P(REGNO) 0

#endif

#define GPR_P(REGNO)   (IN_RANGE_P ((REGNO), 0, 15) || SUBTARGET_GPR_P (REGNO))

#define ACCUM_P(REGNO) ((REGNO) == ACCUM_REGNUM || SUBTARGET_ACCUM_P (REGNO))

#define CARRY_P(REGNO) ((REGNO) == CARRY_REGNUM || SUBTARGET_CARRY_P (REGNO))

/* Eliminating the frame and arg pointers.  */

/* A C expression which is nonzero if a function must have and use a

   frame pointer.  This expression is evaluated in the reload pass.

   If its value is nonzero the function will have a frame pointer.  */

#define FRAME_POINTER_REQUIRED current_function_calls_alloca

#if 0

/* C statement to store the difference between the frame pointer

   and the stack pointer values immediately after the function prologue.

   If `ELIMINABLE_REGS' is defined, this macro will be not be used and

   need not be defined.  */

#define INITIAL_FRAME_POINTER_OFFSET(VAR) \

((VAR) = m32r_compute_frame_size (get_frame_size ()))

#endif

/* If defined, this macro specifies a table of register pairs used to

   eliminate unneeded registers that point into the stack frame.  If

   it is not defined, the only elimination attempted by the compiler

   is to replace references to the frame pointer with references to

   the stack pointer.

   Note that the elimination of the argument pointer with the stack

   pointer is specified first since that is the preferred elimination.  */

#define ELIMINABLE_REGS                                 \

{{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM },        \

 { ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM },        \

 { ARG_POINTER_REGNUM,   FRAME_POINTER_REGNUM }}

/* A C expression that returns nonzero if the compiler is allowed to

   try to replace register number FROM-REG with register number

   TO-REG.  This macro need only be defined if `ELIMINABLE_REGS' is

   defined, and will usually be the constant 1, since most of the

   cases preventing register elimination are things that the compiler

   already knows about.  */

#define CAN_ELIMINATE(FROM, TO)                                         \

  ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM         \

   ? ! frame_pointer_needed                                             \

   : 1)

/* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'.  It

   specifies the initial difference between the specified pair of

   registers.  This macro must be defined if `ELIMINABLE_REGS' is

   defined.  */

#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                            \