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[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [config/] [mcore/] [mcore.h] - Blame information for rev 816

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/* Definitions of target machine for GNU compiler,
2
   for Motorola M*CORE Processor.
3
   Copyright (C) 1993, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
4
   Free Software Foundation, Inc.
5
 
6
   This file is part of GCC.
7
 
8
   GCC is free software; you can redistribute it and/or modify it
9
   under the terms of the GNU General Public License as published
10
   by the Free Software Foundation; either version 3, or (at your
11
   option) any later version.
12
 
13
   GCC is distributed in the hope that it will be useful, but WITHOUT
14
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
16
   License for more details.
17
 
18
   You should have received a copy of the GNU General Public License
19
   along with GCC; see the file COPYING3.  If not see
20
   <http://www.gnu.org/licenses/>.  */
21
 
22
#ifndef GCC_MCORE_H
23
#define GCC_MCORE_H
24
 
25
/* RBE: need to move these elsewhere.  */
26
#undef  LIKE_PPC_ABI 
27
#define MCORE_STRUCT_ARGS
28
/* RBE: end of "move elsewhere".  */
29
 
30
/* Run-time Target Specification.  */
31
#define TARGET_MCORE
32
 
33
/* Get tree.c to declare a target-specific specialization of
34
   merge_decl_attributes.  */
35
#define TARGET_DLLIMPORT_DECL_ATTRIBUTES 1
36
 
37
#define TARGET_CPU_CPP_BUILTINS()                                         \
38
  do                                                                      \
39
    {                                                                     \
40
      builtin_define ("__mcore__");                                       \
41
      builtin_define ("__MCORE__");                                       \
42
      if (TARGET_LITTLE_END)                                              \
43
        builtin_define ("__MCORELE__");                                   \
44
      else                                                                \
45
        builtin_define ("__MCOREBE__");                                   \
46
      if (TARGET_M340)                                                    \
47
        builtin_define ("__M340__");                                      \
48
      else                                                                \
49
        builtin_define ("__M210__");                                      \
50
    }                                                                     \
51
  while (0)
52
 
53
/* If -m4align is ever re-enabled then add this line to the definition of CPP_SPEC
54
   %{!m4align:-D__MCORE_ALIGN_8__} %{m4align:-D__MCORE__ALIGN_4__}.  */
55
#undef  CPP_SPEC
56
#define CPP_SPEC "%{m210:%{mlittle-endian:%ethe m210 does not have little endian support}}"
57
 
58
/* We don't have a -lg library, so don't put it in the list.  */
59
#undef  LIB_SPEC
60
#define LIB_SPEC "%{!shared: %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}}"
61
 
62
#undef  ASM_SPEC
63
#define ASM_SPEC "%{mbig-endian:-EB} %{m210:-cpu=210 -EB}"
64
 
65
#undef  LINK_SPEC
66
#define LINK_SPEC "%{mbig-endian:-EB} %{m210:-EB} -X"
67
 
68
#define TARGET_DEFAULT  \
69
  (MASK_HARDLIT         \
70
   | MASK_8ALIGN        \
71
   | MASK_DIV           \
72
   | MASK_RELAX_IMM     \
73
   | MASK_M340          \
74
   | MASK_LITTLE_END)
75
 
76
#ifndef MULTILIB_DEFAULTS
77
#define MULTILIB_DEFAULTS { "mlittle-endian", "m340" }
78
#endif
79
 
80
/* The ability to have 4 byte alignment is being suppressed for now.
81
   If this ability is reenabled, you must disable the definition below
82
   *and* edit t-mcore to enable multilibs for 4 byte alignment code.  */
83
#undef TARGET_8ALIGN
84
#define TARGET_8ALIGN 1
85
 
86
extern char * mcore_current_function_name;
87
 
88
/* The MCore ABI says that bitfields are unsigned by default.  */
89
#define CC1_SPEC "-funsigned-bitfields"
90
 
91
/* What options are we going to default to specific settings when
92
   -O* happens; the user can subsequently override these settings.
93
 
94
   Omitting the frame pointer is a very good idea on the MCore.
95
   Scheduling isn't worth anything on the current MCore implementation.  */
96
#define OPTIMIZATION_OPTIONS(LEVEL,SIZE)        \
97
{                                               \
98
  if (LEVEL)                                    \
99
    {                                           \
100
      flag_no_function_cse = 1;                 \
101
      flag_omit_frame_pointer = 1;              \
102
                                                \
103
      if (LEVEL >= 2)                           \
104
        {                                       \
105
          flag_caller_saves = 0;         \
106
          flag_schedule_insns = 0;               \
107
          flag_schedule_insns_after_reload = 0;  \
108
        }                                       \
109
    }                                           \
110
  if (SIZE)                                     \
111
    {                                           \
112
      target_flags &= ~MASK_HARDLIT;            \
113
    }                                           \
114
}
115
 
116
/* What options are we going to force to specific settings,
117
   regardless of what the user thought he wanted.
118
   We also use this for some post-processing of options.  */
119
#define OVERRIDE_OPTIONS  mcore_override_options ()
120
 
121
/* Target machine storage Layout.  */
122
 
123
#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE)       \
124
  if (GET_MODE_CLASS (MODE) == MODE_INT         \
125
      && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
126
    {                                           \
127
      (MODE) = SImode;                          \
128
      (UNSIGNEDP) = 1;                          \
129
    }
130
 
131
/* Define this if most significant bit is lowest numbered
132
   in instructions that operate on numbered bit-fields.  */
133
#define BITS_BIG_ENDIAN  0
134
 
135
/* Define this if most significant byte of a word is the lowest numbered.  */
136
#define BYTES_BIG_ENDIAN (! TARGET_LITTLE_END)
137
 
138
/* Define this if most significant word of a multiword number is the lowest
139
   numbered.  */
140
#define WORDS_BIG_ENDIAN (! TARGET_LITTLE_END)
141
 
142
#define LIBGCC2_WORDS_BIG_ENDIAN 1
143
#ifdef __MCORELE__
144
#undef  LIBGCC2_WORDS_BIG_ENDIAN
145
#define LIBGCC2_WORDS_BIG_ENDIAN 0
146
#endif
147
 
148
#define MAX_BITS_PER_WORD 32
149
 
150
/* Width of a word, in units (bytes).  */
151
#define UNITS_PER_WORD  4
152
 
153
/* A C expression for the size in bits of the type `long long' on the
154
   target machine.  If you don't define this, the default is two
155
   words.  */
156
#define LONG_LONG_TYPE_SIZE 64
157
 
158
/* Allocation boundary (in *bits*) for storing arguments in argument list.  */
159
#define PARM_BOUNDARY   32
160
 
161
/* Doubles must be aligned to an 8 byte boundary.  */
162
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
163
  ((MODE != BLKmode && (GET_MODE_SIZE (MODE) == 8)) \
164
   ? BIGGEST_ALIGNMENT : PARM_BOUNDARY)
165
 
166
/* Boundary (in *bits*) on which stack pointer should be aligned.  */
167
#define STACK_BOUNDARY  (TARGET_8ALIGN ? 64 : 32)
168
 
169
/* Largest increment in UNITS we allow the stack to grow in a single operation.  */
170
extern int mcore_stack_increment;
171
#define STACK_UNITS_MAXSTEP  4096
172
 
173
/* Allocation boundary (in *bits*) for the code of a function.  */
174
#define FUNCTION_BOUNDARY  ((TARGET_OVERALIGN_FUNC) ? 32 : 16)
175
 
176
/* Alignment of field after `int : 0' in a structure.  */
177
#define EMPTY_FIELD_BOUNDARY  32
178
 
179
/* No data type wants to be aligned rounder than this.  */
180
#define BIGGEST_ALIGNMENT  (TARGET_8ALIGN ? 64 : 32)
181
 
182
/* The best alignment to use in cases where we have a choice.  */
183
#define FASTEST_ALIGNMENT 32
184
 
185
/* Every structures size must be a multiple of 8 bits.  */
186
#define STRUCTURE_SIZE_BOUNDARY 8
187
 
188
/* Look at the fundamental type that is used for a bit-field and use
189
   that to impose alignment on the enclosing structure.
190
   struct s {int a:8}; should have same alignment as "int", not "char".  */
191
#define PCC_BITFIELD_TYPE_MATTERS       1
192
 
193
/* Largest integer machine mode for structures.  If undefined, the default
194
   is GET_MODE_SIZE(DImode).  */
195
#define MAX_FIXED_MODE_SIZE 32
196
 
197
/* Make strings word-aligned so strcpy from constants will be faster.  */
198
#define CONSTANT_ALIGNMENT(EXP, ALIGN)  \
199
  ((TREE_CODE (EXP) == STRING_CST       \
200
    && (ALIGN) < FASTEST_ALIGNMENT)     \
201
   ? FASTEST_ALIGNMENT : (ALIGN))
202
 
203
/* Make arrays of chars word-aligned for the same reasons.  */
204
#define DATA_ALIGNMENT(TYPE, ALIGN)             \
205
  (TREE_CODE (TYPE) == ARRAY_TYPE               \
206
   && TYPE_MODE (TREE_TYPE (TYPE)) == QImode    \
207
   && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
208
 
209
/* Set this nonzero if move instructions will actually fail to work
210
   when given unaligned data.  */
211
#define STRICT_ALIGNMENT 1
212
 
213
/* Standard register usage.  */
214
 
215
/* Register allocation for our first guess
216
 
217
        r0              stack pointer
218
        r1              scratch, target reg for xtrb?
219
        r2-r7           arguments.
220
        r8-r14          call saved
221
        r15             link register
222
        ap              arg pointer (doesn't really exist, always eliminated)
223
        c               c bit
224
        fp              frame pointer (doesn't really exist, always eliminated)
225
        x19             two control registers.  */
226
 
227
/* Number of actual hardware registers.
228
   The hardware registers are assigned numbers for the compiler
229
   from 0 to just below FIRST_PSEUDO_REGISTER.
230
   All registers that the compiler knows about must be given numbers,
231
   even those that are not normally considered general registers.
232
 
233
   MCore has 16 integer registers and 2 control registers + the arg
234
   pointer.  */
235
 
236
#define FIRST_PSEUDO_REGISTER 20
237
 
238
#define R1_REG  1       /* Where literals are forced.  */
239
#define LK_REG  15      /* Overloaded on general register.  */
240
#define AP_REG  16      /* Fake arg pointer register.  */
241
/* RBE: mcore.md depends on CC_REG being set to 17.  */
242
#define CC_REG  17      /* Can't name it C_REG.  */
243
#define FP_REG  18      /* Fake frame pointer register.  */
244
 
245
/* Specify the registers used for certain standard purposes.
246
   The values of these macros are register numbers.  */
247
 
248
 
249
#undef PC_REGNUM /* Define this if the program counter is overloaded on a register.  */
250
#define STACK_POINTER_REGNUM 0 /* Register to use for pushing function arguments.  */
251
#define FRAME_POINTER_REGNUM 8 /* When we need FP, use r8.  */
252
 
253
/* The assembler's names for the registers.  RFP need not always be used as
254
   the Real framepointer; it can also be used as a normal general register.
255
   Note that the name `fp' is horribly misleading since `fp' is in fact only
256
   the argument-and-return-context pointer.  */
257
#define REGISTER_NAMES                                  \
258
{                                                       \
259
  "sp", "r1", "r2",  "r3",  "r4",  "r5",  "r6",  "r7",  \
260
  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
261
  "apvirtual",  "c", "fpvirtual", "x19" \
262
}
263
 
264
/* 1 for registers that have pervasive standard uses
265
   and are not available for the register allocator.  */
266
#define FIXED_REGISTERS  \
267
 /*  r0  r1  r2  r3  r4  r5  r6  r7  r8  r9  r10 r11 r12 r13 r14 r15 ap  c  fp x19 */ \
268
   { 1,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  1,  1, 1, 1}
269
 
270
/* 1 for registers not available across function calls.
271
   These must include the FIXED_REGISTERS and also any
272
   registers that can be used without being saved.
273
   The latter must include the registers where values are returned
274
   and the register where structure-value addresses are passed.
275
   Aside from that, you can include as many other registers as you like.  */
276
 
277
/* RBE: r15 {link register} not available across calls,
278
   But we don't mark it that way here....  */
279
#define CALL_USED_REGISTERS \
280
 /*  r0  r1  r2  r3  r4  r5  r6  r7  r8  r9  r10 r11 r12 r13 r14 r15 ap  c   fp x19 */ \
281
   { 1,  1,  1,  1,  1,  1,  1,  1,  0,  0,  0,  0,  0,  0,  0,  0,  1,  1,  1, 1}
282
 
283
/* The order in which register should be allocated.  */
284
#define REG_ALLOC_ORDER  \
285
 /* r7  r6  r5  r4  r3  r2  r15 r14 r13 r12 r11 r10  r9  r8  r1  r0  ap  c   fp x19*/ \
286
  {  7,  6,  5,  4,  3,  2,  15, 14, 13, 12, 11, 10,  9,  8,  1,  0, 16, 17, 18, 19}
287
 
288
/* Return number of consecutive hard regs needed starting at reg REGNO
289
   to hold something of mode MODE.
290
   This is ordinarily the length in words of a value of mode MODE
291
   but can be less for certain modes in special long registers.
292
 
293
   On the MCore regs are UNITS_PER_WORD bits wide; */
294
#define HARD_REGNO_NREGS(REGNO, MODE)  \
295
   (((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
296
 
297
/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
298
   We may keep double values in even registers.  */
299
#define HARD_REGNO_MODE_OK(REGNO, MODE)  \
300
  ((TARGET_8ALIGN && GET_MODE_SIZE (MODE) > UNITS_PER_WORD) ? (((REGNO) & 1) == 0) : (REGNO < 18))
301
 
302
/* Value is 1 if it is a good idea to tie two pseudo registers
303
   when one has mode MODE1 and one has mode MODE2.
304
   If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
305
   for any hard reg, then this must be 0 for correct output.  */
306
#define MODES_TIEABLE_P(MODE1, MODE2) \
307
  ((MODE1) == (MODE2) || GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
308
 
309
/* Value should be nonzero if functions must have frame pointers.
310
   Zero means the frame pointer need not be set up (and parms may be accessed
311
   via the stack pointer) in functions that seem suitable.  */
312
#define FRAME_POINTER_REQUIRED  0
313
 
314
/* Definitions for register eliminations.
315
 
316
   We have two registers that can be eliminated on the MCore.  First, the
317
   frame pointer register can often be eliminated in favor of the stack
318
   pointer register.  Secondly, the argument pointer register can always be
319
   eliminated; it is replaced with either the stack or frame pointer.  */
320
 
321
/* Base register for access to arguments of the function.  */
322
#define ARG_POINTER_REGNUM      16
323
 
324
/* Register in which the static-chain is passed to a function.  */
325
#define STATIC_CHAIN_REGNUM     1
326
 
327
/* This is an array of structures.  Each structure initializes one pair
328
   of eliminable registers.  The "from" register number is given first,
329
   followed by "to".  Eliminations of the same "from" register are listed
330
   in order of preference.  */
331
#define ELIMINABLE_REGS                         \
332
{{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
333
 { ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM}, \
334
 { ARG_POINTER_REGNUM,   FRAME_POINTER_REGNUM},}
335
 
336
/* Given FROM and TO register numbers, say whether this elimination
337
   is allowed.  */
338
#define CAN_ELIMINATE(FROM, TO) \
339
  (!((FROM) == FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED))
340
 
341
/* Define the offset between two registers, one to be eliminated, and the other
342
   its replacement, at the start of a routine.  */
343
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
344
  OFFSET = mcore_initial_elimination_offset (FROM, TO)
345
 
346
/* Define the classes of registers for register constraints in the
347
   machine description.  Also define ranges of constants.
348
 
349
   One of the classes must always be named ALL_REGS and include all hard regs.
350
   If there is more than one class, another class must be named NO_REGS
351
   and contain no registers.
352
 
353
   The name GENERAL_REGS must be the name of a class (or an alias for
354
   another name such as ALL_REGS).  This is the class of registers
355
   that is allowed by "g" or "r" in a register constraint.
356
   Also, registers outside this class are allocated only when
357
   instructions express preferences for them.
358
 
359
   The classes must be numbered in nondecreasing order; that is,
360
   a larger-numbered class must never be contained completely
361
   in a smaller-numbered class.
362
 
363
   For any two classes, it is very desirable that there be another
364
   class that represents their union.  */
365
 
366
/* The MCore has only general registers. There are
367
   also some special purpose registers: the T bit register, the
368
   procedure Link and the Count Registers.  */
369
enum reg_class
370
{
371
  NO_REGS,
372
  ONLYR1_REGS,
373
  LRW_REGS,
374
  GENERAL_REGS,
375
  C_REGS,
376
  ALL_REGS,
377
  LIM_REG_CLASSES
378
};
379
 
380
#define N_REG_CLASSES  (int) LIM_REG_CLASSES
381
 
382
/* Give names of register classes as strings for dump file.  */
383
#define REG_CLASS_NAMES  \
384
{                       \
385
  "NO_REGS",            \
386
  "ONLYR1_REGS",        \
387
  "LRW_REGS",           \
388
  "GENERAL_REGS",       \
389
  "C_REGS",             \
390
  "ALL_REGS",           \
391
}
392
 
393
/* Define which registers fit in which classes.
394
   This is an initializer for a vector of HARD_REG_SET
395
   of length N_REG_CLASSES.  */
396
 
397
/* ??? STACK_POINTER_REGNUM should be excluded from LRW_REGS.  */
398
#define REG_CLASS_CONTENTS              \
399
{                                       \
400
  {0x000000},  /* NO_REGS       */      \
401
  {0x000002},  /* ONLYR1_REGS   */      \
402
  {0x007FFE},  /* LRW_REGS      */      \
403
  {0x01FFFF},  /* GENERAL_REGS  */      \
404
  {0x020000},  /* C_REGS        */      \
405
  {0x0FFFFF}   /* ALL_REGS      */      \
406
}
407
 
408
/* The same information, inverted:
409
   Return the class number of the smallest class containing
410
   reg number REGNO.  This could be a conditional expression
411
   or could index an array.  */
412
 
413
extern const int regno_reg_class[FIRST_PSEUDO_REGISTER];
414
#define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO]
415
 
416
/* When defined, the compiler allows registers explicitly used in the
417
   rtl to be used as spill registers but prevents the compiler from
418
   extending the lifetime of these registers.  */
419
#define SMALL_REGISTER_CLASSES 1
420
 
421
/* The class value for index registers, and the one for base regs.  */
422
#define INDEX_REG_CLASS  NO_REGS
423
#define BASE_REG_CLASS   GENERAL_REGS
424
 
425
/* Get reg_class from a letter such as appears in the machine
426
   description.  */
427
extern const enum reg_class reg_class_from_letter[];
428
 
429
#define REG_CLASS_FROM_LETTER(C) \
430
   (ISLOWER (C) ? reg_class_from_letter[(C) - 'a'] : NO_REGS)
431
 
432
/* The letters I, J, K, L, M, N, O, and P in a register constraint string
433
   can be used to stand for particular ranges of immediate operands.
434
   This macro defines what the ranges are.
435
   C is the letter, and VALUE is a constant value.
436
   Return 1 if VALUE is in the range specified by C.
437
        I: loadable by movi (0..127)
438
        J: arithmetic operand 1..32
439
        K: shift operand 0..31
440
        L: negative arithmetic operand -1..-32
441
        M: powers of two, constants loadable by bgeni
442
        N: powers of two minus 1, constants loadable by bmaski, including -1
443
        O: allowed by cmov with two constants +/- 1 of each other
444
        P: values we will generate 'inline' -- without an 'lrw'
445
 
446
   Others defined for use after reload
447
        Q: constant 1
448
        R: a label
449
        S: 0/1/2 cleared bits out of 32 [for bclri's]
450
        T: 2 set bits out of 32 [for bseti's]
451
        U: constant 0
452
        xxxS: 1 cleared bit out of 32 (complement of power of 2). for bclri
453
        xxxT: 2 cleared bits out of 32. for pairs of bclris.  */
454
#define CONST_OK_FOR_I(VALUE) (((int)(VALUE)) >= 0 && ((int)(VALUE)) <= 0x7f)
455
#define CONST_OK_FOR_J(VALUE) (((int)(VALUE)) >  0 && ((int)(VALUE)) <= 32)
456
#define CONST_OK_FOR_L(VALUE) (((int)(VALUE)) <  0 && ((int)(VALUE)) >= -32)
457
#define CONST_OK_FOR_K(VALUE) (((int)(VALUE)) >= 0 && ((int)(VALUE)) <= 31)
458
#define CONST_OK_FOR_M(VALUE) (exact_log2 (VALUE) >= 0)
459
#define CONST_OK_FOR_N(VALUE) (((int)(VALUE)) == -1 || exact_log2 ((VALUE) + 1) >= 0)
460
#define CONST_OK_FOR_O(VALUE) (CONST_OK_FOR_I(VALUE) || \
461
                               CONST_OK_FOR_M(VALUE) || \
462
                               CONST_OK_FOR_N(VALUE) || \
463
                               CONST_OK_FOR_M((int)(VALUE) - 1) || \
464
                               CONST_OK_FOR_N((int)(VALUE) + 1))
465
 
466
#define CONST_OK_FOR_P(VALUE) (mcore_const_ok_for_inline (VALUE)) 
467
 
468
#define CONST_OK_FOR_LETTER_P(VALUE, C)     \
469
     ((C) == 'I' ? CONST_OK_FOR_I (VALUE)   \
470
    : (C) == 'J' ? CONST_OK_FOR_J (VALUE)   \
471
    : (C) == 'L' ? CONST_OK_FOR_L (VALUE)   \
472
    : (C) == 'K' ? CONST_OK_FOR_K (VALUE)   \
473
    : (C) == 'M' ? CONST_OK_FOR_M (VALUE)   \
474
    : (C) == 'N' ? CONST_OK_FOR_N (VALUE)   \
475
    : (C) == 'P' ? CONST_OK_FOR_P (VALUE)   \
476
    : (C) == 'O' ? CONST_OK_FOR_O (VALUE)   \
477
    : 0)
478
 
479
/* Similar, but for floating constants, and defining letters G and H.
480
   Here VALUE is the CONST_DOUBLE rtx itself.  */
481
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
482
   ((C) == 'G' ? CONST_OK_FOR_I (CONST_DOUBLE_HIGH (VALUE)) \
483
              && CONST_OK_FOR_I (CONST_DOUBLE_LOW (VALUE))  \
484
    : 0)
485
 
486
/* Letters in the range `Q' through `U' in a register constraint string
487
   may be defined in a machine-dependent fashion to stand for arbitrary
488
   operand types.  */
489
#define EXTRA_CONSTRAINT(OP, C)                         \
490
  ((C) == 'R' ? (GET_CODE (OP) == MEM                   \
491
                 && GET_CODE (XEXP (OP, 0)) == LABEL_REF) \
492
   : (C) == 'S' ? (GET_CODE (OP) == CONST_INT \
493
                   && mcore_num_zeros (INTVAL (OP)) <= 2) \
494
   : (C) == 'T' ? (GET_CODE (OP) == CONST_INT \
495
                   && mcore_num_ones (INTVAL (OP)) == 2) \
496
   : (C) == 'Q' ? (GET_CODE (OP) == CONST_INT \
497
                   && INTVAL(OP) == 1) \
498
   : (C) == 'U' ? (GET_CODE (OP) == CONST_INT \
499
                   && INTVAL(OP) == 0) \
500
   : 0)
501
 
502
/* Given an rtx X being reloaded into a reg required to be
503
   in class CLASS, return the class of reg to actually use.
504
   In general this is just CLASS; but on some machines
505
   in some cases it is preferable to use a more restrictive class.  */
506
#define PREFERRED_RELOAD_CLASS(X, CLASS) mcore_reload_class (X, CLASS)
507
 
508
/* Return the register class of a scratch register needed to copy IN into
509
   or out of a register in CLASS in MODE.  If it can be done directly,
510
   NO_REGS is returned.  */
511
#define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
512
  mcore_secondary_reload_class (CLASS, MODE, X)
513
 
514
/* Return the maximum number of consecutive registers
515
   needed to represent mode MODE in a register of class CLASS.
516
 
517
   On MCore this is the size of MODE in words.  */
518
#define CLASS_MAX_NREGS(CLASS, MODE)  \
519
     (ROUND_ADVANCE (GET_MODE_SIZE (MODE)))
520
 
521
/* Stack layout; function entry, exit and calling.  */
522
 
523
/* Define the number of register that can hold parameters.
524
   These two macros are used only in other macro definitions below.  */
525
#define NPARM_REGS 6
526
#define FIRST_PARM_REG 2
527
#define FIRST_RET_REG 2
528
 
529
/* Define this if pushing a word on the stack
530
   makes the stack pointer a smaller address.  */
531
#define STACK_GROWS_DOWNWARD  
532
 
533
/* Offset within stack frame to start allocating local variables at.
534
   If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
535
   first local allocated.  Otherwise, it is the offset to the BEGINNING
536
   of the first local allocated.  */
537
#define STARTING_FRAME_OFFSET  0
538
 
539
/* If defined, the maximum amount of space required for outgoing arguments
540
   will be computed and placed into the variable
541
   `current_function_outgoing_args_size'.  No space will be pushed
542
   onto the stack for each call; instead, the function prologue should
543
   increase the stack frame size by this amount.  */
544
#define ACCUMULATE_OUTGOING_ARGS 1
545
 
546
/* Offset of first parameter from the argument pointer register value.  */
547
#define FIRST_PARM_OFFSET(FNDECL)  0
548
 
549
/* Value is the number of byte of arguments automatically
550
   popped when returning from a subroutine call.
551
   FUNTYPE is the data type of the function (as a tree),
552
   or for a library call it is an identifier node for the subroutine name.
553
   SIZE is the number of bytes of arguments passed on the stack.
554
 
555
   On the MCore, the callee does not pop any of its arguments that were passed
556
   on the stack.  */
557
#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
558
 
559
/* Define how to find the value returned by a function.
560
   VALTYPE is the data type of the value (as a tree).
561
   If the precise function being called is known, FUNC is its FUNCTION_DECL;
562
   otherwise, FUNC is 0.  */
563
#define FUNCTION_VALUE(VALTYPE, FUNC)  mcore_function_value (VALTYPE, FUNC)
564
 
565
/* Don't default to pcc-struct-return, because gcc is the only compiler, and
566
   we want to retain compatibility with older gcc versions.  */
567
#define DEFAULT_PCC_STRUCT_RETURN 0
568
 
569
/* Define how to find the value returned by a library function
570
   assuming the value has mode MODE.  */
571
#define LIBCALL_VALUE(MODE)  gen_rtx_REG (MODE, FIRST_RET_REG)
572
 
573
/* 1 if N is a possible register number for a function value.
574
   On the MCore, only r4 can return results.  */
575
#define FUNCTION_VALUE_REGNO_P(REGNO)  ((REGNO) == FIRST_RET_REG)
576
 
577
/* 1 if N is a possible register number for function argument passing.  */
578
#define FUNCTION_ARG_REGNO_P(REGNO)  \
579
  ((REGNO) >= FIRST_PARM_REG && (REGNO) < (NPARM_REGS + FIRST_PARM_REG))
580
 
581
/* Define a data type for recording info about an argument list
582
   during the scan of that argument list.  This data type should
583
   hold all necessary information about the function itself
584
   and about the args processed so far, enough to enable macros
585
   such as FUNCTION_ARG to determine where the next arg should go.
586
 
587
   On MCore, this is a single integer, which is a number of words
588
   of arguments scanned so far (including the invisible argument,
589
   if any, which holds the structure-value-address).
590
   Thus NARGREGS or more means all following args should go on the stack.  */
591
#define CUMULATIVE_ARGS  int
592
 
593
#define ROUND_ADVANCE(SIZE)     \
594
  ((SIZE + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
595
 
596
/* Round a register number up to a proper boundary for an arg of mode
597
   MODE.
598
 
599
   We round to an even reg for things larger than a word.  */
600
#define ROUND_REG(X, MODE)                              \
601
  ((TARGET_8ALIGN                                       \
602
   && GET_MODE_UNIT_SIZE ((MODE)) > UNITS_PER_WORD)     \
603
   ? ((X) + ((X) & 1)) : (X))
604
 
605
 
606
/* Initialize a variable CUM of type CUMULATIVE_ARGS
607
   for a call to a function whose data type is FNTYPE.
608
   For a library call, FNTYPE is 0.
609
 
610
   On MCore, the offset always starts at 0: the first parm reg is always
611
   the same reg.  */
612
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
613
  ((CUM) = 0)
614
 
615
/* Update the data in CUM to advance over an argument
616
   of mode MODE and data type TYPE.
617
   (TYPE is null for libcalls where that information may not be
618
   available.)  */
619
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)       \
620
 ((CUM) = (ROUND_REG ((CUM), (MODE))                       \
621
           + ((NAMED) * mcore_num_arg_regs (MODE, TYPE)))) \
622
 
623
/* Define where to put the arguments to a function.  */
624
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
625
  mcore_function_arg (CUM, MODE, TYPE, NAMED)
626
 
627
/* Call the function profiler with a given profile label.  */
628
#define FUNCTION_PROFILER(STREAM,LABELNO)               \
629
{                                                       \
630
  fprintf (STREAM, "    trap    1\n");                  \
631
  fprintf (STREAM, "    .align  2\n");                  \
632
  fprintf (STREAM, "    .long   LP%d\n", (LABELNO));    \
633
}
634
 
635
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
636
   the stack pointer does not matter.  The value is tested only in
637
   functions that have frame pointers.
638
   No definition is equivalent to always zero.  */
639
#define EXIT_IGNORE_STACK 0
640
 
641
/* Output assembler code for a block containing the constant parts
642
   of a trampoline, leaving space for the variable parts.
643
 
644
   On the MCore, the trampoline looks like:
645
        lrw     r1,  function
646
        lrw     r13, area
647
        jmp     r13
648
        or      r0, r0
649
    .literals                                                */
650
#define TRAMPOLINE_TEMPLATE(FILE)               \
651
{                                               \
652
  fprintf ((FILE), "    .short  0x7102\n");     \
653
  fprintf ((FILE), "    .short  0x7d02\n");     \
654
  fprintf ((FILE), "    .short  0x00cd\n");     \
655
  fprintf ((FILE), "    .short  0x1e00\n");     \
656
  fprintf ((FILE), "    .long   0\n");           \
657
  fprintf ((FILE), "    .long   0\n");           \
658
}
659
 
660
/* Length in units of the trampoline for entering a nested function.  */
661
#define TRAMPOLINE_SIZE  12
662
 
663
/* Alignment required for a trampoline in bits.  */
664
#define TRAMPOLINE_ALIGNMENT  32
665
 
666
/* Emit RTL insns to initialize the variable parts of a trampoline.
667
   FNADDR is an RTX for the address of the function's pure code.
668
   CXT is an RTX for the static chain value for the function.  */
669
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)  \
670
{                                                                       \
671
  emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)),     \
672
                  (CXT));                                               \
673
  emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)),    \
674
                  (FNADDR));                                            \
675
}
676
 
677
/* Macros to check register numbers against specific register classes.  */
678
 
679
/* These assume that REGNO is a hard or pseudo reg number.
680
   They give nonzero only if REGNO is a hard reg of the suitable class
681
   or a pseudo reg currently allocated to a suitable hard reg.
682
   Since they use reg_renumber, they are safe only once reg_renumber
683
   has been allocated, which happens in local-alloc.c.  */
684
#define REGNO_OK_FOR_BASE_P(REGNO)  \
685
  ((REGNO) < AP_REG || (unsigned) reg_renumber[(REGNO)] < AP_REG)
686
 
687
#define REGNO_OK_FOR_INDEX_P(REGNO)   0
688
 
689
/* Maximum number of registers that can appear in a valid memory
690
   address.  */
691
#define MAX_REGS_PER_ADDRESS 1
692
 
693
/* Recognize any constant value that is a valid address.  */
694
#define CONSTANT_ADDRESS_P(X)    (GET_CODE (X) == LABEL_REF)
695
 
696
/* Nonzero if the constant value X is a legitimate general operand.
697
   It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
698
 
699
   On the MCore, allow anything but a double.  */
700
#define LEGITIMATE_CONSTANT_P(X) (GET_CODE(X) != CONST_DOUBLE)
701
 
702
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
703
   and check its validity for a certain class.
704
   We have two alternate definitions for each of them.
705
   The usual definition accepts all pseudo regs; the other rejects
706
   them unless they have been allocated suitable hard regs.
707
   The symbol REG_OK_STRICT causes the latter definition to be used.  */
708
#ifndef REG_OK_STRICT
709
 
710
/* Nonzero if X is a hard reg that can be used as a base reg
711
   or if it is a pseudo reg.  */
712
#define REG_OK_FOR_BASE_P(X) \
713
        (REGNO (X) <= 16 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
714
 
715
/* Nonzero if X is a hard reg that can be used as an index
716
   or if it is a pseudo reg.  */
717
#define REG_OK_FOR_INDEX_P(X)   0
718
 
719
#else
720
 
721
/* Nonzero if X is a hard reg that can be used as a base reg.  */
722
#define REG_OK_FOR_BASE_P(X)    \
723
        REGNO_OK_FOR_BASE_P (REGNO (X))
724
 
725
/* Nonzero if X is a hard reg that can be used as an index.  */
726
#define REG_OK_FOR_INDEX_P(X)   0
727
 
728
#endif
729
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
730
   that is a valid memory address for an instruction.
731
   The MODE argument is the machine mode for the MEM expression
732
   that wants to use this address.
733
 
734
   The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS.  */
735
#define BASE_REGISTER_RTX_P(X)  \
736
  (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))
737
 
738
#define INDEX_REGISTER_RTX_P(X)  \
739
  (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))
740
 
741
 
742
/* Jump to LABEL if X is a valid address RTX.  This must also take
743
   REG_OK_STRICT into account when deciding about valid registers, but it uses
744
   the above macros so we are in luck.
745
 
746
   Allow  REG
747
          REG+disp
748
 
749
   A legitimate index for a QI is 0..15, for HI is 0..30, for SI is 0..60,
750
   and for DI is 0..56 because we use two SI loads, etc.  */
751
#define GO_IF_LEGITIMATE_INDEX(MODE, REGNO, OP, LABEL)                  \
752
  do                                                                    \
753
    {                                                                   \
754
      if (GET_CODE (OP) == CONST_INT)                                   \
755
        {                                                               \
756
          if (GET_MODE_SIZE (MODE) >= 4                                 \
757
              && (((unsigned)INTVAL (OP)) % 4) == 0                      \
758
              &&  ((unsigned)INTVAL (OP)) <= 64 - GET_MODE_SIZE (MODE)) \
759
            goto LABEL;                                                 \
760
          if (GET_MODE_SIZE (MODE) == 2                                 \
761
              && (((unsigned)INTVAL (OP)) % 2) == 0                      \
762
              &&  ((unsigned)INTVAL (OP)) <= 30)                        \
763
            goto LABEL;                                                 \
764
          if (GET_MODE_SIZE (MODE) == 1                                 \
765
              && ((unsigned)INTVAL (OP)) <= 15)                         \
766
            goto LABEL;                                                 \
767
        }                                                               \
768
    }                                                                   \
769
  while (0)
770
 
771
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL)                  \
772
{                                                                 \
773
  if (BASE_REGISTER_RTX_P (X))                                    \
774
    goto LABEL;                                                   \
775
  else if (GET_CODE (X) == PLUS || GET_CODE (X) == LO_SUM)        \
776
    {                                                             \
777
      rtx xop0 = XEXP (X,0);                                       \
778
      rtx xop1 = XEXP (X,1);                                      \
779
      if (BASE_REGISTER_RTX_P (xop0))                             \
780
        GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop0), xop1, LABEL); \
781
      if (BASE_REGISTER_RTX_P (xop1))                             \
782
        GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop1), xop0, LABEL); \
783
    }                                                             \
784
}
785
 
786
/* Go to LABEL if ADDR (a legitimate address expression)
787
   has an effect that depends on the machine mode it is used for.  */
788
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)  \
789
{                                                                       \
790
  if (   GET_CODE (ADDR) == PRE_DEC || GET_CODE (ADDR) == POST_DEC      \
791
      || GET_CODE (ADDR) == PRE_INC || GET_CODE (ADDR) == POST_INC)     \
792
    goto LABEL;                                                         \
793
}
794
 
795
/* Specify the machine mode that this machine uses
796
   for the index in the tablejump instruction.  */
797
#define CASE_VECTOR_MODE SImode
798
 
799
/* 'char' is signed by default.  */
800
#define DEFAULT_SIGNED_CHAR  0
801
 
802
/* The type of size_t unsigned int.  */
803
#define SIZE_TYPE "unsigned int"
804
 
805
/* Max number of bytes we can move from memory to memory
806
   in one reasonably fast instruction.  */
807
#define MOVE_MAX 4
808
 
809
/* Define if operations between registers always perform the operation
810
   on the full register even if a narrower mode is specified.  */
811
#define WORD_REGISTER_OPERATIONS
812
 
813
/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
814
   will either zero-extend or sign-extend.  The value of this macro should
815
   be the code that says which one of the two operations is implicitly
816
   done, UNKNOWN if none.  */
817
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
818
 
819
/* Nonzero if access to memory by bytes is slow and undesirable.  */
820
#define SLOW_BYTE_ACCESS TARGET_SLOW_BYTES
821
 
822
/* Shift counts are truncated to 6-bits (0 to 63) instead of the expected
823
   5-bits, so we can not define SHIFT_COUNT_TRUNCATED to true for this
824
   target.  */
825
#define SHIFT_COUNT_TRUNCATED 0
826
 
827
/* All integers have the same format so truncation is easy.  */
828
#define TRULY_NOOP_TRUNCATION(OUTPREC,INPREC)  1
829
 
830
/* Define this if addresses of constant functions
831
   shouldn't be put through pseudo regs where they can be cse'd.
832
   Desirable on machines where ordinary constants are expensive
833
   but a CALL with constant address is cheap.  */
834
/* Why is this defined??? -- dac */
835
#define NO_FUNCTION_CSE 1
836
 
837
/* The machine modes of pointers and functions.  */
838
#define Pmode          SImode
839
#define FUNCTION_MODE  Pmode
840
 
841
/* Compute extra cost of moving data between one register class
842
   and another.  All register moves are cheap.  */
843
#define REGISTER_MOVE_COST(MODE, SRCCLASS, DSTCLASS) 2
844
 
845
#define WORD_REGISTER_OPERATIONS
846
 
847
/* Assembler output control.  */
848
#define ASM_COMMENT_START "\t//"
849
 
850
#define ASM_APP_ON      "// inline asm begin\n"
851
#define ASM_APP_OFF     "// inline asm end\n"
852
 
853
#define FILE_ASM_OP     "\t.file\n"
854
 
855
/* Switch to the text or data segment.  */
856
#define TEXT_SECTION_ASM_OP  "\t.text"
857
#define DATA_SECTION_ASM_OP  "\t.data"
858
 
859
/* Switch into a generic section.  */
860
#undef TARGET_ASM_NAMED_SECTION
861
#define TARGET_ASM_NAMED_SECTION  mcore_asm_named_section
862
 
863
/* This is how to output an insn to push a register on the stack.
864
   It need not be very fast code.  */
865
#define ASM_OUTPUT_REG_PUSH(FILE,REGNO)  \
866
  fprintf (FILE, "\tsubi\t %s,%d\n\tstw\t %s,(%s)\n",   \
867
           reg_names[STACK_POINTER_REGNUM],             \
868
           (STACK_BOUNDARY / BITS_PER_UNIT),            \
869
           reg_names[REGNO],                            \
870
           reg_names[STACK_POINTER_REGNUM])
871
 
872
/* Length in instructions of the code output by ASM_OUTPUT_REG_PUSH.  */
873
#define REG_PUSH_LENGTH 2
874
 
875
/* This is how to output an insn to pop a register from the stack.  */
876
#define ASM_OUTPUT_REG_POP(FILE,REGNO)  \
877
  fprintf (FILE, "\tldw\t %s,(%s)\n\taddi\t %s,%d\n",   \
878
           reg_names[REGNO],                            \
879
           reg_names[STACK_POINTER_REGNUM],             \
880
           reg_names[STACK_POINTER_REGNUM],             \
881
           (STACK_BOUNDARY / BITS_PER_UNIT))
882
 
883
 
884
/* Output a reference to a label.  */
885
#undef  ASM_OUTPUT_LABELREF
886
#define ASM_OUTPUT_LABELREF(STREAM, NAME)  \
887
  fprintf (STREAM, "%s%s", USER_LABEL_PREFIX, \
888
           (* targetm.strip_name_encoding) (NAME))
889
 
890
/* This is how to output an assembler line
891
   that says to advance the location counter
892
   to a multiple of 2**LOG bytes.  */
893
#define ASM_OUTPUT_ALIGN(FILE,LOG)      \
894
  if ((LOG) != 0)                        \
895
    fprintf (FILE, "\t.align\t%d\n", LOG)
896
 
897
#ifndef ASM_DECLARE_RESULT
898
#define ASM_DECLARE_RESULT(FILE, RESULT)
899
#endif
900
 
901
#define MULTIPLE_SYMBOL_SPACES 1
902
 
903
#define SUPPORTS_ONE_ONLY 1
904
 
905
/* A pair of macros to output things for the callgraph data.
906
   VALUE means (to the tools that reads this info later):
907
 
908
        1 the call is special (e.g. dst is "unknown" or "alloca")
909
        2 the call is special (e.g., the src is a table instead of routine)
910
 
911
   Frame sizes are augmented with timestamps to help later tools
912
   differentiate between static entities with same names in different
913
   files.  */
914
extern long mcore_current_compilation_timestamp;
915
#define ASM_OUTPUT_CG_NODE(FILE,SRCNAME,VALUE)                          \
916
  do                                                                    \
917
    {                                                                   \
918
      if (mcore_current_compilation_timestamp == 0)                      \
919
        mcore_current_compilation_timestamp = time (0);                  \
920
      fprintf ((FILE),"\t.equ\t__$frame$size$_%s_$_%08lx,%d\n",         \
921
             (SRCNAME), mcore_current_compilation_timestamp, (VALUE));  \
922
    }                                                                   \
923
  while (0)
924
 
925
#define ASM_OUTPUT_CG_EDGE(FILE,SRCNAME,DSTNAME,VALUE)          \
926
  do                                                            \
927
    {                                                           \
928
      fprintf ((FILE),"\t.equ\t__$function$call$_%s_$_%s,%d\n", \
929
             (SRCNAME), (DSTNAME), (VALUE));                    \
930
    }                                                           \
931
  while (0)
932
 
933
/* Globalizing directive for a label.  */
934
#define GLOBAL_ASM_OP "\t.export\t"
935
 
936
/* The prefix to add to user-visible assembler symbols.  */
937
#undef  USER_LABEL_PREFIX
938
#define USER_LABEL_PREFIX ""
939
 
940
/* Make an internal label into a string.  */
941
#undef  ASM_GENERATE_INTERNAL_LABEL
942
#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM)  \
943
  sprintf (STRING, "*.%s%ld", PREFIX, (long) NUM)
944
 
945
/* Jump tables must be 32 bit aligned.  */
946
#undef  ASM_OUTPUT_CASE_LABEL
947
#define ASM_OUTPUT_CASE_LABEL(STREAM,PREFIX,NUM,TABLE) \
948
  fprintf (STREAM, "\t.align 2\n.%s%d:\n", PREFIX, NUM);
949
 
950
/* Output a relative address. Not needed since jump tables are absolute
951
   but we must define it anyway.  */
952
#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM,BODY,VALUE,REL)  \
953
  fputs ("- - - ASM_OUTPUT_ADDR_DIFF_ELT called!\n", STREAM)
954
 
955
/* Output an element of a dispatch table.  */
956
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE)  \
957
    fprintf (STREAM, "\t.long\t.L%d\n", VALUE)
958
 
959
/* Output various types of constants.  */
960
 
961
/* This is how to output an assembler line
962
   that says to advance the location counter by SIZE bytes.  */
963
#undef  ASM_OUTPUT_SKIP
964
#define ASM_OUTPUT_SKIP(FILE,SIZE)  \
965
  fprintf (FILE, "\t.fill %d, 1\n", (int)(SIZE))
966
 
967
/* This says how to output an assembler line
968
   to define a global common symbol, with alignment information.  */
969
/* XXX - for now we ignore the alignment.  */
970
#undef  ASM_OUTPUT_ALIGNED_COMMON
971
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)      \
972
  do                                                            \
973
    {                                                           \
974
      if (mcore_dllexport_name_p (NAME))                        \
975
        MCORE_EXPORT_NAME (FILE, NAME)                          \
976
      if (! mcore_dllimport_name_p (NAME))                      \
977
        {                                                       \
978
          fputs ("\t.comm\t", FILE);                            \
979
          assemble_name (FILE, NAME);                           \
980
          fprintf (FILE, ",%lu\n", (unsigned long)(SIZE));      \
981
        }                                                       \
982
    }                                                           \
983
  while (0)
984
 
985
/* This says how to output an assembler line
986
   to define a local common symbol....  */
987
#undef  ASM_OUTPUT_LOCAL
988
#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)     \
989
  (fputs ("\t.lcomm\t", FILE),                          \
990
  assemble_name (FILE, NAME),                           \
991
  fprintf (FILE, ",%d\n", (int)SIZE))
992
 
993
/* ... and how to define a local common symbol whose alignment
994
   we wish to specify.  ALIGN comes in as bits, we have to turn
995
   it into bytes.  */
996
#undef  ASM_OUTPUT_ALIGNED_LOCAL
997
#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN)               \
998
  do                                                                    \
999
    {                                                                   \
1000
      fputs ("\t.bss\t", (FILE));                                       \
1001
      assemble_name ((FILE), (NAME));                                   \
1002
      fprintf ((FILE), ",%d,%d\n", (int)(SIZE), (ALIGN) / BITS_PER_UNIT);\
1003
    }                                                                   \
1004
  while (0)
1005
 
1006
/* Print operand X (an rtx) in assembler syntax to file FILE.
1007
   CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1008
   For `%' followed by punctuation, CODE is the punctuation and X is null.  */
1009
#define PRINT_OPERAND(STREAM, X, CODE)  mcore_print_operand (STREAM, X, CODE)
1010
 
1011
/* Print a memory address as an operand to reference that memory location.  */
1012
#define PRINT_OPERAND_ADDRESS(STREAM,X)  mcore_print_operand_address (STREAM, X)
1013
 
1014
#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1015
  ((CHAR)=='.' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^' || (CHAR) == '!')
1016
 
1017
#endif /* ! GCC_MCORE_H */

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