OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [config/] [mips/] [r3900.h] - Blame information for rev 853

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius
/* Definitions of MIPS sub target machine for GNU compiler.
2
   Toshiba r3900.  You should include mips.h after this.
3
 
4
   Copyright (C) 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2004,
5
   2007 Free Software Foundation, Inc.
6
   Contributed by Gavin Koch (gavin@cygnus.com).
7
 
8
This file is part of GCC.
9
 
10
GCC is free software; you can redistribute it and/or modify
11
it under the terms of the GNU General Public License as published by
12
the Free Software Foundation; either version 3, or (at your option)
13
any later version.
14
 
15
GCC is distributed in the hope that it will be useful,
16
but WITHOUT ANY WARRANTY; without even the implied warranty of
17
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18
GNU General Public License for more details.
19
 
20
You should have received a copy of the GNU General Public License
21
along with GCC; see the file COPYING3.  If not see
22
<http://www.gnu.org/licenses/>.  */
23
 
24
#define MIPS_CPU_STRING_DEFAULT "r3900"
25
#define MIPS_ISA_DEFAULT 1
26
 
27
#define MULTILIB_DEFAULTS { MULTILIB_ENDIAN_DEFAULT, "msoft-float" }
28
 
29
/* We use the MIPS EABI by default.  */
30
#define MIPS_ABI_DEFAULT ABI_EABI
31
 
32
/* By default (if not mips-something-else) produce code for the r3900 */
33
#define SUBTARGET_CC1_SPEC "\
34
%{mhard-float:%e-mhard-float not supported} \
35
%{msingle-float:%{msoft-float: \
36
  %e-msingle-float and -msoft-float cannot both be specified}}"

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.