OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [config/] [or32/] [or32-modes.def] - Blame information for rev 816

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius
/* Definitions of target machine for GNU compiler, for IBM RS/6000.
2
   Copyright (C) 2002, 2003 Free Software Foundation, Inc.
3
   Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
4
 
5
   This file is part of GCC.
6
 
7
   GCC is free software; you can redistribute it and/or modify it
8
   under the terms of the GNU General Public License as published
9
   by the Free Software Foundation; either version 2, or (at your
10
   option) any later version.
11
 
12
   GCC is distributed in the hope that it will be useful, but WITHOUT
13
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
15
   License for more details.
16
 
17
   You should have received a copy of the GNU General Public License
18
   along with GCC; see the file COPYING.  If not, write to the
19
   Free Software Foundation, 59 Temple Place - Suite 330, Boston,
20
   MA 02111-1307, USA.  */
21
 
22
/* Add any extra modes needed to represent the condition code.
23
 */
24
 
25
CC_MODE (CCEQ);
26
CC_MODE (CCNE);
27
 
28
CC_MODE (CCLE);
29
CC_MODE (CCGE);
30
CC_MODE (CCLT);
31
CC_MODE (CCGT);
32
 
33
CC_MODE (CCLEU);
34
CC_MODE (CCGEU);
35
CC_MODE (CCLTU);
36
CC_MODE (CCGTU);
37
 
38
CC_MODE(CCFP);
39
CC_MODE(CCUNS);

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.