1 |
38 |
julius |
;; Scheduling description for IBM PowerPC 440 processor.
|
2 |
|
|
;; Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc.
|
3 |
|
|
;;
|
4 |
|
|
;; This file is part of GCC.
|
5 |
|
|
;;
|
6 |
|
|
;; GCC is free software; you can redistribute it and/or modify
|
7 |
|
|
;; it under the terms of the GNU General Public License as published by
|
8 |
|
|
;; the Free Software Foundation; either version 3, or (at your option)
|
9 |
|
|
;; any later version.
|
10 |
|
|
;;
|
11 |
|
|
;; GCC is distributed in the hope that it will be useful,
|
12 |
|
|
;; but WITHOUT ANY WARRANTY; without even the implied warranty of
|
13 |
|
|
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
14 |
|
|
;; GNU General Public License for more details.
|
15 |
|
|
;;
|
16 |
|
|
;; You should have received a copy of the GNU General Public License
|
17 |
|
|
;; along with GCC; see the file COPYING3. If not see
|
18 |
|
|
;; .
|
19 |
|
|
|
20 |
|
|
;; PPC440 Embedded PowerPC controller
|
21 |
|
|
;; dual issue
|
22 |
|
|
;; i_pipe - complex integer / compare / branch
|
23 |
|
|
;; j_pipe - simple integer arithmetic
|
24 |
|
|
;; l_pipe - load-store
|
25 |
|
|
;; f_pipe - floating point arithmetic
|
26 |
|
|
|
27 |
|
|
(define_automaton "ppc440_core,ppc440_apu")
|
28 |
|
|
(define_cpu_unit "ppc440_i_pipe,ppc440_j_pipe,ppc440_l_pipe" "ppc440_core")
|
29 |
|
|
(define_cpu_unit "ppc440_f_pipe" "ppc440_apu")
|
30 |
|
|
(define_cpu_unit "ppc440_issue_0,ppc440_issue_1" "ppc440_core")
|
31 |
|
|
|
32 |
|
|
(define_reservation "ppc440_issue" "ppc440_issue_0|ppc440_issue_1")
|
33 |
|
|
|
34 |
|
|
|
35 |
|
|
(define_insn_reservation "ppc440-load" 3
|
36 |
|
|
(and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\
|
37 |
|
|
load_l,store_c,sync")
|
38 |
|
|
(eq_attr "cpu" "ppc440"))
|
39 |
|
|
"ppc440_issue,ppc440_l_pipe")
|
40 |
|
|
|
41 |
|
|
(define_insn_reservation "ppc440-store" 3
|
42 |
|
|
(and (eq_attr "type" "store,store_ux,store_u")
|
43 |
|
|
(eq_attr "cpu" "ppc440"))
|
44 |
|
|
"ppc440_issue,ppc440_l_pipe")
|
45 |
|
|
|
46 |
|
|
(define_insn_reservation "ppc440-fpload" 4
|
47 |
|
|
(and (eq_attr "type" "fpload,fpload_ux,fpload_u")
|
48 |
|
|
(eq_attr "cpu" "ppc440"))
|
49 |
|
|
"ppc440_issue,ppc440_l_pipe")
|
50 |
|
|
|
51 |
|
|
(define_insn_reservation "ppc440-fpstore" 3
|
52 |
|
|
(and (eq_attr "type" "fpstore,fpstore_ux,fpstore_u")
|
53 |
|
|
(eq_attr "cpu" "ppc440"))
|
54 |
|
|
"ppc440_issue,ppc440_l_pipe")
|
55 |
|
|
|
56 |
|
|
(define_insn_reservation "ppc440-integer" 1
|
57 |
|
|
(and (eq_attr "type" "integer,insert_word")
|
58 |
|
|
(eq_attr "cpu" "ppc440"))
|
59 |
|
|
"ppc440_issue,ppc440_i_pipe|ppc440_j_pipe")
|
60 |
|
|
|
61 |
|
|
(define_insn_reservation "ppc440-two" 1
|
62 |
|
|
(and (eq_attr "type" "two")
|
63 |
|
|
(eq_attr "cpu" "ppc440"))
|
64 |
|
|
"ppc440_issue_0+ppc440_issue_1,\
|
65 |
|
|
ppc440_i_pipe|ppc440_j_pipe,ppc440_i_pipe|ppc440_j_pipe")
|
66 |
|
|
|
67 |
|
|
(define_insn_reservation "ppc440-three" 1
|
68 |
|
|
(and (eq_attr "type" "three")
|
69 |
|
|
(eq_attr "cpu" "ppc440"))
|
70 |
|
|
"ppc440_issue_0+ppc440_issue_1,ppc440_i_pipe|ppc440_j_pipe,\
|
71 |
|
|
ppc440_i_pipe|ppc440_j_pipe,ppc440_i_pipe|ppc440_j_pipe")
|
72 |
|
|
|
73 |
|
|
(define_insn_reservation "ppc440-imul" 3
|
74 |
|
|
(and (eq_attr "type" "imul,imul_compare")
|
75 |
|
|
(eq_attr "cpu" "ppc440"))
|
76 |
|
|
"ppc440_issue,ppc440_i_pipe")
|
77 |
|
|
|
78 |
|
|
(define_insn_reservation "ppc440-imul2" 2
|
79 |
|
|
(and (eq_attr "type" "imul2,imul3")
|
80 |
|
|
(eq_attr "cpu" "ppc440"))
|
81 |
|
|
"ppc440_issue,ppc440_i_pipe")
|
82 |
|
|
|
83 |
|
|
(define_insn_reservation "ppc440-idiv" 34
|
84 |
|
|
(and (eq_attr "type" "idiv")
|
85 |
|
|
(eq_attr "cpu" "ppc440"))
|
86 |
|
|
"ppc440_issue,ppc440_i_pipe*33")
|
87 |
|
|
|
88 |
|
|
(define_insn_reservation "ppc440-branch" 1
|
89 |
|
|
(and (eq_attr "type" "branch,jmpreg,isync")
|
90 |
|
|
(eq_attr "cpu" "ppc440"))
|
91 |
|
|
"ppc440_issue,ppc440_i_pipe")
|
92 |
|
|
|
93 |
|
|
(define_insn_reservation "ppc440-compare" 2
|
94 |
|
|
(and (eq_attr "type" "cmp,fast_compare,compare,cr_logical,delayed_cr,mfcr")
|
95 |
|
|
(eq_attr "cpu" "ppc440"))
|
96 |
|
|
"ppc440_issue,ppc440_i_pipe")
|
97 |
|
|
|
98 |
|
|
(define_insn_reservation "ppc440-fpcompare" 3 ; 2
|
99 |
|
|
(and (eq_attr "type" "fpcompare")
|
100 |
|
|
(eq_attr "cpu" "ppc440"))
|
101 |
|
|
"ppc440_issue,ppc440_f_pipe+ppc440_i_pipe")
|
102 |
|
|
|
103 |
|
|
(define_insn_reservation "ppc440-fp" 5
|
104 |
|
|
(and (eq_attr "type" "fp,dmul")
|
105 |
|
|
(eq_attr "cpu" "ppc440"))
|
106 |
|
|
"ppc440_issue,ppc440_f_pipe")
|
107 |
|
|
|
108 |
|
|
(define_insn_reservation "ppc440-sdiv" 19
|
109 |
|
|
(and (eq_attr "type" "sdiv")
|
110 |
|
|
(eq_attr "cpu" "ppc440"))
|
111 |
|
|
"ppc440_issue,ppc440_f_pipe*15")
|
112 |
|
|
|
113 |
|
|
(define_insn_reservation "ppc440-ddiv" 33
|
114 |
|
|
(and (eq_attr "type" "ddiv")
|
115 |
|
|
(eq_attr "cpu" "ppc440"))
|
116 |
|
|
"ppc440_issue,ppc440_f_pipe*29")
|
117 |
|
|
|
118 |
|
|
(define_insn_reservation "ppc440-mtcr" 3
|
119 |
|
|
(and (eq_attr "type" "mtcr")
|
120 |
|
|
(eq_attr "cpu" "ppc440"))
|
121 |
|
|
"ppc440_issue,ppc440_i_pipe")
|
122 |
|
|
|
123 |
|
|
(define_insn_reservation "ppc440-mtjmpr" 4
|
124 |
|
|
(and (eq_attr "type" "mtjmpr")
|
125 |
|
|
(eq_attr "cpu" "ppc440"))
|
126 |
|
|
"ppc440_issue,ppc440_i_pipe")
|
127 |
|
|
|
128 |
|
|
(define_insn_reservation "ppc440-mfjmpr" 2
|
129 |
|
|
(and (eq_attr "type" "mfjmpr")
|
130 |
|
|
(eq_attr "cpu" "ppc440"))
|
131 |
|
|
"ppc440_issue,ppc440_i_pipe")
|
132 |
|
|
|