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[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [config/] [rs6000/] [constraints.md] - Blame information for rev 856

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;; Constraint definitions for RS6000
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;; Copyright (C) 2006, 2007 Free Software Foundation, Inc.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3.  If not see
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;; .
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;; Register constraints
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(define_register_constraint "f" "TARGET_HARD_FLOAT && TARGET_FPRS
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                                 ? FLOAT_REGS : NO_REGS"
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  "@internal")
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(define_register_constraint "b" "BASE_REGS"
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  "@internal")
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(define_register_constraint "h" "SPECIAL_REGS"
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  "@internal")
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(define_register_constraint "q" "MQ_REGS"
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  "@internal")
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(define_register_constraint "c" "CTR_REGS"
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  "@internal")
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(define_register_constraint "l" "LINK_REGS"
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  "@internal")
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(define_register_constraint "v" "ALTIVEC_REGS"
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  "@internal")
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(define_register_constraint "x" "CR0_REGS"
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  "@internal")
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(define_register_constraint "y" "CR_REGS"
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  "@internal")
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(define_register_constraint "z" "XER_REGS"
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  "@internal")
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;; Integer constraints
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(define_constraint "I"
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  "A signed 16-bit constant"
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  (and (match_code "const_int")
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       (match_test "(unsigned HOST_WIDE_INT) (ival + 0x8000) < 0x10000")))
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(define_constraint "J"
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  "high-order 16 bits nonzero"
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  (and (match_code "const_int")
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       (match_test "(ival & (~ (unsigned HOST_WIDE_INT) 0xffff0000)) == 0")))
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(define_constraint "K"
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  "low-order 16 bits nonzero"
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  (and (match_code "const_int")
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       (match_test "(ival & (~ (HOST_WIDE_INT) 0xffff)) == 0")))
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(define_constraint "L"
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  "signed 16-bit constant shifted left 16 bits"
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  (and (match_code "const_int")
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       (match_test "((ival & 0xffff) == 0
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                      && (ival >> 31 == -1 || ival >> 31 == 0))")))
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(define_constraint "M"
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  "constant greater than 31"
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  (and (match_code "const_int")
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       (match_test "ival > 31")))
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(define_constraint "N"
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  "positive constant that is an exact power of two"
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  (and (match_code "const_int")
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       (match_test "ival > 0 && exact_log2 (ival) >= 0")))
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(define_constraint "O"
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  "constant zero"
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  (and (match_code "const_int")
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       (match_test "ival == 0")))
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(define_constraint "P"
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  "constant whose negation is signed 16-bit constant"
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  (and (match_code "const_int")
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       (match_test "(unsigned HOST_WIDE_INT) ((- ival) + 0x8000) < 0x10000")))
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;; Floating-point constraints
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(define_constraint "G"
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  "Constant that can be copied into GPR with two insns for DF/DI
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   and one for SF."
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  (and (match_code "const_double")
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       (match_test "num_insns_constant (op, mode)
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                    == (mode == SFmode ? 1 : 2)")))
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(define_constraint "H"
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  "DF/DI constant that takes three insns."
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  (and (match_code "const_double")
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       (match_test "num_insns_constant (op, mode) == 3")))
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;; Memory constraints
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(define_memory_constraint "Q"
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  "Memory operand that is just an offset from a reg"
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  (and (match_code "mem")
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       (match_test "GET_CODE (XEXP (op, 0)) == REG")))
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(define_memory_constraint "Y"
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  "Indexed or word-aligned displacement memory operand"
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  (match_operand 0 "word_offset_memref_operand"))
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(define_memory_constraint "Z"
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  "Indexed or indirect memory operand"
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  (match_operand 0 "indexed_or_indirect_operand"))
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;; Address constraints
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(define_address_constraint "a"
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  "Indexed or indirect address operand"
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  (match_operand 0 "indexed_or_indirect_address"))
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(define_constraint "R"
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  "AIX TOC entry"
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  (match_test "legitimate_constant_pool_address_p (op)"))
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;; General constraints
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(define_constraint "S"
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  "Constant that can be placed into a 64-bit mask operand"
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  (match_operand 0 "mask64_operand"))
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(define_constraint "T"
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  "Constant that can be placed into a 32-bit mask operand"
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  (match_operand 0 "mask_operand"))
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(define_constraint "U"
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  "V.4 small data reference"
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  (and (match_test "DEFAULT_ABI == ABI_V4")
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       (match_operand 0 "small_data_operand")))
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(define_constraint "t"
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  "AND masks that can be performed by two rldic{l,r} insns
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   (but excluding those that could match other constraints of anddi3)"
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  (and (and (and (match_operand 0 "mask64_2_operand")
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                 (match_test "(fixed_regs[CR0_REGNO]
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                              || !logical_operand (op, DImode))"))
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            (not (match_operand 0 "mask_operand")))
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       (not (match_operand 0 "mask64_operand"))))
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(define_constraint "W"
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  "vector constant that does not require memory"
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  (match_operand 0 "easy_vector_constant"))

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