OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [config/] [rs6000/] [eabi.h] - Blame information for rev 853

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius
/* Core target definitions for GNU compiler
2
   for IBM RS/6000 PowerPC targeted to embedded ELF systems.
3
   Copyright (C) 1995, 1996, 2000, 2003, 2004, 2007
4
   Free Software Foundation, Inc.
5
   Contributed by Cygnus Support.
6
 
7
   This file is part of GCC.
8
 
9
   GCC is free software; you can redistribute it and/or modify it
10
   under the terms of the GNU General Public License as published
11
   by the Free Software Foundation; either version 3, or (at your
12
   option) any later version.
13
 
14
   GCC is distributed in the hope that it will be useful, but WITHOUT
15
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
17
   License for more details.
18
 
19
   You should have received a copy of the GNU General Public License
20
   along with GCC; see the file COPYING3.  If not see
21
   <http://www.gnu.org/licenses/>.  */
22
 
23
/* Add -meabi to target flags.  */
24
#undef TARGET_DEFAULT
25
#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_EABI)
26
 
27
/* Invoke an initializer function to set up the GOT.  */
28
#define NAME__MAIN "__eabi"
29
#define INVOKE__main
30
 
31
#undef TARGET_VERSION
32
#define TARGET_VERSION fprintf (stderr, " (PowerPC Embedded)");
33
 
34
#undef TARGET_OS_CPP_BUILTINS
35
#define TARGET_OS_CPP_BUILTINS()          \
36
  do                                      \
37
    {                                     \
38
      builtin_define_std ("PPC");         \
39
      builtin_define ("__embedded__");    \
40
      builtin_assert ("system=embedded"); \
41
      builtin_assert ("cpu=powerpc");     \
42
      builtin_assert ("machine=powerpc"); \
43
      TARGET_OS_SYSV_CPP_BUILTINS ();     \
44
    }                                     \
45
  while (0)
46
 
47
#undef TARGET_SPE_ABI
48
#undef TARGET_SPE
49
#undef TARGET_E500
50
#undef TARGET_ISEL
51
#undef TARGET_FPRS
52
#undef TARGET_E500_SINGLE
53
#undef TARGET_E500_DOUBLE
54
 
55
#define TARGET_SPE_ABI rs6000_spe_abi
56
#define TARGET_SPE rs6000_spe
57
#define TARGET_E500 (rs6000_cpu == PROCESSOR_PPC8540)
58
#define TARGET_ISEL rs6000_isel
59
#define TARGET_FPRS (rs6000_float_gprs == 0)
60
#define TARGET_E500_SINGLE (TARGET_HARD_FLOAT && rs6000_float_gprs == 1)
61
#define TARGET_E500_DOUBLE (TARGET_HARD_FLOAT && rs6000_float_gprs == 2)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.