OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [config/] [sh/] [divcost-analysis] - Blame information for rev 816

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius 
Analysis of cycle costs for SH4:
2 
 
3 
-> udiv_le128:            5
4 
-> udiv_ge64k:            6
5 
-> udiv udiv_25:         10
6 
-> pos_divisor:           3
7 
-> pos_result linear:     5
8 
-> pos_result - -:        5
9 
-> div_le128:             7
10 
-> div_ge64k:             9
11 
sdivsi3 -> udiv_25             13
12 
udiv25 -> div_ge64k_end:       15
13 
div_ge64k_end -> rts:          13
14 
div_le128 -> div_le128_2:       2, r1 latency 3
15 
udiv_le128 -> div_le128_2:      2, r1 latency 3
16 
(u)div_le128 -> div_by_1:       9
17 
(u)div_le128 -> rts:           17
18 
div_by_1(_neg) -> rts:          4
19 
div_ge64k -> div_r8:            2
20 
div_ge64k -> div_ge64k_2:       3
21 
udiv_ge64k -> udiv_r8:          3
22 
udiv_ge64k -> div_ge64k_2:      3 + LS
23 
(u)div_ge64k -> div_ge64k_end: 13
24 
div_r8 -> div_r8_2:             2
25 
udiv_r8 -> div_r8_2:            2 + LS
26 
(u)div_r8 -> rts:              21
27 
 
28 
-> - + neg_result:             5
29 
-> + - neg_result:             5
30 
-> div_le128_neg:              7
31 
-> div_ge64k_neg:              9
32 
-> div_r8_neg:                11
33 
-> <64k div_ge64k_neg_end:    28
34 
-> >=64k div_ge64k_neg_end:   22
35 
div_ge64k_neg_end ft -> rts:  14
36 
div_r8_neg_end -> rts:         4
37 
div_r8_neg -> div_r8_neg_end: 18
38 
div_le128_neg -> div_by_1_neg: 4
39 
div_le128_neg -> rts          18
40 
 
41 
                    absolute divisor range:
42 
            1  [2..128]  [129..64K) [64K..|divident|/256] >=64K,>|divident/256|
43 
udiv       18     22         38            32                   30
44 
sdiv pos:  20     24         41            35                   32
45 
sdiv neg:  15     25         42            36                   33
46 
 
47 
 
48 
fp-based:
49 
 
50 
unsigned: 42 + 3 + 3 (lingering ftrc latency + sts fpul,rx) at caller's site
51 
signed: 33 + 3 + 3 (lingering ftrc latency + sts fpul,rx) at caller's site
52 
 
53 
call-div1:    divisor range:
54 
              [1..64K)  >= 64K
55 
unsigned:       63        58
56 
signed:         76        76
57 
 
58 
SFUNC_STATIC call overhead:
59 
mov.l 0f,r1
60 
bsrf r1
61 
 
62 
SFUNC_GOT call overhead - current:
63 
mov.l 0f,r1
64 
mova 0f,r0
65 
mov.l 1f,r2
66 
add r1,r0
67 
mov.l @(r0,r2),r0
68 
jmp @r0
69 
; 3 cycles worse than SFUNC_STATIC
70 
 
71 
SFUNC_GOT call overhead - improved assembler:
72 
mov.l 0f,r1
73 
mova 0f,r0
74 
mov.l @(r0,r1),r0
75 
jmp @r0
76 
; 2 cycles worse than SFUNC_STATIC

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.