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[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [config/] [sh/] [linux-unwind.h] - Blame information for rev 816

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1 38 julius
/* DWARF2 EH unwinding support for SH Linux.
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   Copyright (C) 2004, 2005, 2006 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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In addition to the permissions in the GNU General Public License, the
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Free Software Foundation gives you unlimited permission to link the
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compiled version of this file with other programs, and to distribute
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those programs without any restriction coming from the use of this
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file.  (The General Public License restrictions do apply in other
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respects; for example, they cover modification of the file, and
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distribution when not linked into another program.)
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING.  If not, write to
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the Free Software Foundation, 51 Franklin Street, Fifth Floor,
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Boston, MA 02110-1301, USA.  */
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/* Do code reading to identify a signal frame, and set the frame
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   state data appropriately.  See unwind-dw2.c for the structs.  */
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#include <signal.h>
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#include <sys/ucontext.h>
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#include "insn-constants.h"
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# if defined (__SH5__)
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#define SH_DWARF_FRAME_GP0      0
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#define SH_DWARF_FRAME_FP0      77
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#define SH_DWARF_FRAME_BT0      68
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#define SH_DWARF_FRAME_PR_MEDIA 18
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#define SH_DWARF_FRAME_SR       65
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#define SH_DWARF_FRAME_FPSCR    76
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#else
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#define SH_DWARF_FRAME_GP0      0
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#define SH_DWARF_FRAME_FP0      25
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#define SH_DWARF_FRAME_XD0      87
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#define SH_DWARF_FRAME_PR       17
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#define SH_DWARF_FRAME_GBR      19
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#define SH_DWARF_FRAME_MACH     20
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#define SH_DWARF_FRAME_MACL     21
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#define SH_DWARF_FRAME_PC       16
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#define SH_DWARF_FRAME_SR       22
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#define SH_DWARF_FRAME_FPUL     23
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#define SH_DWARF_FRAME_FPSCR    24
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#endif /* defined (__SH5__) */
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#if defined (__SH5__)
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#define MD_FALLBACK_FRAME_STATE_FOR shmedia_fallback_frame_state
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static _Unwind_Reason_Code
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shmedia_fallback_frame_state (struct _Unwind_Context *context,
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                              _Unwind_FrameState *fs)
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{
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  unsigned char *pc = context->ra;
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  struct sigcontext *sc;
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  long new_cfa;
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  int i, r;
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  /* movi 0x10,r9; shori 0x77,r9; trapa r9; nop (sigreturn)  */
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  /* movi 0x10,r9; shori 0xad,r9; trapa r9; nop (rt_sigreturn)  */
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  if ((*(unsigned long *) (pc-1)  == 0xcc004090)
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      && (*(unsigned long *) (pc+3)  == 0xc801dc90)
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      && (*(unsigned long *) (pc+7)  == 0x6c91fff0)
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      && (*(unsigned long *) (pc+11)  == 0x6ff0fff0))
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    sc = context->cfa;
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  else if ((*(unsigned long *) (pc-1)  == 0xcc004090)
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           && (*(unsigned long *) (pc+3)  == 0xc802b490)
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           && (*(unsigned long *) (pc+7)  == 0x6c91fff0)
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           && (*(unsigned long *) (pc+11)  == 0x6ff0fff0))
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    {
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      struct rt_sigframe {
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        struct siginfo *pinfo;
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        void *puc;
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        struct siginfo info;
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        struct ucontext uc;
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      } *rt_ = context->cfa;
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      /* The void * cast is necessary to avoid an aliasing warning.
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         The aliasing warning is correct, but should not be a problem
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         because it does not alias anything.  */
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      sc = (struct sigcontext *) (void *) &rt_->uc.uc_mcontext;
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    }
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  else
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    return _URC_END_OF_STACK;
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  new_cfa = sc->sc_regs[15];
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  fs->cfa_how = CFA_REG_OFFSET;
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  fs->cfa_reg = 15;
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  fs->cfa_offset = new_cfa - (long) context->cfa;
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  for (i = 0; i < 63; i++)
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    {
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      if (i == 15)
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        continue;
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      fs->regs.reg[i].how = REG_SAVED_OFFSET;
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      fs->regs.reg[i].loc.offset
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        = (long)&(sc->sc_regs[i]) - new_cfa;
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    }
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  fs->regs.reg[SH_DWARF_FRAME_SR].how = REG_SAVED_OFFSET;
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  fs->regs.reg[SH_DWARF_FRAME_SR].loc.offset
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    = (long)&(sc->sc_sr) - new_cfa;
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  r = SH_DWARF_FRAME_BT0;
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  for (i = 0; i < 8; i++)
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    {
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      fs->regs.reg[r+i].how = REG_SAVED_OFFSET;
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      fs->regs.reg[r+i].loc.offset
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        = (long)&(sc->sc_tregs[i]) - new_cfa;
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    }
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  r = SH_DWARF_FRAME_FP0;
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  for (i = 0; i < 32; i++)
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    {
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      fs->regs.reg[r+i].how = REG_SAVED_OFFSET;
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      fs->regs.reg[r+i].loc.offset
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        = (long)&(sc->sc_fpregs[i]) - new_cfa;
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    }
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  fs->regs.reg[SH_DWARF_FRAME_FPSCR].how = REG_SAVED_OFFSET;
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  fs->regs.reg[SH_DWARF_FRAME_FPSCR].loc.offset
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    = (long)&(sc->sc_fpscr) - new_cfa;
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  /* We use the slot for the zero register to save return address.  */
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  fs->regs.reg[63].how = REG_SAVED_OFFSET;
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  fs->regs.reg[63].loc.offset
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    = (long)&(sc->sc_pc) - new_cfa;
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  fs->retaddr_column = 63;
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  fs->signal_frame = 1;
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  return _URC_NO_REASON;
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}
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144
#else /* defined (__SH5__) */
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146
#define MD_FALLBACK_FRAME_STATE_FOR sh_fallback_frame_state
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148
static _Unwind_Reason_Code
149
sh_fallback_frame_state (struct _Unwind_Context *context,
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                         _Unwind_FrameState *fs)
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{
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  unsigned char *pc = context->ra;
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  struct sigcontext *sc;
154
  long new_cfa;
155
  int i;
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#if defined (__SH3E__) || defined (__SH4__)
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  int r;
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#endif
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160
  /* mov.w 1f,r3; trapa #0x10; 1: .short 0x77  (sigreturn)  */
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  /* mov.w 1f,r3; trapa #0x10; 1: .short 0xad  (rt_sigreturn)  */
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  /* Newer kernel uses pad instructions to avoid an SH-4 core bug.  */
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  /* mov.w 1f,r3; trapa #0x10; or r0,r0; or r0,r0; or r0,r0; or r0,r0;
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     or r0,r0; 1: .short 0x77  (sigreturn)  */
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  /* mov.w 1f,r3; trapa #0x10; or r0,r0; or r0,r0; or r0,r0; or r0,r0;
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     or r0,r0; 1: .short 0xad  (rt_sigreturn)  */
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  if (((*(unsigned short *) (pc+0)  == 0x9300)
168
       && (*(unsigned short *) (pc+2)  == 0xc310)
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       && (*(unsigned short *) (pc+4)  == 0x0077))
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      || (((*(unsigned short *) (pc+0)  == 0x9305)
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           && (*(unsigned short *) (pc+2)  == 0xc310)
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           && (*(unsigned short *) (pc+14)  == 0x0077))))
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    sc = context->cfa;
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  else if (((*(unsigned short *) (pc+0) == 0x9300)
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            && (*(unsigned short *) (pc+2)  == 0xc310)
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            && (*(unsigned short *) (pc+4)  == 0x00ad))
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           || (((*(unsigned short *) (pc+0) == 0x9305)
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                && (*(unsigned short *) (pc+2)  == 0xc310)
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                && (*(unsigned short *) (pc+14)  == 0x00ad))))
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    {
181
      struct rt_sigframe {
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        struct siginfo info;
183
        struct ucontext uc;
184
      } *rt_ = context->cfa;
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      /* The void * cast is necessary to avoid an aliasing warning.
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         The aliasing warning is correct, but should not be a problem
187
         because it does not alias anything.  */
188
      sc = (struct sigcontext *) (void *) &rt_->uc.uc_mcontext;
189
    }
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  else
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    return _URC_END_OF_STACK;
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193
  new_cfa = sc->sc_regs[15];
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  fs->cfa_how = CFA_REG_OFFSET;
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  fs->cfa_reg = 15;
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  fs->cfa_offset = new_cfa - (long) context->cfa;
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  for (i = 0; i < 15; i++)
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    {
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      fs->regs.reg[i].how = REG_SAVED_OFFSET;
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      fs->regs.reg[i].loc.offset
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        = (long)&(sc->sc_regs[i]) - new_cfa;
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    }
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  fs->regs.reg[SH_DWARF_FRAME_PR].how = REG_SAVED_OFFSET;
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  fs->regs.reg[SH_DWARF_FRAME_PR].loc.offset
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    = (long)&(sc->sc_pr) - new_cfa;
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  fs->regs.reg[SH_DWARF_FRAME_SR].how = REG_SAVED_OFFSET;
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  fs->regs.reg[SH_DWARF_FRAME_SR].loc.offset
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    = (long)&(sc->sc_sr) - new_cfa;
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  fs->regs.reg[SH_DWARF_FRAME_GBR].how = REG_SAVED_OFFSET;
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  fs->regs.reg[SH_DWARF_FRAME_GBR].loc.offset
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    = (long)&(sc->sc_gbr) - new_cfa;
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  fs->regs.reg[SH_DWARF_FRAME_MACH].how = REG_SAVED_OFFSET;
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  fs->regs.reg[SH_DWARF_FRAME_MACH].loc.offset
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    = (long)&(sc->sc_mach) - new_cfa;
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  fs->regs.reg[SH_DWARF_FRAME_MACL].how = REG_SAVED_OFFSET;
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  fs->regs.reg[SH_DWARF_FRAME_MACL].loc.offset
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    = (long)&(sc->sc_macl) - new_cfa;
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221
#if defined (__SH3E__) || defined (__SH4__)
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  r = SH_DWARF_FRAME_FP0;
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  for (i = 0; i < 16; i++)
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    {
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      fs->regs.reg[r+i].how = REG_SAVED_OFFSET;
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      fs->regs.reg[r+i].loc.offset
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        = (long)&(sc->sc_fpregs[i]) - new_cfa;
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    }
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230
  r = SH_DWARF_FRAME_XD0;
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  for (i = 0; i < 8; i++)
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    {
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      fs->regs.reg[i].how = REG_SAVED_OFFSET;
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      fs->regs.reg[i].loc.offset
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        = (long)&(sc->sc_xfpregs[2*i]) - new_cfa;
236
    }
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238
  fs->regs.reg[SH_DWARF_FRAME_FPUL].how = REG_SAVED_OFFSET;
239
  fs->regs.reg[SH_DWARF_FRAME_FPUL].loc.offset
240
    = (long)&(sc->sc_fpul) - new_cfa;
241
  fs->regs.reg[SH_DWARF_FRAME_FPSCR].how = REG_SAVED_OFFSET;
242
  fs->regs.reg[SH_DWARF_FRAME_FPSCR].loc.offset
243
    = (long)&(sc->sc_fpscr) - new_cfa;
244
#endif
245
 
246
  fs->regs.reg[SH_DWARF_FRAME_PC].how = REG_SAVED_OFFSET;
247
  fs->regs.reg[SH_DWARF_FRAME_PC].loc.offset
248
    = (long)&(sc->sc_pc) - new_cfa;
249
  fs->retaddr_column = SH_DWARF_FRAME_PC;
250
  fs->signal_frame = 1;
251
  return _URC_NO_REASON;
252
}
253
#endif /* defined (__SH5__) */

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