OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [config/] [sparc/] [linux-unwind.h] - Blame information for rev 841

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius
/* DWARF2 EH unwinding support for SPARC Linux.
2
   Copyright 2004, 2005 Free Software Foundation, Inc.
3
 
4
This file is part of GCC.
5
 
6
GCC is free software; you can redistribute it and/or modify
7
it under the terms of the GNU General Public License as published by
8
the Free Software Foundation; either version 2, or (at your option)
9
any later version.
10
 
11
In addition to the permissions in the GNU General Public License, the
12
Free Software Foundation gives you unlimited permission to link the
13
compiled version of this file with other programs, and to distribute
14
those programs without any restriction coming from the use of this
15
file.  (The General Public License restrictions do apply in other
16
respects; for example, they cover modification of the file, and
17
distribution when not linked into another program.)
18
 
19
GCC is distributed in the hope that it will be useful,
20
but WITHOUT ANY WARRANTY; without even the implied warranty of
21
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
22
GNU General Public License for more details.
23
 
24
You should have received a copy of the GNU General Public License
25
along with GCC; see the file COPYING.  If not, write to
26
the Free Software Foundation, 51 Franklin Street, Fifth Floor,
27
Boston, MA 02110-1301, USA.  */
28
 
29
/* Do code reading to identify a signal frame, and set the frame
30
   state data appropriately.  See unwind-dw2.c for the structs.  */
31
 
32
/* Handle multilib correctly.  */
33
#if defined(__arch64__)
34
 
35
/* 64-bit SPARC version */
36
#define MD_FALLBACK_FRAME_STATE_FOR sparc64_fallback_frame_state
37
 
38
static _Unwind_Reason_Code
39
sparc64_fallback_frame_state (struct _Unwind_Context *context,
40
                              _Unwind_FrameState *fs)
41
{
42
  unsigned int *pc = context->ra;
43
  long new_cfa, i;
44
  long regs_off, fpu_save_off;
45
  long this_cfa, fpu_save;
46
 
47
  if (pc[0] != 0x82102065                /* mov NR_rt_sigreturn, %g1 */
48
      || pc[1] != 0x91d0206d)           /* ta 0x6d */
49
    return _URC_END_OF_STACK;
50
  regs_off = 192 + 128;
51
  fpu_save_off = regs_off + (16 * 8) + (3 * 8) + (2 * 4);
52
  this_cfa = (long) context->cfa;
53
  new_cfa = *(long *)((context->cfa) + (regs_off + (14 * 8)));
54
  new_cfa += 2047; /* Stack bias */
55
  fpu_save = *(long *)((this_cfa) + (fpu_save_off));
56
  fs->cfa_how = CFA_REG_OFFSET;
57
  fs->cfa_reg = 14;
58
  fs->cfa_offset = new_cfa - (long) context->cfa;
59
  for (i = 1; i < 16; ++i)
60
    {
61
      fs->regs.reg[i].how = REG_SAVED_OFFSET;
62
      fs->regs.reg[i].loc.offset =
63
        this_cfa + (regs_off + (i * 8)) - new_cfa;
64
    }
65
  for (i = 0; i < 16; ++i)
66
    {
67
      fs->regs.reg[i + 16].how = REG_SAVED_OFFSET;
68
      fs->regs.reg[i + 16].loc.offset =
69
        this_cfa + (i * 8) - new_cfa;
70
    }
71
  if (fpu_save)
72
    {
73
      for (i = 0; i < 64; ++i)
74
        {
75
          if (i > 32 && (i & 0x1))
76
            continue;
77
          fs->regs.reg[i + 32].how = REG_SAVED_OFFSET;
78
          fs->regs.reg[i + 32].loc.offset =
79
            (fpu_save + (i * 4)) - new_cfa;
80
        }
81
    }
82
  /* Stick return address into %g0, same trick Alpha uses.  */
83
  fs->regs.reg[0].how = REG_SAVED_OFFSET;
84
  fs->regs.reg[0].loc.offset =
85
    this_cfa + (regs_off + (16 * 8) + 8) - new_cfa;
86
  fs->retaddr_column = 0;
87
  return _URC_NO_REASON;
88
}
89
 
90
#else
91
 
92
/* 32-bit SPARC version */
93
#define MD_FALLBACK_FRAME_STATE_FOR sparc_fallback_frame_state
94
 
95
static _Unwind_Reason_Code
96
sparc_fallback_frame_state (struct _Unwind_Context *context,
97
                            _Unwind_FrameState *fs)
98
{
99
  unsigned int *pc = context->ra;
100
  int new_cfa, i, oldstyle;
101
  int regs_off, fpu_save_off;
102
  int fpu_save, this_cfa;
103
 
104
  if (pc[1] != 0x91d02010)              /* ta 0x10 */
105
    return _URC_END_OF_STACK;
106
  if (pc[0] == 0x821020d8)               /* mov NR_sigreturn, %g1 */
107
    oldstyle = 1;
108
  else if (pc[0] == 0x82102065)  /* mov NR_rt_sigreturn, %g1 */
109
    oldstyle = 0;
110
  else
111
    return _URC_END_OF_STACK;
112
  if (oldstyle)
113
    {
114
      regs_off = 96;
115
      fpu_save_off = regs_off + (4 * 4) + (16 * 4);
116
    }
117
  else
118
    {
119
      regs_off = 96 + 128;
120
      fpu_save_off = regs_off + (4 * 4) + (16 * 4) + (2 * 4);
121
    }
122
  this_cfa = (int) context->cfa;
123
  new_cfa = *(int *)((context->cfa) + (regs_off+(4*4)+(14 * 4)));
124
  fpu_save = *(int *)((this_cfa) + (fpu_save_off));
125
  fs->cfa_how = CFA_REG_OFFSET;
126
  fs->cfa_reg = 14;
127
  fs->cfa_offset = new_cfa - (int) context->cfa;
128
  for (i = 1; i < 16; ++i)
129
    {
130
      if (i == 14)
131
        continue;
132
      fs->regs.reg[i].how = REG_SAVED_OFFSET;
133
      fs->regs.reg[i].loc.offset =
134
        this_cfa + (regs_off+(4 * 4)+(i * 4)) - new_cfa;
135
    }
136
  for (i = 0; i < 16; ++i)
137
    {
138
      fs->regs.reg[i + 16].how = REG_SAVED_OFFSET;
139
      fs->regs.reg[i + 16].loc.offset =
140
        this_cfa + (i * 4) - new_cfa;
141
    }
142
  if (fpu_save)
143
    {
144
      for (i = 0; i < 32; ++i)
145
        {
146
          fs->regs.reg[i + 32].how = REG_SAVED_OFFSET;
147
          fs->regs.reg[i + 32].loc.offset =
148
            (fpu_save + (i * 4)) - new_cfa;
149
        }
150
    }
151
  /* Stick return address into %g0, same trick Alpha uses.  */
152
  fs->regs.reg[0].how = REG_SAVED_OFFSET;
153
  fs->regs.reg[0].loc.offset = this_cfa+(regs_off+4)-new_cfa;
154
  fs->retaddr_column = 0;
155
  return _URC_NO_REASON;
156
}
157
 
158
#endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.