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[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [reg-stack.c] - Blame information for rev 841

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1 38 julius
/* Register to Stack convert for GNU compiler.
2
   Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3
   2000, 2001, 2002, 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
4
 
5
   This file is part of GCC.
6
 
7
   GCC is free software; you can redistribute it and/or modify it
8
   under the terms of the GNU General Public License as published by
9
   the Free Software Foundation; either version 3, or (at your option)
10
   any later version.
11
 
12
   GCC is distributed in the hope that it will be useful, but WITHOUT
13
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
15
   License for more details.
16
 
17
   You should have received a copy of the GNU General Public License
18
   along with GCC; see the file COPYING3.  If not see
19
   <http://www.gnu.org/licenses/>.  */
20
 
21
/* This pass converts stack-like registers from the "flat register
22
   file" model that gcc uses, to a stack convention that the 387 uses.
23
 
24
   * The form of the input:
25
 
26
   On input, the function consists of insn that have had their
27
   registers fully allocated to a set of "virtual" registers.  Note that
28
   the word "virtual" is used differently here than elsewhere in gcc: for
29
   each virtual stack reg, there is a hard reg, but the mapping between
30
   them is not known until this pass is run.  On output, hard register
31
   numbers have been substituted, and various pop and exchange insns have
32
   been emitted.  The hard register numbers and the virtual register
33
   numbers completely overlap - before this pass, all stack register
34
   numbers are virtual, and afterward they are all hard.
35
 
36
   The virtual registers can be manipulated normally by gcc, and their
37
   semantics are the same as for normal registers.  After the hard
38
   register numbers are substituted, the semantics of an insn containing
39
   stack-like regs are not the same as for an insn with normal regs: for
40
   instance, it is not safe to delete an insn that appears to be a no-op
41
   move.  In general, no insn containing hard regs should be changed
42
   after this pass is done.
43
 
44
   * The form of the output:
45
 
46
   After this pass, hard register numbers represent the distance from
47
   the current top of stack to the desired register.  A reference to
48
   FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
49
   represents the register just below that, and so forth.  Also, REG_DEAD
50
   notes indicate whether or not a stack register should be popped.
51
 
52
   A "swap" insn looks like a parallel of two patterns, where each
53
   pattern is a SET: one sets A to B, the other B to A.
54
 
55
   A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
56
   and whose SET_DEST is REG or MEM.  Any other SET_DEST, such as PLUS,
57
   will replace the existing stack top, not push a new value.
58
 
59
   A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
60
   SET_SRC is REG or MEM.
61
 
62
   The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
63
   appears ambiguous.  As a special case, the presence of a REG_DEAD note
64
   for FIRST_STACK_REG differentiates between a load insn and a pop.
65
 
66
   If a REG_DEAD is present, the insn represents a "pop" that discards
67
   the top of the register stack.  If there is no REG_DEAD note, then the
68
   insn represents a "dup" or a push of the current top of stack onto the
69
   stack.
70
 
71
   * Methodology:
72
 
73
   Existing REG_DEAD and REG_UNUSED notes for stack registers are
74
   deleted and recreated from scratch.  REG_DEAD is never created for a
75
   SET_DEST, only REG_UNUSED.
76
 
77
   * asm_operands:
78
 
79
   There are several rules on the usage of stack-like regs in
80
   asm_operands insns.  These rules apply only to the operands that are
81
   stack-like regs:
82
 
83
   1. Given a set of input regs that die in an asm_operands, it is
84
      necessary to know which are implicitly popped by the asm, and
85
      which must be explicitly popped by gcc.
86
 
87
        An input reg that is implicitly popped by the asm must be
88
        explicitly clobbered, unless it is constrained to match an
89
        output operand.
90
 
91
   2. For any input reg that is implicitly popped by an asm, it is
92
      necessary to know how to adjust the stack to compensate for the pop.
93
      If any non-popped input is closer to the top of the reg-stack than
94
      the implicitly popped reg, it would not be possible to know what the
95
      stack looked like - it's not clear how the rest of the stack "slides
96
      up".
97
 
98
        All implicitly popped input regs must be closer to the top of
99
        the reg-stack than any input that is not implicitly popped.
100
 
101
   3. It is possible that if an input dies in an insn, reload might
102
      use the input reg for an output reload.  Consider this example:
103
 
104
                asm ("foo" : "=t" (a) : "f" (b));
105
 
106
      This asm says that input B is not popped by the asm, and that
107
      the asm pushes a result onto the reg-stack, i.e., the stack is one
108
      deeper after the asm than it was before.  But, it is possible that
109
      reload will think that it can use the same reg for both the input and
110
      the output, if input B dies in this insn.
111
 
112
        If any input operand uses the "f" constraint, all output reg
113
        constraints must use the "&" earlyclobber.
114
 
115
      The asm above would be written as
116
 
117
                asm ("foo" : "=&t" (a) : "f" (b));
118
 
119
   4. Some operands need to be in particular places on the stack.  All
120
      output operands fall in this category - there is no other way to
121
      know which regs the outputs appear in unless the user indicates
122
      this in the constraints.
123
 
124
        Output operands must specifically indicate which reg an output
125
        appears in after an asm.  "=f" is not allowed: the operand
126
        constraints must select a class with a single reg.
127
 
128
   5. Output operands may not be "inserted" between existing stack regs.
129
      Since no 387 opcode uses a read/write operand, all output operands
130
      are dead before the asm_operands, and are pushed by the asm_operands.
131
      It makes no sense to push anywhere but the top of the reg-stack.
132
 
133
        Output operands must start at the top of the reg-stack: output
134
        operands may not "skip" a reg.
135
 
136
   6. Some asm statements may need extra stack space for internal
137
      calculations.  This can be guaranteed by clobbering stack registers
138
      unrelated to the inputs and outputs.
139
 
140
   Here are a couple of reasonable asms to want to write.  This asm
141
   takes one input, which is internally popped, and produces two outputs.
142
 
143
        asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
144
 
145
   This asm takes two inputs, which are popped by the fyl2xp1 opcode,
146
   and replaces them with one output.  The user must code the "st(1)"
147
   clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
148
 
149
        asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
150
 
151
*/
152
 
153
#include "config.h"
154
#include "system.h"
155
#include "coretypes.h"
156
#include "tm.h"
157
#include "tree.h"
158
#include "rtl.h"
159
#include "tm_p.h"
160
#include "function.h"
161
#include "insn-config.h"
162
#include "regs.h"
163
#include "hard-reg-set.h"
164
#include "flags.h"
165
#include "toplev.h"
166
#include "recog.h"
167
#include "output.h"
168
#include "basic-block.h"
169
#include "varray.h"
170
#include "reload.h"
171
#include "ggc.h"
172
#include "timevar.h"
173
#include "tree-pass.h"
174
#include "target.h"
175
#include "vecprim.h"
176
 
177
#ifdef STACK_REGS
178
 
179
/* We use this array to cache info about insns, because otherwise we
180
   spend too much time in stack_regs_mentioned_p.
181
 
182
   Indexed by insn UIDs.  A value of zero is uninitialized, one indicates
183
   the insn uses stack registers, two indicates the insn does not use
184
   stack registers.  */
185
static VEC(char,heap) *stack_regs_mentioned_data;
186
 
187
#define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
188
 
189
int regstack_completed = 0;
190
 
191
/* This is the basic stack record.  TOP is an index into REG[] such
192
   that REG[TOP] is the top of stack.  If TOP is -1 the stack is empty.
193
 
194
   If TOP is -2, REG[] is not yet initialized.  Stack initialization
195
   consists of placing each live reg in array `reg' and setting `top'
196
   appropriately.
197
 
198
   REG_SET indicates which registers are live.  */
199
 
200
typedef struct stack_def
201
{
202
  int top;                      /* index to top stack element */
203
  HARD_REG_SET reg_set;         /* set of live registers */
204
  unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
205
} *stack;
206
 
207
/* This is used to carry information about basic blocks.  It is
208
   attached to the AUX field of the standard CFG block.  */
209
 
210
typedef struct block_info_def
211
{
212
  struct stack_def stack_in;    /* Input stack configuration.  */
213
  struct stack_def stack_out;   /* Output stack configuration.  */
214
  HARD_REG_SET out_reg_set;     /* Stack regs live on output.  */
215
  int done;                     /* True if block already converted.  */
216
  int predecessors;             /* Number of predecessors that need
217
                                   to be visited.  */
218
} *block_info;
219
 
220
#define BLOCK_INFO(B)   ((block_info) (B)->aux)
221
 
222
/* Passed to change_stack to indicate where to emit insns.  */
223
enum emit_where
224
{
225
  EMIT_AFTER,
226
  EMIT_BEFORE
227
};
228
 
229
/* The block we're currently working on.  */
230
static basic_block current_block;
231
 
232
/* In the current_block, whether we're processing the first register
233
   stack or call instruction, i.e. the regstack is currently the
234
   same as BLOCK_INFO(current_block)->stack_in.  */
235
static bool starting_stack_p;
236
 
237
/* This is the register file for all register after conversion.  */
238
static rtx
239
  FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
240
 
241
#define FP_MODE_REG(regno,mode) \
242
  (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
243
 
244
/* Used to initialize uninitialized registers.  */
245
static rtx not_a_num;
246
 
247
/* Forward declarations */
248
 
249
static int stack_regs_mentioned_p (rtx pat);
250
static void pop_stack (stack, int);
251
static rtx *get_true_reg (rtx *);
252
 
253
static int check_asm_stack_operands (rtx);
254
static int get_asm_operand_n_inputs (rtx);
255
static rtx stack_result (tree);
256
static void replace_reg (rtx *, int);
257
static void remove_regno_note (rtx, enum reg_note, unsigned int);
258
static int get_hard_regnum (stack, rtx);
259
static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where);
260
static void swap_to_top(rtx, stack, rtx, rtx);
261
static bool move_for_stack_reg (rtx, stack, rtx);
262
static bool move_nan_for_stack_reg (rtx, stack, rtx);
263
static int swap_rtx_condition_1 (rtx);
264
static int swap_rtx_condition (rtx);
265
static void compare_for_stack_reg (rtx, stack, rtx);
266
static bool subst_stack_regs_pat (rtx, stack, rtx);
267
static void subst_asm_stack_regs (rtx, stack);
268
static bool subst_stack_regs (rtx, stack);
269
static void change_stack (rtx, stack, stack, enum emit_where);
270
static void print_stack (FILE *, stack);
271
static rtx next_flags_user (rtx);
272
 
273
/* Return nonzero if any stack register is mentioned somewhere within PAT.  */
274
 
275
static int
276
stack_regs_mentioned_p (rtx pat)
277
{
278
  const char *fmt;
279
  int i;
280
 
281
  if (STACK_REG_P (pat))
282
    return 1;
283
 
284
  fmt = GET_RTX_FORMAT (GET_CODE (pat));
285
  for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
286
    {
287
      if (fmt[i] == 'E')
288
        {
289
          int j;
290
 
291
          for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
292
            if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
293
              return 1;
294
        }
295
      else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
296
        return 1;
297
    }
298
 
299
  return 0;
300
}
301
 
302
/* Return nonzero if INSN mentions stacked registers, else return zero.  */
303
 
304
int
305
stack_regs_mentioned (rtx insn)
306
{
307
  unsigned int uid, max;
308
  int test;
309
 
310
  if (! INSN_P (insn) || !stack_regs_mentioned_data)
311
    return 0;
312
 
313
  uid = INSN_UID (insn);
314
  max = VEC_length (char, stack_regs_mentioned_data);
315
  if (uid >= max)
316
    {
317
      char *p;
318
      unsigned int old_max = max;
319
 
320
      /* Allocate some extra size to avoid too many reallocs, but
321
         do not grow too quickly.  */
322
      max = uid + uid / 20 + 1;
323
      VEC_safe_grow (char, heap, stack_regs_mentioned_data, max);
324
      p = VEC_address (char, stack_regs_mentioned_data);
325
      memset (&p[old_max], 0,
326
              sizeof (char) * (max - old_max));
327
    }
328
 
329
  test = VEC_index (char, stack_regs_mentioned_data, uid);
330
  if (test == 0)
331
    {
332
      /* This insn has yet to be examined.  Do so now.  */
333
      test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
334
      VEC_replace (char, stack_regs_mentioned_data, uid, test);
335
    }
336
 
337
  return test == 1;
338
}
339
 
340
static rtx ix86_flags_rtx;
341
 
342
static rtx
343
next_flags_user (rtx insn)
344
{
345
  /* Search forward looking for the first use of this value.
346
     Stop at block boundaries.  */
347
 
348
  while (insn != BB_END (current_block))
349
    {
350
      insn = NEXT_INSN (insn);
351
 
352
      if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
353
        return insn;
354
 
355
      if (CALL_P (insn))
356
        return NULL_RTX;
357
    }
358
  return NULL_RTX;
359
}
360
 
361
/* Reorganize the stack into ascending numbers, before this insn.  */
362
 
363
static void
364
straighten_stack (rtx insn, stack regstack)
365
{
366
  struct stack_def temp_stack;
367
  int top;
368
 
369
  /* If there is only a single register on the stack, then the stack is
370
     already in increasing order and no reorganization is needed.
371
 
372
     Similarly if the stack is empty.  */
373
  if (regstack->top <= 0)
374
    return;
375
 
376
  COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
377
 
378
  for (top = temp_stack.top = regstack->top; top >= 0; top--)
379
    temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
380
 
381
  change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
382
}
383
 
384
/* Pop a register from the stack.  */
385
 
386
static void
387
pop_stack (stack regstack, int regno)
388
{
389
  int top = regstack->top;
390
 
391
  CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
392
  regstack->top--;
393
  /* If regno was not at the top of stack then adjust stack.  */
394
  if (regstack->reg [top] != regno)
395
    {
396
      int i;
397
      for (i = regstack->top; i >= 0; i--)
398
        if (regstack->reg [i] == regno)
399
          {
400
            int j;
401
            for (j = i; j < top; j++)
402
              regstack->reg [j] = regstack->reg [j + 1];
403
            break;
404
          }
405
    }
406
}
407
 
408
/* Return a pointer to the REG expression within PAT.  If PAT is not a
409
   REG, possible enclosed by a conversion rtx, return the inner part of
410
   PAT that stopped the search.  */
411
 
412
static rtx *
413
get_true_reg (rtx *pat)
414
{
415
  for (;;)
416
    switch (GET_CODE (*pat))
417
      {
418
      case SUBREG:
419
        /* Eliminate FP subregister accesses in favor of the
420
           actual FP register in use.  */
421
        {
422
          rtx subreg;
423
          if (FP_REG_P (subreg = SUBREG_REG (*pat)))
424
            {
425
              int regno_off = subreg_regno_offset (REGNO (subreg),
426
                                                   GET_MODE (subreg),
427
                                                   SUBREG_BYTE (*pat),
428
                                                   GET_MODE (*pat));
429
              *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
430
                                  GET_MODE (subreg));
431
            default:
432
              return pat;
433
            }
434
        }
435
      case FLOAT:
436
      case FIX:
437
      case FLOAT_EXTEND:
438
        pat = & XEXP (*pat, 0);
439
        break;
440
 
441
      case FLOAT_TRUNCATE:
442
        if (!flag_unsafe_math_optimizations)
443
          return pat;
444
        pat = & XEXP (*pat, 0);
445
        break;
446
      }
447
}
448
 
449
/* Set if we find any malformed asms in a block.  */
450
static bool any_malformed_asm;
451
 
452
/* There are many rules that an asm statement for stack-like regs must
453
   follow.  Those rules are explained at the top of this file: the rule
454
   numbers below refer to that explanation.  */
455
 
456
static int
457
check_asm_stack_operands (rtx insn)
458
{
459
  int i;
460
  int n_clobbers;
461
  int malformed_asm = 0;
462
  rtx body = PATTERN (insn);
463
 
464
  char reg_used_as_output[FIRST_PSEUDO_REGISTER];
465
  char implicitly_dies[FIRST_PSEUDO_REGISTER];
466
  int alt;
467
 
468
  rtx *clobber_reg = 0;
469
  int n_inputs, n_outputs;
470
 
471
  /* Find out what the constraints require.  If no constraint
472
     alternative matches, this asm is malformed.  */
473
  extract_insn (insn);
474
  constrain_operands (1);
475
  alt = which_alternative;
476
 
477
  preprocess_constraints ();
478
 
479
  n_inputs = get_asm_operand_n_inputs (body);
480
  n_outputs = recog_data.n_operands - n_inputs;
481
 
482
  if (alt < 0)
483
    {
484
      malformed_asm = 1;
485
      /* Avoid further trouble with this insn.  */
486
      PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
487
      return 0;
488
    }
489
 
490
  /* Strip SUBREGs here to make the following code simpler.  */
491
  for (i = 0; i < recog_data.n_operands; i++)
492
    if (GET_CODE (recog_data.operand[i]) == SUBREG
493
        && REG_P (SUBREG_REG (recog_data.operand[i])))
494
      recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
495
 
496
  /* Set up CLOBBER_REG.  */
497
 
498
  n_clobbers = 0;
499
 
500
  if (GET_CODE (body) == PARALLEL)
501
    {
502
      clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
503
 
504
      for (i = 0; i < XVECLEN (body, 0); i++)
505
        if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
506
          {
507
            rtx clobber = XVECEXP (body, 0, i);
508
            rtx reg = XEXP (clobber, 0);
509
 
510
            if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
511
              reg = SUBREG_REG (reg);
512
 
513
            if (STACK_REG_P (reg))
514
              {
515
                clobber_reg[n_clobbers] = reg;
516
                n_clobbers++;
517
              }
518
          }
519
    }
520
 
521
  /* Enforce rule #4: Output operands must specifically indicate which
522
     reg an output appears in after an asm.  "=f" is not allowed: the
523
     operand constraints must select a class with a single reg.
524
 
525
     Also enforce rule #5: Output operands must start at the top of
526
     the reg-stack: output operands may not "skip" a reg.  */
527
 
528
  memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
529
  for (i = 0; i < n_outputs; i++)
530
    if (STACK_REG_P (recog_data.operand[i]))
531
      {
532
        if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1)
533
          {
534
            error_for_asm (insn, "output constraint %d must specify a single register", i);
535
            malformed_asm = 1;
536
          }
537
        else
538
          {
539
            int j;
540
 
541
            for (j = 0; j < n_clobbers; j++)
542
              if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
543
                {
544
                  error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
545
                                 i, reg_names [REGNO (clobber_reg[j])]);
546
                  malformed_asm = 1;
547
                  break;
548
                }
549
            if (j == n_clobbers)
550
              reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
551
          }
552
      }
553
 
554
 
555
  /* Search for first non-popped reg.  */
556
  for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
557
    if (! reg_used_as_output[i])
558
      break;
559
 
560
  /* If there are any other popped regs, that's an error.  */
561
  for (; i < LAST_STACK_REG + 1; i++)
562
    if (reg_used_as_output[i])
563
      break;
564
 
565
  if (i != LAST_STACK_REG + 1)
566
    {
567
      error_for_asm (insn, "output regs must be grouped at top of stack");
568
      malformed_asm = 1;
569
    }
570
 
571
  /* Enforce rule #2: All implicitly popped input regs must be closer
572
     to the top of the reg-stack than any input that is not implicitly
573
     popped.  */
574
 
575
  memset (implicitly_dies, 0, sizeof (implicitly_dies));
576
  for (i = n_outputs; i < n_outputs + n_inputs; i++)
577
    if (STACK_REG_P (recog_data.operand[i]))
578
      {
579
        /* An input reg is implicitly popped if it is tied to an
580
           output, or if there is a CLOBBER for it.  */
581
        int j;
582
 
583
        for (j = 0; j < n_clobbers; j++)
584
          if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
585
            break;
586
 
587
        if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
588
          implicitly_dies[REGNO (recog_data.operand[i])] = 1;
589
      }
590
 
591
  /* Search for first non-popped reg.  */
592
  for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
593
    if (! implicitly_dies[i])
594
      break;
595
 
596
  /* If there are any other popped regs, that's an error.  */
597
  for (; i < LAST_STACK_REG + 1; i++)
598
    if (implicitly_dies[i])
599
      break;
600
 
601
  if (i != LAST_STACK_REG + 1)
602
    {
603
      error_for_asm (insn,
604
                     "implicitly popped regs must be grouped at top of stack");
605
      malformed_asm = 1;
606
    }
607
 
608
  /* Enforce rule #3: If any input operand uses the "f" constraint, all
609
     output constraints must use the "&" earlyclobber.
610
 
611
     ??? Detect this more deterministically by having constrain_asm_operands
612
     record any earlyclobber.  */
613
 
614
  for (i = n_outputs; i < n_outputs + n_inputs; i++)
615
    if (recog_op_alt[i][alt].matches == -1)
616
      {
617
        int j;
618
 
619
        for (j = 0; j < n_outputs; j++)
620
          if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
621
            {
622
              error_for_asm (insn,
623
                             "output operand %d must use %<&%> constraint", j);
624
              malformed_asm = 1;
625
            }
626
      }
627
 
628
  if (malformed_asm)
629
    {
630
      /* Avoid further trouble with this insn.  */
631
      PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
632
      any_malformed_asm = true;
633
      return 0;
634
    }
635
 
636
  return 1;
637
}
638
 
639
/* Calculate the number of inputs and outputs in BODY, an
640
   asm_operands.  N_OPERANDS is the total number of operands, and
641
   N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
642
   placed.  */
643
 
644
static int
645
get_asm_operand_n_inputs (rtx body)
646
{
647
  switch (GET_CODE (body))
648
    {
649
    case SET:
650
      gcc_assert (GET_CODE (SET_SRC (body)) == ASM_OPERANDS);
651
      return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
652
 
653
    case ASM_OPERANDS:
654
      return ASM_OPERANDS_INPUT_LENGTH (body);
655
 
656
    case PARALLEL:
657
      return get_asm_operand_n_inputs (XVECEXP (body, 0, 0));
658
 
659
    default:
660
      gcc_unreachable ();
661
    }
662
}
663
 
664
/* If current function returns its result in an fp stack register,
665
   return the REG.  Otherwise, return 0.  */
666
 
667
static rtx
668
stack_result (tree decl)
669
{
670
  rtx result;
671
 
672
  /* If the value is supposed to be returned in memory, then clearly
673
     it is not returned in a stack register.  */
674
  if (aggregate_value_p (DECL_RESULT (decl), decl))
675
    return 0;
676
 
677
  result = DECL_RTL_IF_SET (DECL_RESULT (decl));
678
  if (result != 0)
679
    result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)),
680
                                           decl, true);
681
 
682
  return result != 0 && STACK_REG_P (result) ? result : 0;
683
}
684
 
685
 
686
/*
687
 * This section deals with stack register substitution, and forms the second
688
 * pass over the RTL.
689
 */
690
 
691
/* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
692
   the desired hard REGNO.  */
693
 
694
static void
695
replace_reg (rtx *reg, int regno)
696
{
697
  gcc_assert (regno >= FIRST_STACK_REG);
698
  gcc_assert (regno <= LAST_STACK_REG);
699
  gcc_assert (STACK_REG_P (*reg));
700
 
701
  gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg))
702
              || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
703
 
704
  *reg = FP_MODE_REG (regno, GET_MODE (*reg));
705
}
706
 
707
/* Remove a note of type NOTE, which must be found, for register
708
   number REGNO from INSN.  Remove only one such note.  */
709
 
710
static void
711
remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
712
{
713
  rtx *note_link, this;
714
 
715
  note_link = &REG_NOTES (insn);
716
  for (this = *note_link; this; this = XEXP (this, 1))
717
    if (REG_NOTE_KIND (this) == note
718
        && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
719
      {
720
        *note_link = XEXP (this, 1);
721
        return;
722
      }
723
    else
724
      note_link = &XEXP (this, 1);
725
 
726
  gcc_unreachable ();
727
}
728
 
729
/* Find the hard register number of virtual register REG in REGSTACK.
730
   The hard register number is relative to the top of the stack.  -1 is
731
   returned if the register is not found.  */
732
 
733
static int
734
get_hard_regnum (stack regstack, rtx reg)
735
{
736
  int i;
737
 
738
  gcc_assert (STACK_REG_P (reg));
739
 
740
  for (i = regstack->top; i >= 0; i--)
741
    if (regstack->reg[i] == REGNO (reg))
742
      break;
743
 
744
  return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
745
}
746
 
747
/* Emit an insn to pop virtual register REG before or after INSN.
748
   REGSTACK is the stack state after INSN and is updated to reflect this
749
   pop.  WHEN is either emit_insn_before or emit_insn_after.  A pop insn
750
   is represented as a SET whose destination is the register to be popped
751
   and source is the top of stack.  A death note for the top of stack
752
   cases the movdf pattern to pop.  */
753
 
754
static rtx
755
emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where)
756
{
757
  rtx pop_insn, pop_rtx;
758
  int hard_regno;
759
 
760
  /* For complex types take care to pop both halves.  These may survive in
761
     CLOBBER and USE expressions.  */
762
  if (COMPLEX_MODE_P (GET_MODE (reg)))
763
    {
764
      rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
765
      rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
766
 
767
      pop_insn = NULL_RTX;
768
      if (get_hard_regnum (regstack, reg1) >= 0)
769
        pop_insn = emit_pop_insn (insn, regstack, reg1, where);
770
      if (get_hard_regnum (regstack, reg2) >= 0)
771
        pop_insn = emit_pop_insn (insn, regstack, reg2, where);
772
      gcc_assert (pop_insn);
773
      return pop_insn;
774
    }
775
 
776
  hard_regno = get_hard_regnum (regstack, reg);
777
 
778
  gcc_assert (hard_regno >= FIRST_STACK_REG);
779
 
780
  pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
781
                         FP_MODE_REG (FIRST_STACK_REG, DFmode));
782
 
783
  if (where == EMIT_AFTER)
784
    pop_insn = emit_insn_after (pop_rtx, insn);
785
  else
786
    pop_insn = emit_insn_before (pop_rtx, insn);
787
 
788
  REG_NOTES (pop_insn)
789
    = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
790
                         REG_NOTES (pop_insn));
791
 
792
  regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
793
    = regstack->reg[regstack->top];
794
  regstack->top -= 1;
795
  CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
796
 
797
  return pop_insn;
798
}
799
 
800
/* Emit an insn before or after INSN to swap virtual register REG with
801
   the top of stack.  REGSTACK is the stack state before the swap, and
802
   is updated to reflect the swap.  A swap insn is represented as a
803
   PARALLEL of two patterns: each pattern moves one reg to the other.
804
 
805
   If REG is already at the top of the stack, no insn is emitted.  */
806
 
807
static void
808
emit_swap_insn (rtx insn, stack regstack, rtx reg)
809
{
810
  int hard_regno;
811
  rtx swap_rtx;
812
  int tmp, other_reg;           /* swap regno temps */
813
  rtx i1;                       /* the stack-reg insn prior to INSN */
814
  rtx i1set = NULL_RTX;         /* the SET rtx within I1 */
815
 
816
  hard_regno = get_hard_regnum (regstack, reg);
817
 
818
  if (hard_regno == FIRST_STACK_REG)
819
    return;
820
  if (hard_regno == -1)
821
    {
822
      /* Something failed if the register wasn't on the stack.  If we had
823
         malformed asms, we zapped the instruction itself, but that didn't
824
         produce the same pattern of register sets as before.  To prevent
825
         further failure, adjust REGSTACK to include REG at TOP.  */
826
      gcc_assert (any_malformed_asm);
827
      regstack->reg[++regstack->top] = REGNO (reg);
828
      return;
829
    }
830
  gcc_assert (hard_regno >= FIRST_STACK_REG);
831
 
832
  other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
833
 
834
  tmp = regstack->reg[other_reg];
835
  regstack->reg[other_reg] = regstack->reg[regstack->top];
836
  regstack->reg[regstack->top] = tmp;
837
 
838
  /* Find the previous insn involving stack regs, but don't pass a
839
     block boundary.  */
840
  i1 = NULL;
841
  if (current_block && insn != BB_HEAD (current_block))
842
    {
843
      rtx tmp = PREV_INSN (insn);
844
      rtx limit = PREV_INSN (BB_HEAD (current_block));
845
      while (tmp != limit)
846
        {
847
          if (LABEL_P (tmp)
848
              || CALL_P (tmp)
849
              || NOTE_INSN_BASIC_BLOCK_P (tmp)
850
              || (NONJUMP_INSN_P (tmp)
851
                  && stack_regs_mentioned (tmp)))
852
            {
853
              i1 = tmp;
854
              break;
855
            }
856
          tmp = PREV_INSN (tmp);
857
        }
858
    }
859
 
860
  if (i1 != NULL_RTX
861
      && (i1set = single_set (i1)) != NULL_RTX)
862
    {
863
      rtx i1src = *get_true_reg (&SET_SRC (i1set));
864
      rtx i1dest = *get_true_reg (&SET_DEST (i1set));
865
 
866
      /* If the previous register stack push was from the reg we are to
867
         swap with, omit the swap.  */
868
 
869
      if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
870
          && REG_P (i1src)
871
          && REGNO (i1src) == (unsigned) hard_regno - 1
872
          && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
873
        return;
874
 
875
      /* If the previous insn wrote to the reg we are to swap with,
876
         omit the swap.  */
877
 
878
      if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
879
          && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
880
          && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
881
        return;
882
    }
883
 
884
  /* Avoid emitting the swap if this is the first register stack insn
885
     of the current_block.  Instead update the current_block's stack_in
886
     and let compensate edges take care of this for us.  */
887
  if (current_block && starting_stack_p)
888
    {
889
      BLOCK_INFO (current_block)->stack_in = *regstack;
890
      starting_stack_p = false;
891
      return;
892
    }
893
 
894
  swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
895
                         FP_MODE_REG (FIRST_STACK_REG, XFmode));
896
 
897
  if (i1)
898
    emit_insn_after (swap_rtx, i1);
899
  else if (current_block)
900
    emit_insn_before (swap_rtx, BB_HEAD (current_block));
901
  else
902
    emit_insn_before (swap_rtx, insn);
903
}
904
 
905
/* Emit an insns before INSN to swap virtual register SRC1 with
906
   the top of stack and virtual register SRC2 with second stack
907
   slot. REGSTACK is the stack state before the swaps, and
908
   is updated to reflect the swaps.  A swap insn is represented as a
909
   PARALLEL of two patterns: each pattern moves one reg to the other.
910
 
911
   If SRC1 and/or SRC2 are already at the right place, no swap insn
912
   is emitted.  */
913
 
914
static void
915
swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2)
916
{
917
  struct stack_def temp_stack;
918
  int regno, j, k, temp;
919
 
920
  temp_stack = *regstack;
921
 
922
  /* Place operand 1 at the top of stack.  */
923
  regno = get_hard_regnum (&temp_stack, src1);
924
  gcc_assert (regno >= 0);
925
  if (regno != FIRST_STACK_REG)
926
    {
927
      k = temp_stack.top - (regno - FIRST_STACK_REG);
928
      j = temp_stack.top;
929
 
930
      temp = temp_stack.reg[k];
931
      temp_stack.reg[k] = temp_stack.reg[j];
932
      temp_stack.reg[j] = temp;
933
    }
934
 
935
  /* Place operand 2 next on the stack.  */
936
  regno = get_hard_regnum (&temp_stack, src2);
937
  gcc_assert (regno >= 0);
938
  if (regno != FIRST_STACK_REG + 1)
939
    {
940
      k = temp_stack.top - (regno - FIRST_STACK_REG);
941
      j = temp_stack.top - 1;
942
 
943
      temp = temp_stack.reg[k];
944
      temp_stack.reg[k] = temp_stack.reg[j];
945
      temp_stack.reg[j] = temp;
946
    }
947
 
948
  change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
949
}
950
 
951
/* Handle a move to or from a stack register in PAT, which is in INSN.
952
   REGSTACK is the current stack.  Return whether a control flow insn
953
   was deleted in the process.  */
954
 
955
static bool
956
move_for_stack_reg (rtx insn, stack regstack, rtx pat)
957
{
958
  rtx *psrc =  get_true_reg (&SET_SRC (pat));
959
  rtx *pdest = get_true_reg (&SET_DEST (pat));
960
  rtx src, dest;
961
  rtx note;
962
  bool control_flow_insn_deleted = false;
963
 
964
  src = *psrc; dest = *pdest;
965
 
966
  if (STACK_REG_P (src) && STACK_REG_P (dest))
967
    {
968
      /* Write from one stack reg to another.  If SRC dies here, then
969
         just change the register mapping and delete the insn.  */
970
 
971
      note = find_regno_note (insn, REG_DEAD, REGNO (src));
972
      if (note)
973
        {
974
          int i;
975
 
976
          /* If this is a no-op move, there must not be a REG_DEAD note.  */
977
          gcc_assert (REGNO (src) != REGNO (dest));
978
 
979
          for (i = regstack->top; i >= 0; i--)
980
            if (regstack->reg[i] == REGNO (src))
981
              break;
982
 
983
          /* The destination must be dead, or life analysis is borked.  */
984
          gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
985
 
986
          /* If the source is not live, this is yet another case of
987
             uninitialized variables.  Load up a NaN instead.  */
988
          if (i < 0)
989
            return move_nan_for_stack_reg (insn, regstack, dest);
990
 
991
          /* It is possible that the dest is unused after this insn.
992
             If so, just pop the src.  */
993
 
994
          if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
995
            emit_pop_insn (insn, regstack, src, EMIT_AFTER);
996
          else
997
            {
998
              regstack->reg[i] = REGNO (dest);
999
              SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1000
              CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1001
            }
1002
 
1003
          control_flow_insn_deleted |= control_flow_insn_p (insn);
1004
          delete_insn (insn);
1005
          return control_flow_insn_deleted;
1006
        }
1007
 
1008
      /* The source reg does not die.  */
1009
 
1010
      /* If this appears to be a no-op move, delete it, or else it
1011
         will confuse the machine description output patterns. But if
1012
         it is REG_UNUSED, we must pop the reg now, as per-insn processing
1013
         for REG_UNUSED will not work for deleted insns.  */
1014
 
1015
      if (REGNO (src) == REGNO (dest))
1016
        {
1017
          if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1018
            emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1019
 
1020
          control_flow_insn_deleted |= control_flow_insn_p (insn);
1021
          delete_insn (insn);
1022
          return control_flow_insn_deleted;
1023
        }
1024
 
1025
      /* The destination ought to be dead.  */
1026
      gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1027
 
1028
      replace_reg (psrc, get_hard_regnum (regstack, src));
1029
 
1030
      regstack->reg[++regstack->top] = REGNO (dest);
1031
      SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1032
      replace_reg (pdest, FIRST_STACK_REG);
1033
    }
1034
  else if (STACK_REG_P (src))
1035
    {
1036
      /* Save from a stack reg to MEM, or possibly integer reg.  Since
1037
         only top of stack may be saved, emit an exchange first if
1038
         needs be.  */
1039
 
1040
      emit_swap_insn (insn, regstack, src);
1041
 
1042
      note = find_regno_note (insn, REG_DEAD, REGNO (src));
1043
      if (note)
1044
        {
1045
          replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1046
          regstack->top--;
1047
          CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1048
        }
1049
      else if ((GET_MODE (src) == XFmode)
1050
               && regstack->top < REG_STACK_SIZE - 1)
1051
        {
1052
          /* A 387 cannot write an XFmode value to a MEM without
1053
             clobbering the source reg.  The output code can handle
1054
             this by reading back the value from the MEM.
1055
             But it is more efficient to use a temp register if one is
1056
             available.  Push the source value here if the register
1057
             stack is not full, and then write the value to memory via
1058
             a pop.  */
1059
          rtx push_rtx;
1060
          rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1061
 
1062
          push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1063
          emit_insn_before (push_rtx, insn);
1064
          REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1065
                                                REG_NOTES (insn));
1066
        }
1067
 
1068
      replace_reg (psrc, FIRST_STACK_REG);
1069
    }
1070
  else
1071
    {
1072
      gcc_assert (STACK_REG_P (dest));
1073
 
1074
      /* Load from MEM, or possibly integer REG or constant, into the
1075
         stack regs.  The actual target is always the top of the
1076
         stack. The stack mapping is changed to reflect that DEST is
1077
         now at top of stack.  */
1078
 
1079
      /* The destination ought to be dead.  */
1080
      gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1081
 
1082
      gcc_assert (regstack->top < REG_STACK_SIZE);
1083
 
1084
      regstack->reg[++regstack->top] = REGNO (dest);
1085
      SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1086
      replace_reg (pdest, FIRST_STACK_REG);
1087
    }
1088
 
1089
  return control_flow_insn_deleted;
1090
}
1091
 
1092
/* A helper function which replaces INSN with a pattern that loads up
1093
   a NaN into DEST, then invokes move_for_stack_reg.  */
1094
 
1095
static bool
1096
move_nan_for_stack_reg (rtx insn, stack regstack, rtx dest)
1097
{
1098
  rtx pat;
1099
 
1100
  dest = FP_MODE_REG (REGNO (dest), SFmode);
1101
  pat = gen_rtx_SET (VOIDmode, dest, not_a_num);
1102
  PATTERN (insn) = pat;
1103
  INSN_CODE (insn) = -1;
1104
 
1105
  return move_for_stack_reg (insn, regstack, pat);
1106
}
1107
 
1108
/* Swap the condition on a branch, if there is one.  Return true if we
1109
   found a condition to swap.  False if the condition was not used as
1110
   such.  */
1111
 
1112
static int
1113
swap_rtx_condition_1 (rtx pat)
1114
{
1115
  const char *fmt;
1116
  int i, r = 0;
1117
 
1118
  if (COMPARISON_P (pat))
1119
    {
1120
      PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1121
      r = 1;
1122
    }
1123
  else
1124
    {
1125
      fmt = GET_RTX_FORMAT (GET_CODE (pat));
1126
      for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1127
        {
1128
          if (fmt[i] == 'E')
1129
            {
1130
              int j;
1131
 
1132
              for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1133
                r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1134
            }
1135
          else if (fmt[i] == 'e')
1136
            r |= swap_rtx_condition_1 (XEXP (pat, i));
1137
        }
1138
    }
1139
 
1140
  return r;
1141
}
1142
 
1143
static int
1144
swap_rtx_condition (rtx insn)
1145
{
1146
  rtx pat = PATTERN (insn);
1147
 
1148
  /* We're looking for a single set to cc0 or an HImode temporary.  */
1149
 
1150
  if (GET_CODE (pat) == SET
1151
      && REG_P (SET_DEST (pat))
1152
      && REGNO (SET_DEST (pat)) == FLAGS_REG)
1153
    {
1154
      insn = next_flags_user (insn);
1155
      if (insn == NULL_RTX)
1156
        return 0;
1157
      pat = PATTERN (insn);
1158
    }
1159
 
1160
  /* See if this is, or ends in, a fnstsw.  If so, we're not doing anything
1161
     with the cc value right now.  We may be able to search for one
1162
     though.  */
1163
 
1164
  if (GET_CODE (pat) == SET
1165
      && GET_CODE (SET_SRC (pat)) == UNSPEC
1166
      && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1167
    {
1168
      rtx dest = SET_DEST (pat);
1169
 
1170
      /* Search forward looking for the first use of this value.
1171
         Stop at block boundaries.  */
1172
      while (insn != BB_END (current_block))
1173
        {
1174
          insn = NEXT_INSN (insn);
1175
          if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1176
            break;
1177
          if (CALL_P (insn))
1178
            return 0;
1179
        }
1180
 
1181
      /* We haven't found it.  */
1182
      if (insn == BB_END (current_block))
1183
        return 0;
1184
 
1185
      /* So we've found the insn using this value.  If it is anything
1186
         other than sahf or the value does not die (meaning we'd have
1187
         to search further), then we must give up.  */
1188
      pat = PATTERN (insn);
1189
      if (GET_CODE (pat) != SET
1190
          || GET_CODE (SET_SRC (pat)) != UNSPEC
1191
          || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1192
          || ! dead_or_set_p (insn, dest))
1193
        return 0;
1194
 
1195
      /* Now we are prepared to handle this as a normal cc0 setter.  */
1196
      insn = next_flags_user (insn);
1197
      if (insn == NULL_RTX)
1198
        return 0;
1199
      pat = PATTERN (insn);
1200
    }
1201
 
1202
  if (swap_rtx_condition_1 (pat))
1203
    {
1204
      int fail = 0;
1205
      INSN_CODE (insn) = -1;
1206
      if (recog_memoized (insn) == -1)
1207
        fail = 1;
1208
      /* In case the flags don't die here, recurse to try fix
1209
         following user too.  */
1210
      else if (! dead_or_set_p (insn, ix86_flags_rtx))
1211
        {
1212
          insn = next_flags_user (insn);
1213
          if (!insn || !swap_rtx_condition (insn))
1214
            fail = 1;
1215
        }
1216
      if (fail)
1217
        {
1218
          swap_rtx_condition_1 (pat);
1219
          return 0;
1220
        }
1221
      return 1;
1222
    }
1223
  return 0;
1224
}
1225
 
1226
/* Handle a comparison.  Special care needs to be taken to avoid
1227
   causing comparisons that a 387 cannot do correctly, such as EQ.
1228
 
1229
   Also, a pop insn may need to be emitted.  The 387 does have an
1230
   `fcompp' insn that can pop two regs, but it is sometimes too expensive
1231
   to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1232
   set up.  */
1233
 
1234
static void
1235
compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src)
1236
{
1237
  rtx *src1, *src2;
1238
  rtx src1_note, src2_note;
1239
 
1240
  src1 = get_true_reg (&XEXP (pat_src, 0));
1241
  src2 = get_true_reg (&XEXP (pat_src, 1));
1242
 
1243
  /* ??? If fxch turns out to be cheaper than fstp, give priority to
1244
     registers that die in this insn - move those to stack top first.  */
1245
  if ((! STACK_REG_P (*src1)
1246
       || (STACK_REG_P (*src2)
1247
           && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1248
      && swap_rtx_condition (insn))
1249
    {
1250
      rtx temp;
1251
      temp = XEXP (pat_src, 0);
1252
      XEXP (pat_src, 0) = XEXP (pat_src, 1);
1253
      XEXP (pat_src, 1) = temp;
1254
 
1255
      src1 = get_true_reg (&XEXP (pat_src, 0));
1256
      src2 = get_true_reg (&XEXP (pat_src, 1));
1257
 
1258
      INSN_CODE (insn) = -1;
1259
    }
1260
 
1261
  /* We will fix any death note later.  */
1262
 
1263
  src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1264
 
1265
  if (STACK_REG_P (*src2))
1266
    src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1267
  else
1268
    src2_note = NULL_RTX;
1269
 
1270
  emit_swap_insn (insn, regstack, *src1);
1271
 
1272
  replace_reg (src1, FIRST_STACK_REG);
1273
 
1274
  if (STACK_REG_P (*src2))
1275
    replace_reg (src2, get_hard_regnum (regstack, *src2));
1276
 
1277
  if (src1_note)
1278
    {
1279
      pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1280
      replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1281
    }
1282
 
1283
  /* If the second operand dies, handle that.  But if the operands are
1284
     the same stack register, don't bother, because only one death is
1285
     needed, and it was just handled.  */
1286
 
1287
  if (src2_note
1288
      && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1289
            && REGNO (*src1) == REGNO (*src2)))
1290
    {
1291
      /* As a special case, two regs may die in this insn if src2 is
1292
         next to top of stack and the top of stack also dies.  Since
1293
         we have already popped src1, "next to top of stack" is really
1294
         at top (FIRST_STACK_REG) now.  */
1295
 
1296
      if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1297
          && src1_note)
1298
        {
1299
          pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1300
          replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1301
        }
1302
      else
1303
        {
1304
          /* The 386 can only represent death of the first operand in
1305
             the case handled above.  In all other cases, emit a separate
1306
             pop and remove the death note from here.  */
1307
 
1308
          /* link_cc0_insns (insn); */
1309
 
1310
          remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1311
 
1312
          emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1313
                         EMIT_AFTER);
1314
        }
1315
    }
1316
}
1317
 
1318
/* Substitute new registers in PAT, which is part of INSN.  REGSTACK
1319
   is the current register layout.  Return whether a control flow insn
1320
   was deleted in the process.  */
1321
 
1322
static bool
1323
subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
1324
{
1325
  rtx *dest, *src;
1326
  bool control_flow_insn_deleted = false;
1327
 
1328
  switch (GET_CODE (pat))
1329
    {
1330
    case USE:
1331
      /* Deaths in USE insns can happen in non optimizing compilation.
1332
         Handle them by popping the dying register.  */
1333
      src = get_true_reg (&XEXP (pat, 0));
1334
      if (STACK_REG_P (*src)
1335
          && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1336
        {
1337
          emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1338
          return control_flow_insn_deleted;
1339
        }
1340
      /* ??? Uninitialized USE should not happen.  */
1341
      else
1342
        gcc_assert (get_hard_regnum (regstack, *src) != -1);
1343
      break;
1344
 
1345
    case CLOBBER:
1346
      {
1347
        rtx note;
1348
 
1349
        dest = get_true_reg (&XEXP (pat, 0));
1350
        if (STACK_REG_P (*dest))
1351
          {
1352
            note = find_reg_note (insn, REG_DEAD, *dest);
1353
 
1354
            if (pat != PATTERN (insn))
1355
              {
1356
                /* The fix_truncdi_1 pattern wants to be able to allocate
1357
                   its own scratch register.  It does this by clobbering
1358
                   an fp reg so that it is assured of an empty reg-stack
1359
                   register.  If the register is live, kill it now.
1360
                   Remove the DEAD/UNUSED note so we don't try to kill it
1361
                   later too.  */
1362
 
1363
                if (note)
1364
                  emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1365
                else
1366
                  {
1367
                    note = find_reg_note (insn, REG_UNUSED, *dest);
1368
                    gcc_assert (note);
1369
                  }
1370
                remove_note (insn, note);
1371
                replace_reg (dest, FIRST_STACK_REG + 1);
1372
              }
1373
            else
1374
              {
1375
                /* A top-level clobber with no REG_DEAD, and no hard-regnum
1376
                   indicates an uninitialized value.  Because reload removed
1377
                   all other clobbers, this must be due to a function
1378
                   returning without a value.  Load up a NaN.  */
1379
 
1380
                if (!note)
1381
                  {
1382
                    rtx t = *dest;
1383
                    if (COMPLEX_MODE_P (GET_MODE (t)))
1384
                      {
1385
                        rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode);
1386
                        if (get_hard_regnum (regstack, u) == -1)
1387
                          {
1388
                            rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u);
1389
                            rtx insn2 = emit_insn_before (pat2, insn);
1390
                            control_flow_insn_deleted
1391
                              |= move_nan_for_stack_reg (insn2, regstack, u);
1392
                          }
1393
                      }
1394
                    if (get_hard_regnum (regstack, t) == -1)
1395
                      control_flow_insn_deleted
1396
                        |= move_nan_for_stack_reg (insn, regstack, t);
1397
                  }
1398
              }
1399
          }
1400
        break;
1401
      }
1402
 
1403
    case SET:
1404
      {
1405
        rtx *src1 = (rtx *) 0, *src2;
1406
        rtx src1_note, src2_note;
1407
        rtx pat_src;
1408
 
1409
        dest = get_true_reg (&SET_DEST (pat));
1410
        src  = get_true_reg (&SET_SRC (pat));
1411
        pat_src = SET_SRC (pat);
1412
 
1413
        /* See if this is a `movM' pattern, and handle elsewhere if so.  */
1414
        if (STACK_REG_P (*src)
1415
            || (STACK_REG_P (*dest)
1416
                && (REG_P (*src) || MEM_P (*src)
1417
                    || GET_CODE (*src) == CONST_DOUBLE)))
1418
          {
1419
            control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1420
            break;
1421
          }
1422
 
1423
        switch (GET_CODE (pat_src))
1424
          {
1425
          case COMPARE:
1426
            compare_for_stack_reg (insn, regstack, pat_src);
1427
            break;
1428
 
1429
          case CALL:
1430
            {
1431
              int count;
1432
              for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
1433
                   --count >= 0;)
1434
                {
1435
                  regstack->reg[++regstack->top] = REGNO (*dest) + count;
1436
                  SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1437
                }
1438
            }
1439
            replace_reg (dest, FIRST_STACK_REG);
1440
            break;
1441
 
1442
          case REG:
1443
            /* This is a `tstM2' case.  */
1444
            gcc_assert (*dest == cc0_rtx);
1445
            src1 = src;
1446
 
1447
            /* Fall through.  */
1448
 
1449
          case FLOAT_TRUNCATE:
1450
          case SQRT:
1451
          case ABS:
1452
          case NEG:
1453
            /* These insns only operate on the top of the stack. DEST might
1454
               be cc0_rtx if we're processing a tstM pattern. Also, it's
1455
               possible that the tstM case results in a REG_DEAD note on the
1456
               source.  */
1457
 
1458
            if (src1 == 0)
1459
              src1 = get_true_reg (&XEXP (pat_src, 0));
1460
 
1461
            emit_swap_insn (insn, regstack, *src1);
1462
 
1463
            src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1464
 
1465
            if (STACK_REG_P (*dest))
1466
              replace_reg (dest, FIRST_STACK_REG);
1467
 
1468
            if (src1_note)
1469
              {
1470
                replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1471
                regstack->top--;
1472
                CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1473
              }
1474
 
1475
            replace_reg (src1, FIRST_STACK_REG);
1476
            break;
1477
 
1478
          case MINUS:
1479
          case DIV:
1480
            /* On i386, reversed forms of subM3 and divM3 exist for
1481
               MODE_FLOAT, so the same code that works for addM3 and mulM3
1482
               can be used.  */
1483
          case MULT:
1484
          case PLUS:
1485
            /* These insns can accept the top of stack as a destination
1486
               from a stack reg or mem, or can use the top of stack as a
1487
               source and some other stack register (possibly top of stack)
1488
               as a destination.  */
1489
 
1490
            src1 = get_true_reg (&XEXP (pat_src, 0));
1491
            src2 = get_true_reg (&XEXP (pat_src, 1));
1492
 
1493
            /* We will fix any death note later.  */
1494
 
1495
            if (STACK_REG_P (*src1))
1496
              src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1497
            else
1498
              src1_note = NULL_RTX;
1499
            if (STACK_REG_P (*src2))
1500
              src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1501
            else
1502
              src2_note = NULL_RTX;
1503
 
1504
            /* If either operand is not a stack register, then the dest
1505
               must be top of stack.  */
1506
 
1507
            if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1508
              emit_swap_insn (insn, regstack, *dest);
1509
            else
1510
              {
1511
                /* Both operands are REG.  If neither operand is already
1512
                   at the top of stack, choose to make the one that is the dest
1513
                   the new top of stack.  */
1514
 
1515
                int src1_hard_regnum, src2_hard_regnum;
1516
 
1517
                src1_hard_regnum = get_hard_regnum (regstack, *src1);
1518
                src2_hard_regnum = get_hard_regnum (regstack, *src2);
1519
                gcc_assert (src1_hard_regnum != -1);
1520
                gcc_assert (src2_hard_regnum != -1);
1521
 
1522
                if (src1_hard_regnum != FIRST_STACK_REG
1523
                    && src2_hard_regnum != FIRST_STACK_REG)
1524
                  emit_swap_insn (insn, regstack, *dest);
1525
              }
1526
 
1527
            if (STACK_REG_P (*src1))
1528
              replace_reg (src1, get_hard_regnum (regstack, *src1));
1529
            if (STACK_REG_P (*src2))
1530
              replace_reg (src2, get_hard_regnum (regstack, *src2));
1531
 
1532
            if (src1_note)
1533
              {
1534
                rtx src1_reg = XEXP (src1_note, 0);
1535
 
1536
                /* If the register that dies is at the top of stack, then
1537
                   the destination is somewhere else - merely substitute it.
1538
                   But if the reg that dies is not at top of stack, then
1539
                   move the top of stack to the dead reg, as though we had
1540
                   done the insn and then a store-with-pop.  */
1541
 
1542
                if (REGNO (src1_reg) == regstack->reg[regstack->top])
1543
                  {
1544
                    SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1545
                    replace_reg (dest, get_hard_regnum (regstack, *dest));
1546
                  }
1547
                else
1548
                  {
1549
                    int regno = get_hard_regnum (regstack, src1_reg);
1550
 
1551
                    SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1552
                    replace_reg (dest, regno);
1553
 
1554
                    regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1555
                      = regstack->reg[regstack->top];
1556
                  }
1557
 
1558
                CLEAR_HARD_REG_BIT (regstack->reg_set,
1559
                                    REGNO (XEXP (src1_note, 0)));
1560
                replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1561
                regstack->top--;
1562
              }
1563
            else if (src2_note)
1564
              {
1565
                rtx src2_reg = XEXP (src2_note, 0);
1566
                if (REGNO (src2_reg) == regstack->reg[regstack->top])
1567
                  {
1568
                    SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1569
                    replace_reg (dest, get_hard_regnum (regstack, *dest));
1570
                  }
1571
                else
1572
                  {
1573
                    int regno = get_hard_regnum (regstack, src2_reg);
1574
 
1575
                    SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1576
                    replace_reg (dest, regno);
1577
 
1578
                    regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1579
                      = regstack->reg[regstack->top];
1580
                  }
1581
 
1582
                CLEAR_HARD_REG_BIT (regstack->reg_set,
1583
                                    REGNO (XEXP (src2_note, 0)));
1584
                replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1585
                regstack->top--;
1586
              }
1587
            else
1588
              {
1589
                SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1590
                replace_reg (dest, get_hard_regnum (regstack, *dest));
1591
              }
1592
 
1593
            /* Keep operand 1 matching with destination.  */
1594
            if (COMMUTATIVE_ARITH_P (pat_src)
1595
                && REG_P (*src1) && REG_P (*src2)
1596
                && REGNO (*src1) != REGNO (*dest))
1597
             {
1598
                int tmp = REGNO (*src1);
1599
                replace_reg (src1, REGNO (*src2));
1600
                replace_reg (src2, tmp);
1601
             }
1602
            break;
1603
 
1604
          case UNSPEC:
1605
            switch (XINT (pat_src, 1))
1606
              {
1607
              case UNSPEC_FIST:
1608
 
1609
              case UNSPEC_FIST_FLOOR:
1610
              case UNSPEC_FIST_CEIL:
1611
 
1612
                /* These insns only operate on the top of the stack.  */
1613
 
1614
                src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1615
                emit_swap_insn (insn, regstack, *src1);
1616
 
1617
                src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1618
 
1619
                if (STACK_REG_P (*dest))
1620
                  replace_reg (dest, FIRST_STACK_REG);
1621
 
1622
                if (src1_note)
1623
                  {
1624
                    replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1625
                    regstack->top--;
1626
                    CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1627
                  }
1628
 
1629
                replace_reg (src1, FIRST_STACK_REG);
1630
                break;
1631
 
1632
              case UNSPEC_SIN:
1633
              case UNSPEC_COS:
1634
              case UNSPEC_FRNDINT:
1635
              case UNSPEC_F2XM1:
1636
 
1637
              case UNSPEC_FRNDINT_FLOOR:
1638
              case UNSPEC_FRNDINT_CEIL:
1639
              case UNSPEC_FRNDINT_TRUNC:
1640
              case UNSPEC_FRNDINT_MASK_PM:
1641
 
1642
                /* These insns only operate on the top of the stack.  */
1643
 
1644
                src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1645
 
1646
                emit_swap_insn (insn, regstack, *src1);
1647
 
1648
                /* Input should never die, it is
1649
                   replaced with output.  */
1650
                src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1651
                gcc_assert (!src1_note);
1652
 
1653
                if (STACK_REG_P (*dest))
1654
                  replace_reg (dest, FIRST_STACK_REG);
1655
 
1656
                replace_reg (src1, FIRST_STACK_REG);
1657
                break;
1658
 
1659
              case UNSPEC_FPATAN:
1660
              case UNSPEC_FYL2X:
1661
              case UNSPEC_FYL2XP1:
1662
                /* These insns operate on the top two stack slots.  */
1663
 
1664
                src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1665
                src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1666
 
1667
                src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1668
                src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1669
 
1670
                swap_to_top (insn, regstack, *src1, *src2);
1671
 
1672
                replace_reg (src1, FIRST_STACK_REG);
1673
                replace_reg (src2, FIRST_STACK_REG + 1);
1674
 
1675
                if (src1_note)
1676
                  replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1677
                if (src2_note)
1678
                  replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1679
 
1680
                /* Pop both input operands from the stack.  */
1681
                CLEAR_HARD_REG_BIT (regstack->reg_set,
1682
                                    regstack->reg[regstack->top]);
1683
                CLEAR_HARD_REG_BIT (regstack->reg_set,
1684
                                    regstack->reg[regstack->top - 1]);
1685
                regstack->top -= 2;
1686
 
1687
                /* Push the result back onto the stack.  */
1688
                regstack->reg[++regstack->top] = REGNO (*dest);
1689
                SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1690
                replace_reg (dest, FIRST_STACK_REG);
1691
                break;
1692
 
1693
              case UNSPEC_FSCALE_FRACT:
1694
              case UNSPEC_FPREM_F:
1695
              case UNSPEC_FPREM1_F:
1696
                /* These insns operate on the top two stack slots.
1697
                   first part of double input, double output insn.  */
1698
 
1699
                src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1700
                src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1701
 
1702
                src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1703
                src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1704
 
1705
                /* Inputs should never die, they are
1706
                   replaced with outputs.  */
1707
                gcc_assert (!src1_note);
1708
                gcc_assert (!src2_note);
1709
 
1710
                swap_to_top (insn, regstack, *src1, *src2);
1711
 
1712
                /* Push the result back onto stack. Empty stack slot
1713
                   will be filled in second part of insn.  */
1714
                if (STACK_REG_P (*dest)) {
1715
                  regstack->reg[regstack->top] = REGNO (*dest);
1716
                  SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1717
                  replace_reg (dest, FIRST_STACK_REG);
1718
                }
1719
 
1720
                replace_reg (src1, FIRST_STACK_REG);
1721
                replace_reg (src2, FIRST_STACK_REG + 1);
1722
                break;
1723
 
1724
              case UNSPEC_FSCALE_EXP:
1725
              case UNSPEC_FPREM_U:
1726
              case UNSPEC_FPREM1_U:
1727
                /* These insns operate on the top two stack slots./
1728
                   second part of double input, double output insn.  */
1729
 
1730
                src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1731
                src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1732
 
1733
                src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1734
                src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1735
 
1736
                /* Inputs should never die, they are
1737
                   replaced with outputs.  */
1738
                gcc_assert (!src1_note);
1739
                gcc_assert (!src2_note);
1740
 
1741
                swap_to_top (insn, regstack, *src1, *src2);
1742
 
1743
                /* Push the result back onto stack. Fill empty slot from
1744
                   first part of insn and fix top of stack pointer.  */
1745
                if (STACK_REG_P (*dest)) {
1746
                  regstack->reg[regstack->top - 1] = REGNO (*dest);
1747
                  SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1748
                  replace_reg (dest, FIRST_STACK_REG + 1);
1749
                }
1750
 
1751
                replace_reg (src1, FIRST_STACK_REG);
1752
                replace_reg (src2, FIRST_STACK_REG + 1);
1753
                break;
1754
 
1755
              case UNSPEC_SINCOS_COS:
1756
              case UNSPEC_TAN_ONE:
1757
              case UNSPEC_XTRACT_FRACT:
1758
                /* These insns operate on the top two stack slots,
1759
                   first part of one input, double output insn.  */
1760
 
1761
                src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1762
 
1763
                emit_swap_insn (insn, regstack, *src1);
1764
 
1765
                /* Input should never die, it is
1766
                   replaced with output.  */
1767
                src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1768
                gcc_assert (!src1_note);
1769
 
1770
                /* Push the result back onto stack. Empty stack slot
1771
                   will be filled in second part of insn.  */
1772
                if (STACK_REG_P (*dest)) {
1773
                  regstack->reg[regstack->top + 1] = REGNO (*dest);
1774
                  SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1775
                  replace_reg (dest, FIRST_STACK_REG);
1776
                }
1777
 
1778
                replace_reg (src1, FIRST_STACK_REG);
1779
                break;
1780
 
1781
              case UNSPEC_SINCOS_SIN:
1782
              case UNSPEC_TAN_TAN:
1783
              case UNSPEC_XTRACT_EXP:
1784
                /* These insns operate on the top two stack slots,
1785
                   second part of one input, double output insn.  */
1786
 
1787
                src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1788
 
1789
                emit_swap_insn (insn, regstack, *src1);
1790
 
1791
                /* Input should never die, it is
1792
                   replaced with output.  */
1793
                src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1794
                gcc_assert (!src1_note);
1795
 
1796
                /* Push the result back onto stack. Fill empty slot from
1797
                   first part of insn and fix top of stack pointer.  */
1798
                if (STACK_REG_P (*dest)) {
1799
                  regstack->reg[regstack->top] = REGNO (*dest);
1800
                  SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1801
                  replace_reg (dest, FIRST_STACK_REG + 1);
1802
 
1803
                  regstack->top++;
1804
                }
1805
 
1806
                replace_reg (src1, FIRST_STACK_REG);
1807
                break;
1808
 
1809
              case UNSPEC_SAHF:
1810
                /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1811
                   The combination matches the PPRO fcomi instruction.  */
1812
 
1813
                pat_src = XVECEXP (pat_src, 0, 0);
1814
                gcc_assert (GET_CODE (pat_src) == UNSPEC);
1815
                gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
1816
                /* Fall through.  */
1817
 
1818
              case UNSPEC_FNSTSW:
1819
                /* Combined fcomp+fnstsw generated for doing well with
1820
                   CSE.  When optimizing this would have been broken
1821
                   up before now.  */
1822
 
1823
                pat_src = XVECEXP (pat_src, 0, 0);
1824
                gcc_assert (GET_CODE (pat_src) == COMPARE);
1825
 
1826
                compare_for_stack_reg (insn, regstack, pat_src);
1827
                break;
1828
 
1829
              default:
1830
                gcc_unreachable ();
1831
              }
1832
            break;
1833
 
1834
          case IF_THEN_ELSE:
1835
            /* This insn requires the top of stack to be the destination.  */
1836
 
1837
            src1 = get_true_reg (&XEXP (pat_src, 1));
1838
            src2 = get_true_reg (&XEXP (pat_src, 2));
1839
 
1840
            src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1841
            src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1842
 
1843
            /* If the comparison operator is an FP comparison operator,
1844
               it is handled correctly by compare_for_stack_reg () who
1845
               will move the destination to the top of stack. But if the
1846
               comparison operator is not an FP comparison operator, we
1847
               have to handle it here.  */
1848
            if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1849
                && REGNO (*dest) != regstack->reg[regstack->top])
1850
              {
1851
                /* In case one of operands is the top of stack and the operands
1852
                   dies, it is safe to make it the destination operand by
1853
                   reversing the direction of cmove and avoid fxch.  */
1854
                if ((REGNO (*src1) == regstack->reg[regstack->top]
1855
                     && src1_note)
1856
                    || (REGNO (*src2) == regstack->reg[regstack->top]
1857
                        && src2_note))
1858
                  {
1859
                    int idx1 = (get_hard_regnum (regstack, *src1)
1860
                                - FIRST_STACK_REG);
1861
                    int idx2 = (get_hard_regnum (regstack, *src2)
1862
                                - FIRST_STACK_REG);
1863
 
1864
                    /* Make reg-stack believe that the operands are already
1865
                       swapped on the stack */
1866
                    regstack->reg[regstack->top - idx1] = REGNO (*src2);
1867
                    regstack->reg[regstack->top - idx2] = REGNO (*src1);
1868
 
1869
                    /* Reverse condition to compensate the operand swap.
1870
                       i386 do have comparison always reversible.  */
1871
                    PUT_CODE (XEXP (pat_src, 0),
1872
                              reversed_comparison_code (XEXP (pat_src, 0), insn));
1873
                  }
1874
                else
1875
                  emit_swap_insn (insn, regstack, *dest);
1876
              }
1877
 
1878
            {
1879
              rtx src_note [3];
1880
              int i;
1881
 
1882
              src_note[0] = 0;
1883
              src_note[1] = src1_note;
1884
              src_note[2] = src2_note;
1885
 
1886
              if (STACK_REG_P (*src1))
1887
                replace_reg (src1, get_hard_regnum (regstack, *src1));
1888
              if (STACK_REG_P (*src2))
1889
                replace_reg (src2, get_hard_regnum (regstack, *src2));
1890
 
1891
              for (i = 1; i <= 2; i++)
1892
                if (src_note [i])
1893
                  {
1894
                    int regno = REGNO (XEXP (src_note[i], 0));
1895
 
1896
                    /* If the register that dies is not at the top of
1897
                       stack, then move the top of stack to the dead reg.
1898
                       Top of stack should never die, as it is the
1899
                       destination.  */
1900
                    gcc_assert (regno != regstack->reg[regstack->top]);
1901
                    remove_regno_note (insn, REG_DEAD, regno);
1902
                    emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1903
                                    EMIT_AFTER);
1904
                  }
1905
            }
1906
 
1907
            /* Make dest the top of stack.  Add dest to regstack if
1908
               not present.  */
1909
            if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1910
              regstack->reg[++regstack->top] = REGNO (*dest);
1911
            SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1912
            replace_reg (dest, FIRST_STACK_REG);
1913
            break;
1914
 
1915
          default:
1916
            gcc_unreachable ();
1917
          }
1918
        break;
1919
      }
1920
 
1921
    default:
1922
      break;
1923
    }
1924
 
1925
  return control_flow_insn_deleted;
1926
}
1927
 
1928
/* Substitute hard regnums for any stack regs in INSN, which has
1929
   N_INPUTS inputs and N_OUTPUTS outputs.  REGSTACK is the stack info
1930
   before the insn, and is updated with changes made here.
1931
 
1932
   There are several requirements and assumptions about the use of
1933
   stack-like regs in asm statements.  These rules are enforced by
1934
   record_asm_stack_regs; see comments there for details.  Any
1935
   asm_operands left in the RTL at this point may be assume to meet the
1936
   requirements, since record_asm_stack_regs removes any problem asm.  */
1937
 
1938
static void
1939
subst_asm_stack_regs (rtx insn, stack regstack)
1940
{
1941
  rtx body = PATTERN (insn);
1942
  int alt;
1943
 
1944
  rtx *note_reg;                /* Array of note contents */
1945
  rtx **note_loc;               /* Address of REG field of each note */
1946
  enum reg_note *note_kind;     /* The type of each note */
1947
 
1948
  rtx *clobber_reg = 0;
1949
  rtx **clobber_loc = 0;
1950
 
1951
  struct stack_def temp_stack;
1952
  int n_notes;
1953
  int n_clobbers;
1954
  rtx note;
1955
  int i;
1956
  int n_inputs, n_outputs;
1957
 
1958
  if (! check_asm_stack_operands (insn))
1959
    return;
1960
 
1961
  /* Find out what the constraints required.  If no constraint
1962
     alternative matches, that is a compiler bug: we should have caught
1963
     such an insn in check_asm_stack_operands.  */
1964
  extract_insn (insn);
1965
  constrain_operands (1);
1966
  alt = which_alternative;
1967
 
1968
  preprocess_constraints ();
1969
 
1970
  n_inputs = get_asm_operand_n_inputs (body);
1971
  n_outputs = recog_data.n_operands - n_inputs;
1972
 
1973
  gcc_assert (alt >= 0);
1974
 
1975
  /* Strip SUBREGs here to make the following code simpler.  */
1976
  for (i = 0; i < recog_data.n_operands; i++)
1977
    if (GET_CODE (recog_data.operand[i]) == SUBREG
1978
        && REG_P (SUBREG_REG (recog_data.operand[i])))
1979
      {
1980
        recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1981
        recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1982
      }
1983
 
1984
  /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND.  */
1985
 
1986
  for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1987
    i++;
1988
 
1989
  note_reg = alloca (i * sizeof (rtx));
1990
  note_loc = alloca (i * sizeof (rtx *));
1991
  note_kind = alloca (i * sizeof (enum reg_note));
1992
 
1993
  n_notes = 0;
1994
  for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1995
    {
1996
      rtx reg = XEXP (note, 0);
1997
      rtx *loc = & XEXP (note, 0);
1998
 
1999
      if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2000
        {
2001
          loc = & SUBREG_REG (reg);
2002
          reg = SUBREG_REG (reg);
2003
        }
2004
 
2005
      if (STACK_REG_P (reg)
2006
          && (REG_NOTE_KIND (note) == REG_DEAD
2007
              || REG_NOTE_KIND (note) == REG_UNUSED))
2008
        {
2009
          note_reg[n_notes] = reg;
2010
          note_loc[n_notes] = loc;
2011
          note_kind[n_notes] = REG_NOTE_KIND (note);
2012
          n_notes++;
2013
        }
2014
    }
2015
 
2016
  /* Set up CLOBBER_REG and CLOBBER_LOC.  */
2017
 
2018
  n_clobbers = 0;
2019
 
2020
  if (GET_CODE (body) == PARALLEL)
2021
    {
2022
      clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
2023
      clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *));
2024
 
2025
      for (i = 0; i < XVECLEN (body, 0); i++)
2026
        if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2027
          {
2028
            rtx clobber = XVECEXP (body, 0, i);
2029
            rtx reg = XEXP (clobber, 0);
2030
            rtx *loc = & XEXP (clobber, 0);
2031
 
2032
            if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2033
              {
2034
                loc = & SUBREG_REG (reg);
2035
                reg = SUBREG_REG (reg);
2036
              }
2037
 
2038
            if (STACK_REG_P (reg))
2039
              {
2040
                clobber_reg[n_clobbers] = reg;
2041
                clobber_loc[n_clobbers] = loc;
2042
                n_clobbers++;
2043
              }
2044
          }
2045
    }
2046
 
2047
  temp_stack = *regstack;
2048
 
2049
  /* Put the input regs into the desired place in TEMP_STACK.  */
2050
 
2051
  for (i = n_outputs; i < n_outputs + n_inputs; i++)
2052
    if (STACK_REG_P (recog_data.operand[i])
2053
        && reg_class_subset_p (recog_op_alt[i][alt].cl,
2054
                               FLOAT_REGS)
2055
        && recog_op_alt[i][alt].cl != FLOAT_REGS)
2056
      {
2057
        /* If an operand needs to be in a particular reg in
2058
           FLOAT_REGS, the constraint was either 't' or 'u'.  Since
2059
           these constraints are for single register classes, and
2060
           reload guaranteed that operand[i] is already in that class,
2061
           we can just use REGNO (recog_data.operand[i]) to know which
2062
           actual reg this operand needs to be in.  */
2063
 
2064
        int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2065
 
2066
        gcc_assert (regno >= 0);
2067
 
2068
        if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2069
          {
2070
            /* recog_data.operand[i] is not in the right place.  Find
2071
               it and swap it with whatever is already in I's place.
2072
               K is where recog_data.operand[i] is now.  J is where it
2073
               should be.  */
2074
            int j, k, temp;
2075
 
2076
            k = temp_stack.top - (regno - FIRST_STACK_REG);
2077
            j = (temp_stack.top
2078
                 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2079
 
2080
            temp = temp_stack.reg[k];
2081
            temp_stack.reg[k] = temp_stack.reg[j];
2082
            temp_stack.reg[j] = temp;
2083
          }
2084
      }
2085
 
2086
  /* Emit insns before INSN to make sure the reg-stack is in the right
2087
     order.  */
2088
 
2089
  change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2090
 
2091
  /* Make the needed input register substitutions.  Do death notes and
2092
     clobbers too, because these are for inputs, not outputs.  */
2093
 
2094
  for (i = n_outputs; i < n_outputs + n_inputs; i++)
2095
    if (STACK_REG_P (recog_data.operand[i]))
2096
      {
2097
        int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2098
 
2099
        gcc_assert (regnum >= 0);
2100
 
2101
        replace_reg (recog_data.operand_loc[i], regnum);
2102
      }
2103
 
2104
  for (i = 0; i < n_notes; i++)
2105
    if (note_kind[i] == REG_DEAD)
2106
      {
2107
        int regnum = get_hard_regnum (regstack, note_reg[i]);
2108
 
2109
        gcc_assert (regnum >= 0);
2110
 
2111
        replace_reg (note_loc[i], regnum);
2112
      }
2113
 
2114
  for (i = 0; i < n_clobbers; i++)
2115
    {
2116
      /* It's OK for a CLOBBER to reference a reg that is not live.
2117
         Don't try to replace it in that case.  */
2118
      int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2119
 
2120
      if (regnum >= 0)
2121
        {
2122
          /* Sigh - clobbers always have QImode.  But replace_reg knows
2123
             that these regs can't be MODE_INT and will assert.  Just put
2124
             the right reg there without calling replace_reg.  */
2125
 
2126
          *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2127
        }
2128
    }
2129
 
2130
  /* Now remove from REGSTACK any inputs that the asm implicitly popped.  */
2131
 
2132
  for (i = n_outputs; i < n_outputs + n_inputs; i++)
2133
    if (STACK_REG_P (recog_data.operand[i]))
2134
      {
2135
        /* An input reg is implicitly popped if it is tied to an
2136
           output, or if there is a CLOBBER for it.  */
2137
        int j;
2138
 
2139
        for (j = 0; j < n_clobbers; j++)
2140
          if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2141
            break;
2142
 
2143
        if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2144
          {
2145
            /* recog_data.operand[i] might not be at the top of stack.
2146
               But that's OK, because all we need to do is pop the
2147
               right number of regs off of the top of the reg-stack.
2148
               record_asm_stack_regs guaranteed that all implicitly
2149
               popped regs were grouped at the top of the reg-stack.  */
2150
 
2151
            CLEAR_HARD_REG_BIT (regstack->reg_set,
2152
                                regstack->reg[regstack->top]);
2153
            regstack->top--;
2154
          }
2155
      }
2156
 
2157
  /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2158
     Note that there isn't any need to substitute register numbers.
2159
     ???  Explain why this is true.  */
2160
 
2161
  for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2162
    {
2163
      /* See if there is an output for this hard reg.  */
2164
      int j;
2165
 
2166
      for (j = 0; j < n_outputs; j++)
2167
        if (STACK_REG_P (recog_data.operand[j])
2168
            && REGNO (recog_data.operand[j]) == (unsigned) i)
2169
          {
2170
            regstack->reg[++regstack->top] = i;
2171
            SET_HARD_REG_BIT (regstack->reg_set, i);
2172
            break;
2173
          }
2174
    }
2175
 
2176
  /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2177
     input that the asm didn't implicitly pop.  If the asm didn't
2178
     implicitly pop an input reg, that reg will still be live.
2179
 
2180
     Note that we can't use find_regno_note here: the register numbers
2181
     in the death notes have already been substituted.  */
2182
 
2183
  for (i = 0; i < n_outputs; i++)
2184
    if (STACK_REG_P (recog_data.operand[i]))
2185
      {
2186
        int j;
2187
 
2188
        for (j = 0; j < n_notes; j++)
2189
          if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2190
              && note_kind[j] == REG_UNUSED)
2191
            {
2192
              insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2193
                                    EMIT_AFTER);
2194
              break;
2195
            }
2196
      }
2197
 
2198
  for (i = n_outputs; i < n_outputs + n_inputs; i++)
2199
    if (STACK_REG_P (recog_data.operand[i]))
2200
      {
2201
        int j;
2202
 
2203
        for (j = 0; j < n_notes; j++)
2204
          if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2205
              && note_kind[j] == REG_DEAD
2206
              && TEST_HARD_REG_BIT (regstack->reg_set,
2207
                                    REGNO (recog_data.operand[i])))
2208
            {
2209
              insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2210
                                    EMIT_AFTER);
2211
              break;
2212
            }
2213
      }
2214
}
2215
 
2216
/* Substitute stack hard reg numbers for stack virtual registers in
2217
   INSN.  Non-stack register numbers are not changed.  REGSTACK is the
2218
   current stack content.  Insns may be emitted as needed to arrange the
2219
   stack for the 387 based on the contents of the insn.  Return whether
2220
   a control flow insn was deleted in the process.  */
2221
 
2222
static bool
2223
subst_stack_regs (rtx insn, stack regstack)
2224
{
2225
  rtx *note_link, note;
2226
  bool control_flow_insn_deleted = false;
2227
  int i;
2228
 
2229
  if (CALL_P (insn))
2230
    {
2231
      int top = regstack->top;
2232
 
2233
      /* If there are any floating point parameters to be passed in
2234
         registers for this call, make sure they are in the right
2235
         order.  */
2236
 
2237
      if (top >= 0)
2238
        {
2239
          straighten_stack (insn, regstack);
2240
 
2241
          /* Now mark the arguments as dead after the call.  */
2242
 
2243
          while (regstack->top >= 0)
2244
            {
2245
              CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2246
              regstack->top--;
2247
            }
2248
        }
2249
    }
2250
 
2251
  /* Do the actual substitution if any stack regs are mentioned.
2252
     Since we only record whether entire insn mentions stack regs, and
2253
     subst_stack_regs_pat only works for patterns that contain stack regs,
2254
     we must check each pattern in a parallel here.  A call_value_pop could
2255
     fail otherwise.  */
2256
 
2257
  if (stack_regs_mentioned (insn))
2258
    {
2259
      int n_operands = asm_noperands (PATTERN (insn));
2260
      if (n_operands >= 0)
2261
        {
2262
          /* This insn is an `asm' with operands.  Decode the operands,
2263
             decide how many are inputs, and do register substitution.
2264
             Any REG_UNUSED notes will be handled by subst_asm_stack_regs.  */
2265
 
2266
          subst_asm_stack_regs (insn, regstack);
2267
          return control_flow_insn_deleted;
2268
        }
2269
 
2270
      if (GET_CODE (PATTERN (insn)) == PARALLEL)
2271
        for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2272
          {
2273
            if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2274
              {
2275
                if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2276
                   XVECEXP (PATTERN (insn), 0, i)
2277
                     = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2278
                control_flow_insn_deleted
2279
                  |= subst_stack_regs_pat (insn, regstack,
2280
                                           XVECEXP (PATTERN (insn), 0, i));
2281
              }
2282
          }
2283
      else
2284
        control_flow_insn_deleted
2285
          |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2286
    }
2287
 
2288
  /* subst_stack_regs_pat may have deleted a no-op insn.  If so, any
2289
     REG_UNUSED will already have been dealt with, so just return.  */
2290
 
2291
  if (NOTE_P (insn) || INSN_DELETED_P (insn))
2292
    return control_flow_insn_deleted;
2293
 
2294
  /* If this a noreturn call, we can't insert pop insns after it.
2295
     Instead, reset the stack state to empty.  */
2296
  if (CALL_P (insn)
2297
      && find_reg_note (insn, REG_NORETURN, NULL))
2298
    {
2299
      regstack->top = -1;
2300
      CLEAR_HARD_REG_SET (regstack->reg_set);
2301
      return control_flow_insn_deleted;
2302
    }
2303
 
2304
  /* If there is a REG_UNUSED note on a stack register on this insn,
2305
     the indicated reg must be popped.  The REG_UNUSED note is removed,
2306
     since the form of the newly emitted pop insn references the reg,
2307
     making it no longer `unset'.  */
2308
 
2309
  note_link = &REG_NOTES (insn);
2310
  for (note = *note_link; note; note = XEXP (note, 1))
2311
    if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2312
      {
2313
        *note_link = XEXP (note, 1);
2314
        insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2315
      }
2316
    else
2317
      note_link = &XEXP (note, 1);
2318
 
2319
  return control_flow_insn_deleted;
2320
}
2321
 
2322
/* Change the organization of the stack so that it fits a new basic
2323
   block.  Some registers might have to be popped, but there can never be
2324
   a register live in the new block that is not now live.
2325
 
2326
   Insert any needed insns before or after INSN, as indicated by
2327
   WHERE.  OLD is the original stack layout, and NEW is the desired
2328
   form.  OLD is updated to reflect the code emitted, i.e., it will be
2329
   the same as NEW upon return.
2330
 
2331
   This function will not preserve block_end[].  But that information
2332
   is no longer needed once this has executed.  */
2333
 
2334
static void
2335
change_stack (rtx insn, stack old, stack new, enum emit_where where)
2336
{
2337
  int reg;
2338
  int update_end = 0;
2339
 
2340
  /* Stack adjustments for the first insn in a block update the
2341
     current_block's stack_in instead of inserting insns directly.
2342
     compensate_edges will add the necessary code later.  */
2343
  if (current_block
2344
      && starting_stack_p
2345
      && where == EMIT_BEFORE)
2346
    {
2347
      BLOCK_INFO (current_block)->stack_in = *new;
2348
      starting_stack_p = false;
2349
      *old = *new;
2350
      return;
2351
    }
2352
 
2353
  /* We will be inserting new insns "backwards".  If we are to insert
2354
     after INSN, find the next insn, and insert before it.  */
2355
 
2356
  if (where == EMIT_AFTER)
2357
    {
2358
      if (current_block && BB_END (current_block) == insn)
2359
        update_end = 1;
2360
      insn = NEXT_INSN (insn);
2361
    }
2362
 
2363
  /* Pop any registers that are not needed in the new block.  */
2364
 
2365
  /* If the destination block's stack already has a specified layout
2366
     and contains two or more registers, use a more intelligent algorithm
2367
     to pop registers that minimizes the number number of fxchs below.  */
2368
  if (new->top > 0)
2369
    {
2370
      bool slots[REG_STACK_SIZE];
2371
      int pops[REG_STACK_SIZE];
2372
      int next, dest, topsrc;
2373
 
2374
      /* First pass to determine the free slots.  */
2375
      for (reg = 0; reg <= new->top; reg++)
2376
        slots[reg] = TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]);
2377
 
2378
      /* Second pass to allocate preferred slots.  */
2379
      topsrc = -1;
2380
      for (reg = old->top; reg > new->top; reg--)
2381
        if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2382
          {
2383
            dest = -1;
2384
            for (next = 0; next <= new->top; next++)
2385
              if (!slots[next] && new->reg[next] == old->reg[reg])
2386
                {
2387
                  /* If this is a preference for the new top of stack, record
2388
                     the fact by remembering it's old->reg in topsrc.  */
2389
                  if (next == new->top)
2390
                    topsrc = reg;
2391
                  slots[next] = true;
2392
                  dest = next;
2393
                  break;
2394
                }
2395
            pops[reg] = dest;
2396
          }
2397
        else
2398
          pops[reg] = reg;
2399
 
2400
      /* Intentionally, avoid placing the top of stack in it's correct
2401
         location, if we still need to permute the stack below and we
2402
         can usefully place it somewhere else.  This is the case if any
2403
         slot is still unallocated, in which case we should place the
2404
         top of stack there.  */
2405
      if (topsrc != -1)
2406
        for (reg = 0; reg < new->top; reg++)
2407
          if (!slots[reg])
2408
            {
2409
              pops[topsrc] = reg;
2410
              slots[new->top] = false;
2411
              slots[reg] = true;
2412
              break;
2413
            }
2414
 
2415
      /* Third pass allocates remaining slots and emits pop insns.  */
2416
      next = new->top;
2417
      for (reg = old->top; reg > new->top; reg--)
2418
        {
2419
          dest = pops[reg];
2420
          if (dest == -1)
2421
            {
2422
              /* Find next free slot.  */
2423
              while (slots[next])
2424
                next--;
2425
              dest = next--;
2426
            }
2427
          emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
2428
                         EMIT_BEFORE);
2429
        }
2430
    }
2431
  else
2432
    {
2433
      /* The following loop attempts to maximize the number of times we
2434
         pop the top of the stack, as this permits the use of the faster
2435
         ffreep instruction on platforms that support it.  */
2436
      int live, next;
2437
 
2438
      live = 0;
2439
      for (reg = 0; reg <= old->top; reg++)
2440
        if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2441
          live++;
2442
 
2443
      next = live;
2444
      while (old->top >= live)
2445
        if (TEST_HARD_REG_BIT (new->reg_set, old->reg[old->top]))
2446
          {
2447
            while (TEST_HARD_REG_BIT (new->reg_set, old->reg[next]))
2448
              next--;
2449
            emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode),
2450
                           EMIT_BEFORE);
2451
          }
2452
        else
2453
          emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
2454
                         EMIT_BEFORE);
2455
    }
2456
 
2457
  if (new->top == -2)
2458
    {
2459
      /* If the new block has never been processed, then it can inherit
2460
         the old stack order.  */
2461
 
2462
      new->top = old->top;
2463
      memcpy (new->reg, old->reg, sizeof (new->reg));
2464
    }
2465
  else
2466
    {
2467
      /* This block has been entered before, and we must match the
2468
         previously selected stack order.  */
2469
 
2470
      /* By now, the only difference should be the order of the stack,
2471
         not their depth or liveliness.  */
2472
 
2473
      GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2474
      gcc_unreachable ();
2475
    win:
2476
      gcc_assert (old->top == new->top);
2477
 
2478
      /* If the stack is not empty (new->top != -1), loop here emitting
2479
         swaps until the stack is correct.
2480
 
2481
         The worst case number of swaps emitted is N + 2, where N is the
2482
         depth of the stack.  In some cases, the reg at the top of
2483
         stack may be correct, but swapped anyway in order to fix
2484
         other regs.  But since we never swap any other reg away from
2485
         its correct slot, this algorithm will converge.  */
2486
 
2487
      if (new->top != -1)
2488
        do
2489
          {
2490
            /* Swap the reg at top of stack into the position it is
2491
               supposed to be in, until the correct top of stack appears.  */
2492
 
2493
            while (old->reg[old->top] != new->reg[new->top])
2494
              {
2495
                for (reg = new->top; reg >= 0; reg--)
2496
                  if (new->reg[reg] == old->reg[old->top])
2497
                    break;
2498
 
2499
                gcc_assert (reg != -1);
2500
 
2501
                emit_swap_insn (insn, old,
2502
                                FP_MODE_REG (old->reg[reg], DFmode));
2503
              }
2504
 
2505
            /* See if any regs remain incorrect.  If so, bring an
2506
             incorrect reg to the top of stack, and let the while loop
2507
             above fix it.  */
2508
 
2509
            for (reg = new->top; reg >= 0; reg--)
2510
              if (new->reg[reg] != old->reg[reg])
2511
                {
2512
                  emit_swap_insn (insn, old,
2513
                                  FP_MODE_REG (old->reg[reg], DFmode));
2514
                  break;
2515
                }
2516
          } while (reg >= 0);
2517
 
2518
      /* At this point there must be no differences.  */
2519
 
2520
      for (reg = old->top; reg >= 0; reg--)
2521
        gcc_assert (old->reg[reg] == new->reg[reg]);
2522
    }
2523
 
2524
  if (update_end)
2525
    BB_END (current_block) = PREV_INSN (insn);
2526
}
2527
 
2528
/* Print stack configuration.  */
2529
 
2530
static void
2531
print_stack (FILE *file, stack s)
2532
{
2533
  if (! file)
2534
    return;
2535
 
2536
  if (s->top == -2)
2537
    fprintf (file, "uninitialized\n");
2538
  else if (s->top == -1)
2539
    fprintf (file, "empty\n");
2540
  else
2541
    {
2542
      int i;
2543
      fputs ("[ ", file);
2544
      for (i = 0; i <= s->top; ++i)
2545
        fprintf (file, "%d ", s->reg[i]);
2546
      fputs ("]\n", file);
2547
    }
2548
}
2549
 
2550
/* This function was doing life analysis.  We now let the regular live
2551
   code do it's job, so we only need to check some extra invariants
2552
   that reg-stack expects.  Primary among these being that all registers
2553
   are initialized before use.
2554
 
2555
   The function returns true when code was emitted to CFG edges and
2556
   commit_edge_insertions needs to be called.  */
2557
 
2558
static int
2559
convert_regs_entry (void)
2560
{
2561
  int inserted = 0;
2562
  edge e;
2563
  edge_iterator ei;
2564
 
2565
  /* Load something into each stack register live at function entry.
2566
     Such live registers can be caused by uninitialized variables or
2567
     functions not returning values on all paths.  In order to keep
2568
     the push/pop code happy, and to not scrog the register stack, we
2569
     must put something in these registers.  Use a QNaN.
2570
 
2571
     Note that we are inserting converted code here.  This code is
2572
     never seen by the convert_regs pass.  */
2573
 
2574
  FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
2575
    {
2576
      basic_block block = e->dest;
2577
      block_info bi = BLOCK_INFO (block);
2578
      int reg, top = -1;
2579
 
2580
      for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2581
        if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2582
          {
2583
            rtx init;
2584
 
2585
            bi->stack_in.reg[++top] = reg;
2586
 
2587
            init = gen_rtx_SET (VOIDmode,
2588
                                FP_MODE_REG (FIRST_STACK_REG, SFmode),
2589
                                not_a_num);
2590
            insert_insn_on_edge (init, e);
2591
            inserted = 1;
2592
          }
2593
 
2594
      bi->stack_in.top = top;
2595
    }
2596
 
2597
  return inserted;
2598
}
2599
 
2600
/* Construct the desired stack for function exit.  This will either
2601
   be `empty', or the function return value at top-of-stack.  */
2602
 
2603
static void
2604
convert_regs_exit (void)
2605
{
2606
  int value_reg_low, value_reg_high;
2607
  stack output_stack;
2608
  rtx retvalue;
2609
 
2610
  retvalue = stack_result (current_function_decl);
2611
  value_reg_low = value_reg_high = -1;
2612
  if (retvalue)
2613
    {
2614
      value_reg_low = REGNO (retvalue);
2615
      value_reg_high = value_reg_low
2616
        + hard_regno_nregs[value_reg_low][GET_MODE (retvalue)] - 1;
2617
    }
2618
 
2619
  output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2620
  if (value_reg_low == -1)
2621
    output_stack->top = -1;
2622
  else
2623
    {
2624
      int reg;
2625
 
2626
      output_stack->top = value_reg_high - value_reg_low;
2627
      for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2628
        {
2629
          output_stack->reg[value_reg_high - reg] = reg;
2630
          SET_HARD_REG_BIT (output_stack->reg_set, reg);
2631
        }
2632
    }
2633
}
2634
 
2635
/* Copy the stack info from the end of edge E's source block to the
2636
   start of E's destination block.  */
2637
 
2638
static void
2639
propagate_stack (edge e)
2640
{
2641
  stack src_stack = &BLOCK_INFO (e->src)->stack_out;
2642
  stack dest_stack = &BLOCK_INFO (e->dest)->stack_in;
2643
  int reg;
2644
 
2645
  /* Preserve the order of the original stack, but check whether
2646
     any pops are needed.  */
2647
  dest_stack->top = -1;
2648
  for (reg = 0; reg <= src_stack->top; ++reg)
2649
    if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg]))
2650
      dest_stack->reg[++dest_stack->top] = src_stack->reg[reg];
2651
}
2652
 
2653
 
2654
/* Adjust the stack of edge E's source block on exit to match the stack
2655
   of it's target block upon input.  The stack layouts of both blocks
2656
   should have been defined by now.  */
2657
 
2658
static bool
2659
compensate_edge (edge e)
2660
{
2661
  basic_block source = e->src, target = e->dest;
2662
  stack target_stack = &BLOCK_INFO (target)->stack_in;
2663
  stack source_stack = &BLOCK_INFO (source)->stack_out;
2664
  struct stack_def regstack;
2665
  int reg;
2666
 
2667
  if (dump_file)
2668
    fprintf (dump_file, "Edge %d->%d: ", source->index, target->index);
2669
 
2670
  gcc_assert (target_stack->top != -2);
2671
 
2672
  /* Check whether stacks are identical.  */
2673
  if (target_stack->top == source_stack->top)
2674
    {
2675
      for (reg = target_stack->top; reg >= 0; --reg)
2676
        if (target_stack->reg[reg] != source_stack->reg[reg])
2677
          break;
2678
 
2679
      if (reg == -1)
2680
        {
2681
          if (dump_file)
2682
            fprintf (dump_file, "no changes needed\n");
2683
          return false;
2684
        }
2685
    }
2686
 
2687
  if (dump_file)
2688
    {
2689
      fprintf (dump_file, "correcting stack to ");
2690
      print_stack (dump_file, target_stack);
2691
    }
2692
 
2693
  /* Abnormal calls may appear to have values live in st(0), but the
2694
     abnormal return path will not have actually loaded the values.  */
2695
  if (e->flags & EDGE_ABNORMAL_CALL)
2696
    {
2697
      /* Assert that the lifetimes are as we expect -- one value
2698
         live at st(0) on the end of the source block, and no
2699
         values live at the beginning of the destination block.
2700
         For complex return values, we may have st(1) live as well.  */
2701
      gcc_assert (source_stack->top == 0 || source_stack->top == 1);
2702
      gcc_assert (target_stack->top == -1);
2703
      return false;
2704
    }
2705
 
2706
  /* Handle non-call EH edges specially.  The normal return path have
2707
     values in registers.  These will be popped en masse by the unwind
2708
     library.  */
2709
  if (e->flags & EDGE_EH)
2710
    {
2711
      gcc_assert (target_stack->top == -1);
2712
      return false;
2713
    }
2714
 
2715
  /* We don't support abnormal edges.  Global takes care to
2716
     avoid any live register across them, so we should never
2717
     have to insert instructions on such edges.  */
2718
  gcc_assert (! (e->flags & EDGE_ABNORMAL));
2719
 
2720
  /* Make a copy of source_stack as change_stack is destructive.  */
2721
  regstack = *source_stack;
2722
 
2723
  /* It is better to output directly to the end of the block
2724
     instead of to the edge, because emit_swap can do minimal
2725
     insn scheduling.  We can do this when there is only one
2726
     edge out, and it is not abnormal.  */
2727
  if (EDGE_COUNT (source->succs) == 1)
2728
    {
2729
      current_block = source;
2730
      change_stack (BB_END (source), &regstack, target_stack,
2731
                    (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER));
2732
    }
2733
  else
2734
    {
2735
      rtx seq, after;
2736
 
2737
      current_block = NULL;
2738
      start_sequence ();
2739
 
2740
      /* ??? change_stack needs some point to emit insns after.  */
2741
      after = emit_note (NOTE_INSN_DELETED);
2742
 
2743
      change_stack (after, &regstack, target_stack, EMIT_BEFORE);
2744
 
2745
      seq = get_insns ();
2746
      end_sequence ();
2747
 
2748
      insert_insn_on_edge (seq, e);
2749
      return true;
2750
    }
2751
  return false;
2752
}
2753
 
2754
/* Traverse all non-entry edges in the CFG, and emit the necessary
2755
   edge compensation code to change the stack from stack_out of the
2756
   source block to the stack_in of the destination block.  */
2757
 
2758
static bool
2759
compensate_edges (void)
2760
{
2761
  bool inserted = false;
2762
  basic_block bb;
2763
 
2764
  starting_stack_p = false;
2765
 
2766
  FOR_EACH_BB (bb)
2767
    if (bb != ENTRY_BLOCK_PTR)
2768
      {
2769
        edge e;
2770
        edge_iterator ei;
2771
 
2772
        FOR_EACH_EDGE (e, ei, bb->succs)
2773
          inserted |= compensate_edge (e);
2774
      }
2775
  return inserted;
2776
}
2777
 
2778
/* Select the better of two edges E1 and E2 to use to determine the
2779
   stack layout for their shared destination basic block.  This is
2780
   typically the more frequently executed.  The edge E1 may be NULL
2781
   (in which case E2 is returned), but E2 is always non-NULL.  */
2782
 
2783
static edge
2784
better_edge (edge e1, edge e2)
2785
{
2786
  if (!e1)
2787
    return e2;
2788
 
2789
  if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2))
2790
    return e1;
2791
  if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2))
2792
    return e2;
2793
 
2794
  if (e1->count > e2->count)
2795
    return e1;
2796
  if (e1->count < e2->count)
2797
    return e2;
2798
 
2799
  /* Prefer critical edges to minimize inserting compensation code on
2800
     critical edges.  */
2801
 
2802
  if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2))
2803
    return EDGE_CRITICAL_P (e1) ? e1 : e2;
2804
 
2805
  /* Avoid non-deterministic behavior.  */
2806
  return (e1->src->index < e2->src->index) ? e1 : e2;
2807
}
2808
 
2809
/* Convert stack register references in one block.  */
2810
 
2811
static void
2812
convert_regs_1 (basic_block block)
2813
{
2814
  struct stack_def regstack;
2815
  block_info bi = BLOCK_INFO (block);
2816
  int reg;
2817
  rtx insn, next;
2818
  bool control_flow_insn_deleted = false;
2819
 
2820
  any_malformed_asm = false;
2821
 
2822
  /* Choose an initial stack layout, if one hasn't already been chosen.  */
2823
  if (bi->stack_in.top == -2)
2824
    {
2825
      edge e, beste = NULL;
2826
      edge_iterator ei;
2827
 
2828
      /* Select the best incoming edge (typically the most frequent) to
2829
         use as a template for this basic block.  */
2830
      FOR_EACH_EDGE (e, ei, block->preds)
2831
        if (BLOCK_INFO (e->src)->done)
2832
          beste = better_edge (beste, e);
2833
 
2834
      if (beste)
2835
        propagate_stack (beste);
2836
      else
2837
        {
2838
          /* No predecessors.  Create an arbitrary input stack.  */
2839
          bi->stack_in.top = -1;
2840
          for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2841
            if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2842
              bi->stack_in.reg[++bi->stack_in.top] = reg;
2843
        }
2844
    }
2845
 
2846
  if (dump_file)
2847
    {
2848
      fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index);
2849
      print_stack (dump_file, &bi->stack_in);
2850
    }
2851
 
2852
  /* Process all insns in this block.  Keep track of NEXT so that we
2853
     don't process insns emitted while substituting in INSN.  */
2854
  current_block = block;
2855
  next = BB_HEAD (block);
2856
  regstack = bi->stack_in;
2857
  starting_stack_p = true;
2858
 
2859
  do
2860
    {
2861
      insn = next;
2862
      next = NEXT_INSN (insn);
2863
 
2864
      /* Ensure we have not missed a block boundary.  */
2865
      gcc_assert (next);
2866
      if (insn == BB_END (block))
2867
        next = NULL;
2868
 
2869
      /* Don't bother processing unless there is a stack reg
2870
         mentioned or if it's a CALL_INSN.  */
2871
      if (stack_regs_mentioned (insn)
2872
          || CALL_P (insn))
2873
        {
2874
          if (dump_file)
2875
            {
2876
              fprintf (dump_file, "  insn %d input stack: ",
2877
                       INSN_UID (insn));
2878
              print_stack (dump_file, &regstack);
2879
            }
2880
          control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2881
          starting_stack_p = false;
2882
        }
2883
    }
2884
  while (next);
2885
 
2886
  if (dump_file)
2887
    {
2888
      fprintf (dump_file, "Expected live registers [");
2889
      for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2890
        if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2891
          fprintf (dump_file, " %d", reg);
2892
      fprintf (dump_file, " ]\nOutput stack: ");
2893
      print_stack (dump_file, &regstack);
2894
    }
2895
 
2896
  insn = BB_END (block);
2897
  if (JUMP_P (insn))
2898
    insn = PREV_INSN (insn);
2899
 
2900
  /* If the function is declared to return a value, but it returns one
2901
     in only some cases, some registers might come live here.  Emit
2902
     necessary moves for them.  */
2903
 
2904
  for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2905
    {
2906
      if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2907
          && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2908
        {
2909
          rtx set;
2910
 
2911
          if (dump_file)
2912
            fprintf (dump_file, "Emitting insn initializing reg %d\n", reg);
2913
 
2914
          set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num);
2915
          insn = emit_insn_after (set, insn);
2916
          control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2917
        }
2918
    }
2919
 
2920
  /* Amongst the insns possibly deleted during the substitution process above,
2921
     might have been the only trapping insn in the block.  We purge the now
2922
     possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
2923
     called at the end of convert_regs.  The order in which we process the
2924
     blocks ensures that we never delete an already processed edge.
2925
 
2926
     Note that, at this point, the CFG may have been damaged by the emission
2927
     of instructions after an abnormal call, which moves the basic block end
2928
     (and is the reason why we call fixup_abnormal_edges later).  So we must
2929
     be sure that the trapping insn has been deleted before trying to purge
2930
     dead edges, otherwise we risk purging valid edges.
2931
 
2932
     ??? We are normally supposed not to delete trapping insns, so we pretend
2933
     that the insns deleted above don't actually trap.  It would have been
2934
     better to detect this earlier and avoid creating the EH edge in the first
2935
     place, still, but we don't have enough information at that time.  */
2936
 
2937
  if (control_flow_insn_deleted)
2938
    purge_dead_edges (block);
2939
 
2940
  /* Something failed if the stack lives don't match.  If we had malformed
2941
     asms, we zapped the instruction itself, but that didn't produce the
2942
     same pattern of register kills as before.  */
2943
  GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2944
  gcc_assert (any_malformed_asm);
2945
 win:
2946
  bi->stack_out = regstack;
2947
  bi->done = true;
2948
}
2949
 
2950
/* Convert registers in all blocks reachable from BLOCK.  */
2951
 
2952
static void
2953
convert_regs_2 (basic_block block)
2954
{
2955
  basic_block *stack, *sp;
2956
 
2957
  /* We process the blocks in a top-down manner, in a way such that one block
2958
     is only processed after all its predecessors.  The number of predecessors
2959
     of every block has already been computed.  */
2960
 
2961
  stack = XNEWVEC (basic_block, n_basic_blocks);
2962
  sp = stack;
2963
 
2964
  *sp++ = block;
2965
 
2966
  do
2967
    {
2968
      edge e;
2969
      edge_iterator ei;
2970
 
2971
      block = *--sp;
2972
 
2973
      /* Processing BLOCK is achieved by convert_regs_1, which may purge
2974
         some dead EH outgoing edge after the deletion of the trapping
2975
         insn inside the block.  Since the number of predecessors of
2976
         BLOCK's successors was computed based on the initial edge set,
2977
         we check the necessity to process some of these successors
2978
         before such an edge deletion may happen.  However, there is
2979
         a pitfall: if BLOCK is the only predecessor of a successor and
2980
         the edge between them happens to be deleted, the successor
2981
         becomes unreachable and should not be processed.  The problem
2982
         is that there is no way to preventively detect this case so we
2983
         stack the successor in all cases and hand over the task of
2984
         fixing up the discrepancy to convert_regs_1.  */
2985
 
2986
      FOR_EACH_EDGE (e, ei, block->succs)
2987
        if (! (e->flags & EDGE_DFS_BACK))
2988
          {
2989
            BLOCK_INFO (e->dest)->predecessors--;
2990
            if (!BLOCK_INFO (e->dest)->predecessors)
2991
              *sp++ = e->dest;
2992
          }
2993
 
2994
      convert_regs_1 (block);
2995
    }
2996
  while (sp != stack);
2997
 
2998
  free (stack);
2999
}
3000
 
3001
/* Traverse all basic blocks in a function, converting the register
3002
   references in each insn from the "flat" register file that gcc uses,
3003
   to the stack-like registers the 387 uses.  */
3004
 
3005
static void
3006
convert_regs (void)
3007
{
3008
  int inserted;
3009
  basic_block b;
3010
  edge e;
3011
  edge_iterator ei;
3012
 
3013
  /* Initialize uninitialized registers on function entry.  */
3014
  inserted = convert_regs_entry ();
3015
 
3016
  /* Construct the desired stack for function exit.  */
3017
  convert_regs_exit ();
3018
  BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
3019
 
3020
  /* ??? Future: process inner loops first, and give them arbitrary
3021
     initial stacks which emit_swap_insn can modify.  This ought to
3022
     prevent double fxch that often appears at the head of a loop.  */
3023
 
3024
  /* Process all blocks reachable from all entry points.  */
3025
  FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
3026
    convert_regs_2 (e->dest);
3027
 
3028
  /* ??? Process all unreachable blocks.  Though there's no excuse
3029
     for keeping these even when not optimizing.  */
3030
  FOR_EACH_BB (b)
3031
    {
3032
      block_info bi = BLOCK_INFO (b);
3033
 
3034
      if (! bi->done)
3035
        convert_regs_2 (b);
3036
    }
3037
 
3038
  inserted |= compensate_edges ();
3039
 
3040
  clear_aux_for_blocks ();
3041
 
3042
  fixup_abnormal_edges ();
3043
  if (inserted)
3044
    commit_edge_insertions ();
3045
 
3046
  if (dump_file)
3047
    fputc ('\n', dump_file);
3048
}
3049
 
3050
/* Convert register usage from "flat" register file usage to a "stack
3051
   register file.  FILE is the dump file, if used.
3052
 
3053
   Construct a CFG and run life analysis.  Then convert each insn one
3054
   by one.  Run a last cleanup_cfg pass, if optimizing, to eliminate
3055
   code duplication created when the converter inserts pop insns on
3056
   the edges.  */
3057
 
3058
static bool
3059
reg_to_stack (void)
3060
{
3061
  basic_block bb;
3062
  int i;
3063
  int max_uid;
3064
 
3065
  /* Clean up previous run.  */
3066
  if (stack_regs_mentioned_data != NULL)
3067
    VEC_free (char, heap, stack_regs_mentioned_data);
3068
 
3069
  /* See if there is something to do.  Flow analysis is quite
3070
     expensive so we might save some compilation time.  */
3071
  for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3072
    if (regs_ever_live[i])
3073
      break;
3074
  if (i > LAST_STACK_REG)
3075
    return false;
3076
 
3077
  /* Ok, floating point instructions exist.  If not optimizing,
3078
     build the CFG and run life analysis.
3079
     Also need to rebuild life when superblock scheduling is done
3080
     as it don't update liveness yet.  */
3081
  if (!optimize
3082
      || ((flag_sched2_use_superblocks || flag_sched2_use_traces)
3083
          && flag_schedule_insns_after_reload))
3084
    {
3085
      count_or_remove_death_notes (NULL, 1);
3086
      life_analysis (PROP_DEATH_NOTES);
3087
    }
3088
  mark_dfs_back_edges ();
3089
 
3090
  /* Set up block info for each basic block.  */
3091
  alloc_aux_for_blocks (sizeof (struct block_info_def));
3092
  FOR_EACH_BB (bb)
3093
    {
3094
      block_info bi = BLOCK_INFO (bb);
3095
      edge_iterator ei;
3096
      edge e;
3097
      int reg;
3098
 
3099
      FOR_EACH_EDGE (e, ei, bb->preds)
3100
        if (!(e->flags & EDGE_DFS_BACK)
3101
            && e->src != ENTRY_BLOCK_PTR)
3102
          bi->predecessors++;
3103
 
3104
      /* Set current register status at last instruction `uninitialized'.  */
3105
      bi->stack_in.top = -2;
3106
 
3107
      /* Copy live_at_end and live_at_start into temporaries.  */
3108
      for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
3109
        {
3110
          if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_end, reg))
3111
            SET_HARD_REG_BIT (bi->out_reg_set, reg);
3112
          if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_start, reg))
3113
            SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
3114
        }
3115
    }
3116
 
3117
  /* Create the replacement registers up front.  */
3118
  for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3119
    {
3120
      enum machine_mode mode;
3121
      for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
3122
           mode != VOIDmode;
3123
           mode = GET_MODE_WIDER_MODE (mode))
3124
        FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3125
      for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
3126
           mode != VOIDmode;
3127
           mode = GET_MODE_WIDER_MODE (mode))
3128
        FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3129
    }
3130
 
3131
  ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
3132
 
3133
  /* A QNaN for initializing uninitialized variables.
3134
 
3135
     ??? We can't load from constant memory in PIC mode, because
3136
     we're inserting these instructions before the prologue and
3137
     the PIC register hasn't been set up.  In that case, fall back
3138
     on zero, which we can get from `ldz'.  */
3139
 
3140
  if (flag_pic)
3141
    not_a_num = CONST0_RTX (SFmode);
3142
  else
3143
    {
3144
      not_a_num = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
3145
      not_a_num = force_const_mem (SFmode, not_a_num);
3146
    }
3147
 
3148
  /* Allocate a cache for stack_regs_mentioned.  */
3149
  max_uid = get_max_uid ();
3150
  stack_regs_mentioned_data = VEC_alloc (char, heap, max_uid + 1);
3151
  memset (VEC_address (char, stack_regs_mentioned_data),
3152
          0, sizeof (char) * max_uid + 1);
3153
 
3154
  convert_regs ();
3155
 
3156
  free_aux_for_blocks ();
3157
  return true;
3158
}
3159
#endif /* STACK_REGS */
3160
 
3161
static bool
3162
gate_handle_stack_regs (void)
3163
{
3164
#ifdef STACK_REGS
3165
  return 1;
3166
#else
3167
  return 0;
3168
#endif
3169
}
3170
 
3171
/* Convert register usage from flat register file usage to a stack
3172
   register file.  */
3173
static unsigned int
3174
rest_of_handle_stack_regs (void)
3175
{
3176
#ifdef STACK_REGS
3177
  if (reg_to_stack () && optimize)
3178
    {
3179
      regstack_completed = 1;
3180
      if (cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_POST_REGSTACK
3181
                       | (flag_crossjumping ? CLEANUP_CROSSJUMP : 0))
3182
          && (flag_reorder_blocks || flag_reorder_blocks_and_partition))
3183
        {
3184
          reorder_basic_blocks (0);
3185
          cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_POST_REGSTACK);
3186
        }
3187
    }
3188
  else
3189
    regstack_completed = 1;
3190
#endif
3191
  return 0;
3192
}
3193
 
3194
struct tree_opt_pass pass_stack_regs =
3195
{
3196
  "stack",                              /* name */
3197
  gate_handle_stack_regs,               /* gate */
3198
  rest_of_handle_stack_regs,            /* execute */
3199
  NULL,                                 /* sub */
3200
  NULL,                                 /* next */
3201
  0,                                    /* static_pass_number */
3202
  TV_REG_STACK,                         /* tv_id */
3203
  0,                                    /* properties_required */
3204
  0,                                    /* properties_provided */
3205
  0,                                    /* properties_destroyed */
3206
  0,                                    /* todo_flags_start */
3207
  TODO_dump_func |
3208
  TODO_ggc_collect,                     /* todo_flags_finish */
3209
  'k'                                   /* letter */
3210
};

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