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1 38 julius
/* Search an insn for pseudo regs that must be in hard regs and are not.
2
   Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3
   1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 , 2007
4
   Free Software Foundation, Inc.
5
 
6
This file is part of GCC.
7
 
8
GCC is free software; you can redistribute it and/or modify it under
9
the terms of the GNU General Public License as published by the Free
10
Software Foundation; either version 3, or (at your option) any later
11
version.
12
 
13
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14
WARRANTY; without even the implied warranty of MERCHANTABILITY or
15
FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16
for more details.
17
 
18
You should have received a copy of the GNU General Public License
19
along with GCC; see the file COPYING3.  If not see
20
<http://www.gnu.org/licenses/>.  */
21
 
22
/* This file contains subroutines used only from the file reload1.c.
23
   It knows how to scan one insn for operands and values
24
   that need to be copied into registers to make valid code.
25
   It also finds other operands and values which are valid
26
   but for which equivalent values in registers exist and
27
   ought to be used instead.
28
 
29
   Before processing the first insn of the function, call `init_reload'.
30
   init_reload actually has to be called earlier anyway.
31
 
32
   To scan an insn, call `find_reloads'.  This does two things:
33
   1. sets up tables describing which values must be reloaded
34
   for this insn, and what kind of hard regs they must be reloaded into;
35
   2. optionally record the locations where those values appear in
36
   the data, so they can be replaced properly later.
37
   This is done only if the second arg to `find_reloads' is nonzero.
38
 
39
   The third arg to `find_reloads' specifies the number of levels
40
   of indirect addressing supported by the machine.  If it is zero,
41
   indirect addressing is not valid.  If it is one, (MEM (REG n))
42
   is valid even if (REG n) did not get a hard register; if it is two,
43
   (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44
   hard register, and similarly for higher values.
45
 
46
   Then you must choose the hard regs to reload those pseudo regs into,
47
   and generate appropriate load insns before this insn and perhaps
48
   also store insns after this insn.  Set up the array `reload_reg_rtx'
49
   to contain the REG rtx's for the registers you used.  In some
50
   cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51
   for certain reloads.  Then that tells you which register to use,
52
   so you do not need to allocate one.  But you still do need to add extra
53
   instructions to copy the value into and out of that register.
54
 
55
   Finally you must call `subst_reloads' to substitute the reload reg rtx's
56
   into the locations already recorded.
57
 
58
NOTE SIDE EFFECTS:
59
 
60
   find_reloads can alter the operands of the instruction it is called on.
61
 
62
   1. Two operands of any sort may be interchanged, if they are in a
63
   commutative instruction.
64
   This happens only if find_reloads thinks the instruction will compile
65
   better that way.
66
 
67
   2. Pseudo-registers that are equivalent to constants are replaced
68
   with those constants if they are not in hard registers.
69
 
70
1 happens every time find_reloads is called.
71
2 happens only when REPLACE is 1, which is only when
72
actually doing the reloads, not when just counting them.
73
 
74
Using a reload register for several reloads in one insn:
75
 
76
When an insn has reloads, it is considered as having three parts:
77
the input reloads, the insn itself after reloading, and the output reloads.
78
Reloads of values used in memory addresses are often needed for only one part.
79
 
80
When this is so, reload_when_needed records which part needs the reload.
81
Two reloads for different parts of the insn can share the same reload
82
register.
83
 
84
When a reload is used for addresses in multiple parts, or when it is
85
an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86
a register with any other reload.  */
87
 
88
#define REG_OK_STRICT
89
 
90
#include "config.h"
91
#include "system.h"
92
#include "coretypes.h"
93
#include "tm.h"
94
#include "rtl.h"
95
#include "tm_p.h"
96
#include "insn-config.h"
97
#include "expr.h"
98
#include "optabs.h"
99
#include "recog.h"
100
#include "reload.h"
101
#include "regs.h"
102
#include "addresses.h"
103
#include "hard-reg-set.h"
104
#include "flags.h"
105
#include "real.h"
106
#include "output.h"
107
#include "function.h"
108
#include "toplev.h"
109
#include "params.h"
110
#include "target.h"
111
 
112
/* True if X is a constant that can be forced into the constant pool.  */
113
#define CONST_POOL_OK_P(X)                      \
114
  (CONSTANT_P (X)                               \
115
   && GET_CODE (X) != HIGH                      \
116
   && !targetm.cannot_force_const_mem (X))
117
 
118
/* True if C is a non-empty register class that has too few registers
119
   to be safely used as a reload target class.  */
120
#define SMALL_REGISTER_CLASS_P(C) \
121
  (reg_class_size [(C)] == 1 \
122
   || (reg_class_size [(C)] >= 1 && CLASS_LIKELY_SPILLED_P (C)))
123
 
124
 
125
/* All reloads of the current insn are recorded here.  See reload.h for
126
   comments.  */
127
int n_reloads;
128
struct reload rld[MAX_RELOADS];
129
 
130
/* All the "earlyclobber" operands of the current insn
131
   are recorded here.  */
132
int n_earlyclobbers;
133
rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
134
 
135
int reload_n_operands;
136
 
137
/* Replacing reloads.
138
 
139
   If `replace_reloads' is nonzero, then as each reload is recorded
140
   an entry is made for it in the table `replacements'.
141
   Then later `subst_reloads' can look through that table and
142
   perform all the replacements needed.  */
143
 
144
/* Nonzero means record the places to replace.  */
145
static int replace_reloads;
146
 
147
/* Each replacement is recorded with a structure like this.  */
148
struct replacement
149
{
150
  rtx *where;                   /* Location to store in */
151
  rtx *subreg_loc;              /* Location of SUBREG if WHERE is inside
152
                                   a SUBREG; 0 otherwise.  */
153
  int what;                     /* which reload this is for */
154
  enum machine_mode mode;       /* mode it must have */
155
};
156
 
157
static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
158
 
159
/* Number of replacements currently recorded.  */
160
static int n_replacements;
161
 
162
/* Used to track what is modified by an operand.  */
163
struct decomposition
164
{
165
  int reg_flag;         /* Nonzero if referencing a register.  */
166
  int safe;             /* Nonzero if this can't conflict with anything.  */
167
  rtx base;             /* Base address for MEM.  */
168
  HOST_WIDE_INT start;  /* Starting offset or register number.  */
169
  HOST_WIDE_INT end;    /* Ending offset or register number.  */
170
};
171
 
172
#ifdef SECONDARY_MEMORY_NEEDED
173
 
174
/* Save MEMs needed to copy from one class of registers to another.  One MEM
175
   is used per mode, but normally only one or two modes are ever used.
176
 
177
   We keep two versions, before and after register elimination.  The one
178
   after register elimination is record separately for each operand.  This
179
   is done in case the address is not valid to be sure that we separately
180
   reload each.  */
181
 
182
static rtx secondary_memlocs[NUM_MACHINE_MODES];
183
static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
184
static int secondary_memlocs_elim_used = 0;
185
#endif
186
 
187
/* The instruction we are doing reloads for;
188
   so we can test whether a register dies in it.  */
189
static rtx this_insn;
190
 
191
/* Nonzero if this instruction is a user-specified asm with operands.  */
192
static int this_insn_is_asm;
193
 
194
/* If hard_regs_live_known is nonzero,
195
   we can tell which hard regs are currently live,
196
   at least enough to succeed in choosing dummy reloads.  */
197
static int hard_regs_live_known;
198
 
199
/* Indexed by hard reg number,
200
   element is nonnegative if hard reg has been spilled.
201
   This vector is passed to `find_reloads' as an argument
202
   and is not changed here.  */
203
static short *static_reload_reg_p;
204
 
205
/* Set to 1 in subst_reg_equivs if it changes anything.  */
206
static int subst_reg_equivs_changed;
207
 
208
/* On return from push_reload, holds the reload-number for the OUT
209
   operand, which can be different for that from the input operand.  */
210
static int output_reloadnum;
211
 
212
  /* Compare two RTX's.  */
213
#define MATCHES(x, y) \
214
 (x == y || (x != 0 && (REG_P (x)                                \
215
                        ? REG_P (y) && REGNO (x) == REGNO (y)   \
216
                        : rtx_equal_p (x, y) && ! side_effects_p (x))))
217
 
218
  /* Indicates if two reloads purposes are for similar enough things that we
219
     can merge their reloads.  */
220
#define MERGABLE_RELOADS(when1, when2, op1, op2) \
221
  ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER   \
222
   || ((when1) == (when2) && (op1) == (op2))            \
223
   || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
224
   || ((when1) == RELOAD_FOR_OPERAND_ADDRESS            \
225
       && (when2) == RELOAD_FOR_OPERAND_ADDRESS)        \
226
   || ((when1) == RELOAD_FOR_OTHER_ADDRESS              \
227
       && (when2) == RELOAD_FOR_OTHER_ADDRESS))
228
 
229
  /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged.  */
230
#define MERGE_TO_OTHER(when1, when2, op1, op2) \
231
  ((when1) != (when2)                                   \
232
   || ! ((op1) == (op2)                                 \
233
         || (when1) == RELOAD_FOR_INPUT                 \
234
         || (when1) == RELOAD_FOR_OPERAND_ADDRESS       \
235
         || (when1) == RELOAD_FOR_OTHER_ADDRESS))
236
 
237
  /* If we are going to reload an address, compute the reload type to
238
     use.  */
239
#define ADDR_TYPE(type)                                 \
240
  ((type) == RELOAD_FOR_INPUT_ADDRESS                   \
241
   ? RELOAD_FOR_INPADDR_ADDRESS                         \
242
   : ((type) == RELOAD_FOR_OUTPUT_ADDRESS               \
243
      ? RELOAD_FOR_OUTADDR_ADDRESS                      \
244
      : (type)))
245
 
246
static int push_secondary_reload (int, rtx, int, int, enum reg_class,
247
                                  enum machine_mode, enum reload_type,
248
                                  enum insn_code *, secondary_reload_info *);
249
static enum reg_class find_valid_class (enum machine_mode, enum machine_mode,
250
                                        int, unsigned int);
251
static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
252
static void push_replacement (rtx *, int, enum machine_mode);
253
static void dup_replacements (rtx *, rtx *);
254
static void combine_reloads (void);
255
static int find_reusable_reload (rtx *, rtx, enum reg_class,
256
                                 enum reload_type, int, int);
257
static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
258
                              enum machine_mode, enum reg_class, int, int);
259
static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
260
static struct decomposition decompose (rtx);
261
static int immune_p (rtx, rtx, struct decomposition);
262
static int alternative_allows_memconst (const char *, int);
263
static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
264
                                int *);
265
static rtx make_memloc (rtx, int);
266
static int maybe_memory_address_p (enum machine_mode, rtx, rtx *);
267
static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
268
                                 int, enum reload_type, int, rtx);
269
static rtx subst_reg_equivs (rtx, rtx);
270
static rtx subst_indexed_address (rtx);
271
static void update_auto_inc_notes (rtx, int, int);
272
static int find_reloads_address_1 (enum machine_mode, rtx, int,
273
                                   enum rtx_code, enum rtx_code, rtx *,
274
                                   int, enum reload_type,int, rtx);
275
static void find_reloads_address_part (rtx, rtx *, enum reg_class,
276
                                       enum machine_mode, int,
277
                                       enum reload_type, int);
278
static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
279
                                        int, rtx);
280
static void copy_replacements_1 (rtx *, rtx *, int);
281
static int find_inc_amount (rtx, rtx);
282
static int refers_to_mem_for_reload_p (rtx);
283
static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
284
                                         rtx, rtx *);
285
 
286
/* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
287
   list yet.  */
288
 
289
static void
290
push_reg_equiv_alt_mem (int regno, rtx mem)
291
{
292
  rtx it;
293
 
294
  for (it = reg_equiv_alt_mem_list [regno]; it; it = XEXP (it, 1))
295
    if (rtx_equal_p (XEXP (it, 0), mem))
296
      return;
297
 
298
  reg_equiv_alt_mem_list [regno]
299
    = alloc_EXPR_LIST (REG_EQUIV, mem,
300
                       reg_equiv_alt_mem_list [regno]);
301
}
302
 
303
/* Determine if any secondary reloads are needed for loading (if IN_P is
304
   nonzero) or storing (if IN_P is zero) X to or from a reload register of
305
   register class RELOAD_CLASS in mode RELOAD_MODE.  If secondary reloads
306
   are needed, push them.
307
 
308
   Return the reload number of the secondary reload we made, or -1 if
309
   we didn't need one.  *PICODE is set to the insn_code to use if we do
310
   need a secondary reload.  */
311
 
312
static int
313
push_secondary_reload (int in_p, rtx x, int opnum, int optional,
314
                       enum reg_class reload_class,
315
                       enum machine_mode reload_mode, enum reload_type type,
316
                       enum insn_code *picode, secondary_reload_info *prev_sri)
317
{
318
  enum reg_class class = NO_REGS;
319
  enum reg_class scratch_class;
320
  enum machine_mode mode = reload_mode;
321
  enum insn_code icode = CODE_FOR_nothing;
322
  enum insn_code t_icode = CODE_FOR_nothing;
323
  enum reload_type secondary_type;
324
  int s_reload, t_reload = -1;
325
  const char *scratch_constraint;
326
  char letter;
327
  secondary_reload_info sri;
328
 
329
  if (type == RELOAD_FOR_INPUT_ADDRESS
330
      || type == RELOAD_FOR_OUTPUT_ADDRESS
331
      || type == RELOAD_FOR_INPADDR_ADDRESS
332
      || type == RELOAD_FOR_OUTADDR_ADDRESS)
333
    secondary_type = type;
334
  else
335
    secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
336
 
337
  *picode = CODE_FOR_nothing;
338
 
339
  /* If X is a paradoxical SUBREG, use the inner value to determine both the
340
     mode and object being reloaded.  */
341
  if (GET_CODE (x) == SUBREG
342
      && (GET_MODE_SIZE (GET_MODE (x))
343
          > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
344
    {
345
      x = SUBREG_REG (x);
346
      reload_mode = GET_MODE (x);
347
    }
348
 
349
  /* If X is a pseudo-register that has an equivalent MEM (actually, if it
350
     is still a pseudo-register by now, it *must* have an equivalent MEM
351
     but we don't want to assume that), use that equivalent when seeing if
352
     a secondary reload is needed since whether or not a reload is needed
353
     might be sensitive to the form of the MEM.  */
354
 
355
  if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
356
      && reg_equiv_mem[REGNO (x)] != 0)
357
    x = reg_equiv_mem[REGNO (x)];
358
 
359
  sri.icode = CODE_FOR_nothing;
360
  sri.prev_sri = prev_sri;
361
  class = targetm.secondary_reload (in_p, x, reload_class, reload_mode, &sri);
362
  icode = sri.icode;
363
 
364
  /* If we don't need any secondary registers, done.  */
365
  if (class == NO_REGS && icode == CODE_FOR_nothing)
366
    return -1;
367
 
368
  if (class != NO_REGS)
369
    t_reload = push_secondary_reload (in_p, x, opnum, optional, class,
370
                                      reload_mode, type, &t_icode, &sri);
371
 
372
  /* If we will be using an insn, the secondary reload is for a
373
     scratch register.  */
374
 
375
  if (icode != CODE_FOR_nothing)
376
    {
377
      /* If IN_P is nonzero, the reload register will be the output in
378
         operand 0.  If IN_P is zero, the reload register will be the input
379
         in operand 1.  Outputs should have an initial "=", which we must
380
         skip.  */
381
 
382
      /* ??? It would be useful to be able to handle only two, or more than
383
         three, operands, but for now we can only handle the case of having
384
         exactly three: output, input and one temp/scratch.  */
385
      gcc_assert (insn_data[(int) icode].n_operands == 3);
386
 
387
      /* ??? We currently have no way to represent a reload that needs
388
         an icode to reload from an intermediate tertiary reload register.
389
         We should probably have a new field in struct reload to tag a
390
         chain of scratch operand reloads onto.   */
391
      gcc_assert (class == NO_REGS);
392
 
393
      scratch_constraint = insn_data[(int) icode].operand[2].constraint;
394
      gcc_assert (*scratch_constraint == '=');
395
      scratch_constraint++;
396
      if (*scratch_constraint == '&')
397
        scratch_constraint++;
398
      letter = *scratch_constraint;
399
      scratch_class = (letter == 'r' ? GENERAL_REGS
400
                       : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter,
401
                                                   scratch_constraint));
402
 
403
      class = scratch_class;
404
      mode = insn_data[(int) icode].operand[2].mode;
405
    }
406
 
407
  /* This case isn't valid, so fail.  Reload is allowed to use the same
408
     register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
409
     in the case of a secondary register, we actually need two different
410
     registers for correct code.  We fail here to prevent the possibility of
411
     silently generating incorrect code later.
412
 
413
     The convention is that secondary input reloads are valid only if the
414
     secondary_class is different from class.  If you have such a case, you
415
     can not use secondary reloads, you must work around the problem some
416
     other way.
417
 
418
     Allow this when a reload_in/out pattern is being used.  I.e. assume
419
     that the generated code handles this case.  */
420
 
421
  gcc_assert (!in_p || class != reload_class || icode != CODE_FOR_nothing
422
              || t_icode != CODE_FOR_nothing);
423
 
424
  /* See if we can reuse an existing secondary reload.  */
425
  for (s_reload = 0; s_reload < n_reloads; s_reload++)
426
    if (rld[s_reload].secondary_p
427
        && (reg_class_subset_p (class, rld[s_reload].class)
428
            || reg_class_subset_p (rld[s_reload].class, class))
429
        && ((in_p && rld[s_reload].inmode == mode)
430
            || (! in_p && rld[s_reload].outmode == mode))
431
        && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
432
            || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
433
        && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
434
            || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
435
        && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
436
        && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
437
                             opnum, rld[s_reload].opnum))
438
      {
439
        if (in_p)
440
          rld[s_reload].inmode = mode;
441
        if (! in_p)
442
          rld[s_reload].outmode = mode;
443
 
444
        if (reg_class_subset_p (class, rld[s_reload].class))
445
          rld[s_reload].class = class;
446
 
447
        rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
448
        rld[s_reload].optional &= optional;
449
        rld[s_reload].secondary_p = 1;
450
        if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
451
                            opnum, rld[s_reload].opnum))
452
          rld[s_reload].when_needed = RELOAD_OTHER;
453
      }
454
 
455
  if (s_reload == n_reloads)
456
    {
457
#ifdef SECONDARY_MEMORY_NEEDED
458
      /* If we need a memory location to copy between the two reload regs,
459
         set it up now.  Note that we do the input case before making
460
         the reload and the output case after.  This is due to the
461
         way reloads are output.  */
462
 
463
      if (in_p && icode == CODE_FOR_nothing
464
          && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
465
        {
466
          get_secondary_mem (x, reload_mode, opnum, type);
467
 
468
          /* We may have just added new reloads.  Make sure we add
469
             the new reload at the end.  */
470
          s_reload = n_reloads;
471
        }
472
#endif
473
 
474
      /* We need to make a new secondary reload for this register class.  */
475
      rld[s_reload].in = rld[s_reload].out = 0;
476
      rld[s_reload].class = class;
477
 
478
      rld[s_reload].inmode = in_p ? mode : VOIDmode;
479
      rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
480
      rld[s_reload].reg_rtx = 0;
481
      rld[s_reload].optional = optional;
482
      rld[s_reload].inc = 0;
483
      /* Maybe we could combine these, but it seems too tricky.  */
484
      rld[s_reload].nocombine = 1;
485
      rld[s_reload].in_reg = 0;
486
      rld[s_reload].out_reg = 0;
487
      rld[s_reload].opnum = opnum;
488
      rld[s_reload].when_needed = secondary_type;
489
      rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
490
      rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
491
      rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
492
      rld[s_reload].secondary_out_icode
493
        = ! in_p ? t_icode : CODE_FOR_nothing;
494
      rld[s_reload].secondary_p = 1;
495
 
496
      n_reloads++;
497
 
498
#ifdef SECONDARY_MEMORY_NEEDED
499
      if (! in_p && icode == CODE_FOR_nothing
500
          && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
501
        get_secondary_mem (x, mode, opnum, type);
502
#endif
503
    }
504
 
505
  *picode = icode;
506
  return s_reload;
507
}
508
 
509
/* If a secondary reload is needed, return its class.  If both an intermediate
510
   register and a scratch register is needed, we return the class of the
511
   intermediate register.  */
512
enum reg_class
513
secondary_reload_class (bool in_p, enum reg_class class,
514
                        enum machine_mode mode, rtx x)
515
{
516
  enum insn_code icode;
517
  secondary_reload_info sri;
518
 
519
  sri.icode = CODE_FOR_nothing;
520
  sri.prev_sri = NULL;
521
  class = targetm.secondary_reload (in_p, x, class, mode, &sri);
522
  icode = sri.icode;
523
 
524
  /* If there are no secondary reloads at all, we return NO_REGS.
525
     If an intermediate register is needed, we return its class.  */
526
  if (icode == CODE_FOR_nothing || class != NO_REGS)
527
    return class;
528
 
529
  /* No intermediate register is needed, but we have a special reload
530
     pattern, which we assume for now needs a scratch register.  */
531
  return scratch_reload_class (icode);
532
}
533
 
534
/* ICODE is the insn_code of a reload pattern.  Check that it has exactly
535
   three operands, verify that operand 2 is an output operand, and return
536
   its register class.
537
   ??? We'd like to be able to handle any pattern with at least 2 operands,
538
   for zero or more scratch registers, but that needs more infrastructure.  */
539
enum reg_class
540
scratch_reload_class (enum insn_code icode)
541
{
542
  const char *scratch_constraint;
543
  char scratch_letter;
544
  enum reg_class class;
545
 
546
  gcc_assert (insn_data[(int) icode].n_operands == 3);
547
  scratch_constraint = insn_data[(int) icode].operand[2].constraint;
548
  gcc_assert (*scratch_constraint == '=');
549
  scratch_constraint++;
550
  if (*scratch_constraint == '&')
551
    scratch_constraint++;
552
  scratch_letter = *scratch_constraint;
553
  if (scratch_letter == 'r')
554
    return GENERAL_REGS;
555
  class = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter,
556
                                     scratch_constraint);
557
  gcc_assert (class != NO_REGS);
558
  return class;
559
}
560
 
561
#ifdef SECONDARY_MEMORY_NEEDED
562
 
563
/* Return a memory location that will be used to copy X in mode MODE.
564
   If we haven't already made a location for this mode in this insn,
565
   call find_reloads_address on the location being returned.  */
566
 
567
rtx
568
get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
569
                   int opnum, enum reload_type type)
570
{
571
  rtx loc;
572
  int mem_valid;
573
 
574
  /* By default, if MODE is narrower than a word, widen it to a word.
575
     This is required because most machines that require these memory
576
     locations do not support short load and stores from all registers
577
     (e.g., FP registers).  */
578
 
579
#ifdef SECONDARY_MEMORY_NEEDED_MODE
580
  mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
581
#else
582
  if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
583
    mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
584
#endif
585
 
586
  /* If we already have made a MEM for this operand in MODE, return it.  */
587
  if (secondary_memlocs_elim[(int) mode][opnum] != 0)
588
    return secondary_memlocs_elim[(int) mode][opnum];
589
 
590
  /* If this is the first time we've tried to get a MEM for this mode,
591
     allocate a new one.  `something_changed' in reload will get set
592
     by noticing that the frame size has changed.  */
593
 
594
  if (secondary_memlocs[(int) mode] == 0)
595
    {
596
#ifdef SECONDARY_MEMORY_NEEDED_RTX
597
      secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
598
#else
599
      secondary_memlocs[(int) mode]
600
        = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
601
#endif
602
    }
603
 
604
  /* Get a version of the address doing any eliminations needed.  If that
605
     didn't give us a new MEM, make a new one if it isn't valid.  */
606
 
607
  loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
608
  mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
609
 
610
  if (! mem_valid && loc == secondary_memlocs[(int) mode])
611
    loc = copy_rtx (loc);
612
 
613
  /* The only time the call below will do anything is if the stack
614
     offset is too large.  In that case IND_LEVELS doesn't matter, so we
615
     can just pass a zero.  Adjust the type to be the address of the
616
     corresponding object.  If the address was valid, save the eliminated
617
     address.  If it wasn't valid, we need to make a reload each time, so
618
     don't save it.  */
619
 
620
  if (! mem_valid)
621
    {
622
      type =  (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
623
               : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
624
               : RELOAD_OTHER);
625
 
626
      find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
627
                            opnum, type, 0, 0);
628
    }
629
 
630
  secondary_memlocs_elim[(int) mode][opnum] = loc;
631
  if (secondary_memlocs_elim_used <= (int)mode)
632
    secondary_memlocs_elim_used = (int)mode + 1;
633
  return loc;
634
}
635
 
636
/* Clear any secondary memory locations we've made.  */
637
 
638
void
639
clear_secondary_mem (void)
640
{
641
  memset (secondary_memlocs, 0, sizeof secondary_memlocs);
642
}
643
#endif /* SECONDARY_MEMORY_NEEDED */
644
 
645
 
646
/* Find the largest class which has at least one register valid in
647
   mode INNER, and which for every such register, that register number
648
   plus N is also valid in OUTER (if in range) and is cheap to move
649
   into REGNO.  Such a class must exist.  */
650
 
651
static enum reg_class
652
find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED,
653
                  enum machine_mode inner ATTRIBUTE_UNUSED, int n,
654
                  unsigned int dest_regno ATTRIBUTE_UNUSED)
655
{
656
  int best_cost = -1;
657
  int class;
658
  int regno;
659
  enum reg_class best_class = NO_REGS;
660
  enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
661
  unsigned int best_size = 0;
662
  int cost;
663
 
664
  for (class = 1; class < N_REG_CLASSES; class++)
665
    {
666
      int bad = 0;
667
      int good = 0;
668
      for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
669
        if (TEST_HARD_REG_BIT (reg_class_contents[class], regno))
670
          {
671
            if (HARD_REGNO_MODE_OK (regno, inner))
672
              {
673
                good = 1;
674
                if (! TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
675
                    || ! HARD_REGNO_MODE_OK (regno + n, outer))
676
                  bad = 1;
677
              }
678
          }
679
 
680
      if (bad || !good)
681
        continue;
682
      cost = REGISTER_MOVE_COST (outer, class, dest_class);
683
 
684
      if ((reg_class_size[class] > best_size
685
           && (best_cost < 0 || best_cost >= cost))
686
          || best_cost > cost)
687
        {
688
          best_class = class;
689
          best_size = reg_class_size[class];
690
          best_cost = REGISTER_MOVE_COST (outer, class, dest_class);
691
        }
692
    }
693
 
694
  gcc_assert (best_size != 0);
695
 
696
  return best_class;
697
}
698
 
699
/* Return the number of a previously made reload that can be combined with
700
   a new one, or n_reloads if none of the existing reloads can be used.
701
   OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
702
   push_reload, they determine the kind of the new reload that we try to
703
   combine.  P_IN points to the corresponding value of IN, which can be
704
   modified by this function.
705
   DONT_SHARE is nonzero if we can't share any input-only reload for IN.  */
706
 
707
static int
708
find_reusable_reload (rtx *p_in, rtx out, enum reg_class class,
709
                      enum reload_type type, int opnum, int dont_share)
710
{
711
  rtx in = *p_in;
712
  int i;
713
  /* We can't merge two reloads if the output of either one is
714
     earlyclobbered.  */
715
 
716
  if (earlyclobber_operand_p (out))
717
    return n_reloads;
718
 
719
  /* We can use an existing reload if the class is right
720
     and at least one of IN and OUT is a match
721
     and the other is at worst neutral.
722
     (A zero compared against anything is neutral.)
723
 
724
     If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
725
     for the same thing since that can cause us to need more reload registers
726
     than we otherwise would.  */
727
 
728
  for (i = 0; i < n_reloads; i++)
729
    if ((reg_class_subset_p (class, rld[i].class)
730
         || reg_class_subset_p (rld[i].class, class))
731
        /* If the existing reload has a register, it must fit our class.  */
732
        && (rld[i].reg_rtx == 0
733
            || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
734
                                  true_regnum (rld[i].reg_rtx)))
735
        && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
736
             && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
737
            || (out != 0 && MATCHES (rld[i].out, out)
738
                && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
739
        && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
740
        && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
741
        && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
742
      return i;
743
 
744
  /* Reloading a plain reg for input can match a reload to postincrement
745
     that reg, since the postincrement's value is the right value.
746
     Likewise, it can match a preincrement reload, since we regard
747
     the preincrementation as happening before any ref in this insn
748
     to that register.  */
749
  for (i = 0; i < n_reloads; i++)
750
    if ((reg_class_subset_p (class, rld[i].class)
751
         || reg_class_subset_p (rld[i].class, class))
752
        /* If the existing reload has a register, it must fit our
753
           class.  */
754
        && (rld[i].reg_rtx == 0
755
            || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
756
                                  true_regnum (rld[i].reg_rtx)))
757
        && out == 0 && rld[i].out == 0 && rld[i].in != 0
758
        && ((REG_P (in)
759
             && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
760
             && MATCHES (XEXP (rld[i].in, 0), in))
761
            || (REG_P (rld[i].in)
762
                && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
763
                && MATCHES (XEXP (in, 0), rld[i].in)))
764
        && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
765
        && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
766
        && MERGABLE_RELOADS (type, rld[i].when_needed,
767
                             opnum, rld[i].opnum))
768
      {
769
        /* Make sure reload_in ultimately has the increment,
770
           not the plain register.  */
771
        if (REG_P (in))
772
          *p_in = rld[i].in;
773
        return i;
774
      }
775
  return n_reloads;
776
}
777
 
778
/* Return nonzero if X is a SUBREG which will require reloading of its
779
   SUBREG_REG expression.  */
780
 
781
static int
782
reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
783
{
784
  rtx inner;
785
 
786
  /* Only SUBREGs are problematical.  */
787
  if (GET_CODE (x) != SUBREG)
788
    return 0;
789
 
790
  inner = SUBREG_REG (x);
791
 
792
  /* If INNER is a constant or PLUS, then INNER must be reloaded.  */
793
  if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
794
    return 1;
795
 
796
  /* If INNER is not a hard register, then INNER will not need to
797
     be reloaded.  */
798
  if (!REG_P (inner)
799
      || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
800
    return 0;
801
 
802
  /* If INNER is not ok for MODE, then INNER will need reloading.  */
803
  if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
804
    return 1;
805
 
806
  /* If the outer part is a word or smaller, INNER larger than a
807
     word and the number of regs for INNER is not the same as the
808
     number of words in INNER, then INNER will need reloading.  */
809
  return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
810
          && output
811
          && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
812
          && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
813
              != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
814
}
815
 
816
/* Return nonzero if IN can be reloaded into REGNO with mode MODE without
817
   requiring an extra reload register.  The caller has already found that
818
   IN contains some reference to REGNO, so check that we can produce the
819
   new value in a single step.  E.g. if we have
820
   (set (reg r13) (plus (reg r13) (const int 1))), and there is an
821
   instruction that adds one to a register, this should succeed.
822
   However, if we have something like
823
   (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
824
   needs to be loaded into a register first, we need a separate reload
825
   register.
826
   Such PLUS reloads are generated by find_reload_address_part.
827
   The out-of-range PLUS expressions are usually introduced in the instruction
828
   patterns by register elimination and substituting pseudos without a home
829
   by their function-invariant equivalences.  */
830
static int
831
can_reload_into (rtx in, int regno, enum machine_mode mode)
832
{
833
  rtx dst, test_insn;
834
  int r = 0;
835
  struct recog_data save_recog_data;
836
 
837
  /* For matching constraints, we often get notional input reloads where
838
     we want to use the original register as the reload register.  I.e.
839
     technically this is a non-optional input-output reload, but IN is
840
     already a valid register, and has been chosen as the reload register.
841
     Speed this up, since it trivially works.  */
842
  if (REG_P (in))
843
    return 1;
844
 
845
  /* To test MEMs properly, we'd have to take into account all the reloads
846
     that are already scheduled, which can become quite complicated.
847
     And since we've already handled address reloads for this MEM, it
848
     should always succeed anyway.  */
849
  if (MEM_P (in))
850
    return 1;
851
 
852
  /* If we can make a simple SET insn that does the job, everything should
853
     be fine.  */
854
  dst =  gen_rtx_REG (mode, regno);
855
  test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
856
  save_recog_data = recog_data;
857
  if (recog_memoized (test_insn) >= 0)
858
    {
859
      extract_insn (test_insn);
860
      r = constrain_operands (1);
861
    }
862
  recog_data = save_recog_data;
863
  return r;
864
}
865
 
866
/* Record one reload that needs to be performed.
867
   IN is an rtx saying where the data are to be found before this instruction.
868
   OUT says where they must be stored after the instruction.
869
   (IN is zero for data not read, and OUT is zero for data not written.)
870
   INLOC and OUTLOC point to the places in the instructions where
871
   IN and OUT were found.
872
   If IN and OUT are both nonzero, it means the same register must be used
873
   to reload both IN and OUT.
874
 
875
   CLASS is a register class required for the reloaded data.
876
   INMODE is the machine mode that the instruction requires
877
   for the reg that replaces IN and OUTMODE is likewise for OUT.
878
 
879
   If IN is zero, then OUT's location and mode should be passed as
880
   INLOC and INMODE.
881
 
882
   STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
883
 
884
   OPTIONAL nonzero means this reload does not need to be performed:
885
   it can be discarded if that is more convenient.
886
 
887
   OPNUM and TYPE say what the purpose of this reload is.
888
 
889
   The return value is the reload-number for this reload.
890
 
891
   If both IN and OUT are nonzero, in some rare cases we might
892
   want to make two separate reloads.  (Actually we never do this now.)
893
   Therefore, the reload-number for OUT is stored in
894
   output_reloadnum when we return; the return value applies to IN.
895
   Usually (presently always), when IN and OUT are nonzero,
896
   the two reload-numbers are equal, but the caller should be careful to
897
   distinguish them.  */
898
 
899
int
900
push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
901
             enum reg_class class, enum machine_mode inmode,
902
             enum machine_mode outmode, int strict_low, int optional,
903
             int opnum, enum reload_type type)
904
{
905
  int i;
906
  int dont_share = 0;
907
  int dont_remove_subreg = 0;
908
  rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
909
  int secondary_in_reload = -1, secondary_out_reload = -1;
910
  enum insn_code secondary_in_icode = CODE_FOR_nothing;
911
  enum insn_code secondary_out_icode = CODE_FOR_nothing;
912
 
913
  /* INMODE and/or OUTMODE could be VOIDmode if no mode
914
     has been specified for the operand.  In that case,
915
     use the operand's mode as the mode to reload.  */
916
  if (inmode == VOIDmode && in != 0)
917
    inmode = GET_MODE (in);
918
  if (outmode == VOIDmode && out != 0)
919
    outmode = GET_MODE (out);
920
 
921
  /* If IN is a pseudo register everywhere-equivalent to a constant, and
922
     it is not in a hard register, reload straight from the constant,
923
     since we want to get rid of such pseudo registers.
924
     Often this is done earlier, but not always in find_reloads_address.  */
925
  if (in != 0 && REG_P (in))
926
    {
927
      int regno = REGNO (in);
928
 
929
      if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
930
          && reg_equiv_constant[regno] != 0)
931
        in = reg_equiv_constant[regno];
932
    }
933
 
934
  /* Likewise for OUT.  Of course, OUT will never be equivalent to
935
     an actual constant, but it might be equivalent to a memory location
936
     (in the case of a parameter).  */
937
  if (out != 0 && REG_P (out))
938
    {
939
      int regno = REGNO (out);
940
 
941
      if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
942
          && reg_equiv_constant[regno] != 0)
943
        out = reg_equiv_constant[regno];
944
    }
945
 
946
  /* If we have a read-write operand with an address side-effect,
947
     change either IN or OUT so the side-effect happens only once.  */
948
  if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
949
    switch (GET_CODE (XEXP (in, 0)))
950
      {
951
      case POST_INC: case POST_DEC:   case POST_MODIFY:
952
        in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
953
        break;
954
 
955
      case PRE_INC: case PRE_DEC: case PRE_MODIFY:
956
        out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
957
        break;
958
 
959
      default:
960
        break;
961
      }
962
 
963
  /* If we are reloading a (SUBREG constant ...), really reload just the
964
     inside expression in its own mode.  Similarly for (SUBREG (PLUS ...)).
965
     If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
966
     a pseudo and hence will become a MEM) with M1 wider than M2 and the
967
     register is a pseudo, also reload the inside expression.
968
     For machines that extend byte loads, do this for any SUBREG of a pseudo
969
     where both M1 and M2 are a word or smaller, M1 is wider than M2, and
970
     M2 is an integral mode that gets extended when loaded.
971
     Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
972
     either M1 is not valid for R or M2 is wider than a word but we only
973
     need one word to store an M2-sized quantity in R.
974
     (However, if OUT is nonzero, we need to reload the reg *and*
975
     the subreg, so do nothing here, and let following statement handle it.)
976
 
977
     Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
978
     we can't handle it here because CONST_INT does not indicate a mode.
979
 
980
     Similarly, we must reload the inside expression if we have a
981
     STRICT_LOW_PART (presumably, in == out in the cas).
982
 
983
     Also reload the inner expression if it does not require a secondary
984
     reload but the SUBREG does.
985
 
986
     Finally, reload the inner expression if it is a register that is in
987
     the class whose registers cannot be referenced in a different size
988
     and M1 is not the same size as M2.  If subreg_lowpart_p is false, we
989
     cannot reload just the inside since we might end up with the wrong
990
     register class.  But if it is inside a STRICT_LOW_PART, we have
991
     no choice, so we hope we do get the right register class there.  */
992
 
993
  if (in != 0 && GET_CODE (in) == SUBREG
994
      && (subreg_lowpart_p (in) || strict_low)
995
#ifdef CANNOT_CHANGE_MODE_CLASS
996
      && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
997
#endif
998
      && (CONSTANT_P (SUBREG_REG (in))
999
          || GET_CODE (SUBREG_REG (in)) == PLUS
1000
          || strict_low
1001
          || (((REG_P (SUBREG_REG (in))
1002
                && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1003
               || MEM_P (SUBREG_REG (in)))
1004
              && ((GET_MODE_SIZE (inmode)
1005
                   > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1006
#ifdef LOAD_EXTEND_OP
1007
                  || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1008
                      && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1009
                          <= UNITS_PER_WORD)
1010
                      && (GET_MODE_SIZE (inmode)
1011
                          > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1012
                      && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1013
                      && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != UNKNOWN)
1014
#endif
1015
#ifdef WORD_REGISTER_OPERATIONS
1016
                  || ((GET_MODE_SIZE (inmode)
1017
                       < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1018
                      && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1019
                          ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1020
                           / UNITS_PER_WORD)))
1021
#endif
1022
                  ))
1023
          || (REG_P (SUBREG_REG (in))
1024
              && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1025
              /* The case where out is nonzero
1026
                 is handled differently in the following statement.  */
1027
              && (out == 0 || subreg_lowpart_p (in))
1028
              && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1029
                   && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1030
                       > UNITS_PER_WORD)
1031
                   && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1032
                        / UNITS_PER_WORD)
1033
                       != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1034
                                                [GET_MODE (SUBREG_REG (in))]))
1035
                  || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1036
          || (secondary_reload_class (1, class, inmode, in) != NO_REGS
1037
              && (secondary_reload_class (1, class, GET_MODE (SUBREG_REG (in)),
1038
                                          SUBREG_REG (in))
1039
                  == NO_REGS))
1040
#ifdef CANNOT_CHANGE_MODE_CLASS
1041
          || (REG_P (SUBREG_REG (in))
1042
              && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1043
              && REG_CANNOT_CHANGE_MODE_P
1044
              (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1045
#endif
1046
          ))
1047
    {
1048
      in_subreg_loc = inloc;
1049
      inloc = &SUBREG_REG (in);
1050
      in = *inloc;
1051
#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1052
      if (MEM_P (in))
1053
        /* This is supposed to happen only for paradoxical subregs made by
1054
           combine.c.  (SUBREG (MEM)) isn't supposed to occur other ways.  */
1055
        gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode));
1056
#endif
1057
      inmode = GET_MODE (in);
1058
    }
1059
 
1060
  /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1061
     either M1 is not valid for R or M2 is wider than a word but we only
1062
     need one word to store an M2-sized quantity in R.
1063
 
1064
     However, we must reload the inner reg *as well as* the subreg in
1065
     that case.  */
1066
 
1067
  /* Similar issue for (SUBREG constant ...) if it was not handled by the
1068
     code above.  This can happen if SUBREG_BYTE != 0.  */
1069
 
1070
  if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1071
    {
1072
      enum reg_class in_class = class;
1073
 
1074
      if (REG_P (SUBREG_REG (in)))
1075
        in_class
1076
          = find_valid_class (inmode, GET_MODE (SUBREG_REG (in)),
1077
                              subreg_regno_offset (REGNO (SUBREG_REG (in)),
1078
                                                   GET_MODE (SUBREG_REG (in)),
1079
                                                   SUBREG_BYTE (in),
1080
                                                   GET_MODE (in)),
1081
                              REGNO (SUBREG_REG (in)));
1082
 
1083
      /* This relies on the fact that emit_reload_insns outputs the
1084
         instructions for input reloads of type RELOAD_OTHER in the same
1085
         order as the reloads.  Thus if the outer reload is also of type
1086
         RELOAD_OTHER, we are guaranteed that this inner reload will be
1087
         output before the outer reload.  */
1088
      push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1089
                   in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1090
      dont_remove_subreg = 1;
1091
    }
1092
 
1093
  /* Similarly for paradoxical and problematical SUBREGs on the output.
1094
     Note that there is no reason we need worry about the previous value
1095
     of SUBREG_REG (out); even if wider than out,
1096
     storing in a subreg is entitled to clobber it all
1097
     (except in the case of STRICT_LOW_PART,
1098
     and in that case the constraint should label it input-output.)  */
1099
  if (out != 0 && GET_CODE (out) == SUBREG
1100
      && (subreg_lowpart_p (out) || strict_low)
1101
#ifdef CANNOT_CHANGE_MODE_CLASS
1102
      && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1103
#endif
1104
      && (CONSTANT_P (SUBREG_REG (out))
1105
          || strict_low
1106
          || (((REG_P (SUBREG_REG (out))
1107
                && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1108
               || MEM_P (SUBREG_REG (out)))
1109
              && ((GET_MODE_SIZE (outmode)
1110
                   > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1111
#ifdef WORD_REGISTER_OPERATIONS
1112
                  || ((GET_MODE_SIZE (outmode)
1113
                       < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1114
                      && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1115
                          ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1116
                           / UNITS_PER_WORD)))
1117
#endif
1118
                  ))
1119
          || (REG_P (SUBREG_REG (out))
1120
              && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1121
              && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1122
                   && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1123
                       > UNITS_PER_WORD)
1124
                   && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1125
                        / UNITS_PER_WORD)
1126
                       != (int) hard_regno_nregs[REGNO (SUBREG_REG (out))]
1127
                                                [GET_MODE (SUBREG_REG (out))]))
1128
                  || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1129
          || (secondary_reload_class (0, class, outmode, out) != NO_REGS
1130
              && (secondary_reload_class (0, class, GET_MODE (SUBREG_REG (out)),
1131
                                          SUBREG_REG (out))
1132
                  == NO_REGS))
1133
#ifdef CANNOT_CHANGE_MODE_CLASS
1134
          || (REG_P (SUBREG_REG (out))
1135
              && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1136
              && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1137
                                           GET_MODE (SUBREG_REG (out)),
1138
                                           outmode))
1139
#endif
1140
          ))
1141
    {
1142
      out_subreg_loc = outloc;
1143
      outloc = &SUBREG_REG (out);
1144
      out = *outloc;
1145
#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1146
      gcc_assert (!MEM_P (out)
1147
                  || GET_MODE_SIZE (GET_MODE (out))
1148
                     <= GET_MODE_SIZE (outmode));
1149
#endif
1150
      outmode = GET_MODE (out);
1151
    }
1152
 
1153
  /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1154
     either M1 is not valid for R or M2 is wider than a word but we only
1155
     need one word to store an M2-sized quantity in R.
1156
 
1157
     However, we must reload the inner reg *as well as* the subreg in
1158
     that case.  In this case, the inner reg is an in-out reload.  */
1159
 
1160
  if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1161
    {
1162
      /* This relies on the fact that emit_reload_insns outputs the
1163
         instructions for output reloads of type RELOAD_OTHER in reverse
1164
         order of the reloads.  Thus if the outer reload is also of type
1165
         RELOAD_OTHER, we are guaranteed that this inner reload will be
1166
         output after the outer reload.  */
1167
      dont_remove_subreg = 1;
1168
      push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1169
                   &SUBREG_REG (out),
1170
                   find_valid_class (outmode, GET_MODE (SUBREG_REG (out)),
1171
                                     subreg_regno_offset (REGNO (SUBREG_REG (out)),
1172
                                                          GET_MODE (SUBREG_REG (out)),
1173
                                                          SUBREG_BYTE (out),
1174
                                                          GET_MODE (out)),
1175
                                     REGNO (SUBREG_REG (out))),
1176
                   VOIDmode, VOIDmode, 0, 0,
1177
                   opnum, RELOAD_OTHER);
1178
    }
1179
 
1180
  /* If IN appears in OUT, we can't share any input-only reload for IN.  */
1181
  if (in != 0 && out != 0 && MEM_P (out)
1182
      && (REG_P (in) || MEM_P (in) || GET_CODE (in) == PLUS)
1183
      && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1184
    dont_share = 1;
1185
 
1186
  /* If IN is a SUBREG of a hard register, make a new REG.  This
1187
     simplifies some of the cases below.  */
1188
 
1189
  if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1190
      && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1191
      && ! dont_remove_subreg)
1192
    in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1193
 
1194
  /* Similarly for OUT.  */
1195
  if (out != 0 && GET_CODE (out) == SUBREG
1196
      && REG_P (SUBREG_REG (out))
1197
      && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1198
      && ! dont_remove_subreg)
1199
    out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1200
 
1201
  /* Narrow down the class of register wanted if that is
1202
     desirable on this machine for efficiency.  */
1203
  {
1204
    enum reg_class preferred_class = class;
1205
 
1206
    if (in != 0)
1207
      preferred_class = PREFERRED_RELOAD_CLASS (in, class);
1208
 
1209
  /* Output reloads may need analogous treatment, different in detail.  */
1210
#ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1211
    if (out != 0)
1212
      preferred_class = PREFERRED_OUTPUT_RELOAD_CLASS (out, preferred_class);
1213
#endif
1214
 
1215
    /* Discard what the target said if we cannot do it.  */
1216
    if (preferred_class != NO_REGS
1217
        || (optional && type == RELOAD_FOR_OUTPUT))
1218
      class = preferred_class;
1219
  }
1220
 
1221
  /* Make sure we use a class that can handle the actual pseudo
1222
     inside any subreg.  For example, on the 386, QImode regs
1223
     can appear within SImode subregs.  Although GENERAL_REGS
1224
     can handle SImode, QImode needs a smaller class.  */
1225
#ifdef LIMIT_RELOAD_CLASS
1226
  if (in_subreg_loc)
1227
    class = LIMIT_RELOAD_CLASS (inmode, class);
1228
  else if (in != 0 && GET_CODE (in) == SUBREG)
1229
    class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1230
 
1231
  if (out_subreg_loc)
1232
    class = LIMIT_RELOAD_CLASS (outmode, class);
1233
  if (out != 0 && GET_CODE (out) == SUBREG)
1234
    class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1235
#endif
1236
 
1237
  /* Verify that this class is at least possible for the mode that
1238
     is specified.  */
1239
  if (this_insn_is_asm)
1240
    {
1241
      enum machine_mode mode;
1242
      if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1243
        mode = inmode;
1244
      else
1245
        mode = outmode;
1246
      if (mode == VOIDmode)
1247
        {
1248
          error_for_asm (this_insn, "cannot reload integer constant "
1249
                         "operand in %<asm%>");
1250
          mode = word_mode;
1251
          if (in != 0)
1252
            inmode = word_mode;
1253
          if (out != 0)
1254
            outmode = word_mode;
1255
        }
1256
      for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1257
        if (HARD_REGNO_MODE_OK (i, mode)
1258
            && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1259
          {
1260
            int nregs = hard_regno_nregs[i][mode];
1261
 
1262
            int j;
1263
            for (j = 1; j < nregs; j++)
1264
              if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1265
                break;
1266
            if (j == nregs)
1267
              break;
1268
          }
1269
      if (i == FIRST_PSEUDO_REGISTER)
1270
        {
1271
          error_for_asm (this_insn, "impossible register constraint "
1272
                         "in %<asm%>");
1273
          /* Avoid further trouble with this insn.  */
1274
          PATTERN (this_insn) = gen_rtx_USE (VOIDmode, const0_rtx);
1275
          /* We used to continue here setting class to ALL_REGS, but it triggers
1276
             sanity check on i386 for:
1277
             void foo(long double d)
1278
             {
1279
               asm("" :: "a" (d));
1280
             }
1281
             Returning zero here ought to be safe as we take care in
1282
             find_reloads to not process the reloads when instruction was
1283
             replaced by USE.  */
1284
 
1285
          return 0;
1286
        }
1287
    }
1288
 
1289
  /* Optional output reloads are always OK even if we have no register class,
1290
     since the function of these reloads is only to have spill_reg_store etc.
1291
     set, so that the storing insn can be deleted later.  */
1292
  gcc_assert (class != NO_REGS
1293
              || (optional != 0 && type == RELOAD_FOR_OUTPUT));
1294
 
1295
  i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1296
 
1297
  if (i == n_reloads)
1298
    {
1299
      /* See if we need a secondary reload register to move between CLASS
1300
         and IN or CLASS and OUT.  Get the icode and push any required reloads
1301
         needed for each of them if so.  */
1302
 
1303
      if (in != 0)
1304
        secondary_in_reload
1305
          = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1306
                                   &secondary_in_icode, NULL);
1307
      if (out != 0 && GET_CODE (out) != SCRATCH)
1308
        secondary_out_reload
1309
          = push_secondary_reload (0, out, opnum, optional, class, outmode,
1310
                                   type, &secondary_out_icode, NULL);
1311
 
1312
      /* We found no existing reload suitable for re-use.
1313
         So add an additional reload.  */
1314
 
1315
#ifdef SECONDARY_MEMORY_NEEDED
1316
      /* If a memory location is needed for the copy, make one.  */
1317
      if (in != 0
1318
          && (REG_P (in)
1319
              || (GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))))
1320
          && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1321
          && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1322
                                      class, inmode))
1323
        get_secondary_mem (in, inmode, opnum, type);
1324
#endif
1325
 
1326
      i = n_reloads;
1327
      rld[i].in = in;
1328
      rld[i].out = out;
1329
      rld[i].class = class;
1330
      rld[i].inmode = inmode;
1331
      rld[i].outmode = outmode;
1332
      rld[i].reg_rtx = 0;
1333
      rld[i].optional = optional;
1334
      rld[i].inc = 0;
1335
      rld[i].nocombine = 0;
1336
      rld[i].in_reg = inloc ? *inloc : 0;
1337
      rld[i].out_reg = outloc ? *outloc : 0;
1338
      rld[i].opnum = opnum;
1339
      rld[i].when_needed = type;
1340
      rld[i].secondary_in_reload = secondary_in_reload;
1341
      rld[i].secondary_out_reload = secondary_out_reload;
1342
      rld[i].secondary_in_icode = secondary_in_icode;
1343
      rld[i].secondary_out_icode = secondary_out_icode;
1344
      rld[i].secondary_p = 0;
1345
 
1346
      n_reloads++;
1347
 
1348
#ifdef SECONDARY_MEMORY_NEEDED
1349
      if (out != 0
1350
          && (REG_P (out)
1351
              || (GET_CODE (out) == SUBREG && REG_P (SUBREG_REG (out))))
1352
          && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1353
          && SECONDARY_MEMORY_NEEDED (class,
1354
                                      REGNO_REG_CLASS (reg_or_subregno (out)),
1355
                                      outmode))
1356
        get_secondary_mem (out, outmode, opnum, type);
1357
#endif
1358
    }
1359
  else
1360
    {
1361
      /* We are reusing an existing reload,
1362
         but we may have additional information for it.
1363
         For example, we may now have both IN and OUT
1364
         while the old one may have just one of them.  */
1365
 
1366
      /* The modes can be different.  If they are, we want to reload in
1367
         the larger mode, so that the value is valid for both modes.  */
1368
      if (inmode != VOIDmode
1369
          && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1370
        rld[i].inmode = inmode;
1371
      if (outmode != VOIDmode
1372
          && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1373
        rld[i].outmode = outmode;
1374
      if (in != 0)
1375
        {
1376
          rtx in_reg = inloc ? *inloc : 0;
1377
          /* If we merge reloads for two distinct rtl expressions that
1378
             are identical in content, there might be duplicate address
1379
             reloads.  Remove the extra set now, so that if we later find
1380
             that we can inherit this reload, we can get rid of the
1381
             address reloads altogether.
1382
 
1383
             Do not do this if both reloads are optional since the result
1384
             would be an optional reload which could potentially leave
1385
             unresolved address replacements.
1386
 
1387
             It is not sufficient to call transfer_replacements since
1388
             choose_reload_regs will remove the replacements for address
1389
             reloads of inherited reloads which results in the same
1390
             problem.  */
1391
          if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1392
              && ! (rld[i].optional && optional))
1393
            {
1394
              /* We must keep the address reload with the lower operand
1395
                 number alive.  */
1396
              if (opnum > rld[i].opnum)
1397
                {
1398
                  remove_address_replacements (in);
1399
                  in = rld[i].in;
1400
                  in_reg = rld[i].in_reg;
1401
                }
1402
              else
1403
                remove_address_replacements (rld[i].in);
1404
            }
1405
          rld[i].in = in;
1406
          rld[i].in_reg = in_reg;
1407
        }
1408
      if (out != 0)
1409
        {
1410
          rld[i].out = out;
1411
          rld[i].out_reg = outloc ? *outloc : 0;
1412
        }
1413
      if (reg_class_subset_p (class, rld[i].class))
1414
        rld[i].class = class;
1415
      rld[i].optional &= optional;
1416
      if (MERGE_TO_OTHER (type, rld[i].when_needed,
1417
                          opnum, rld[i].opnum))
1418
        rld[i].when_needed = RELOAD_OTHER;
1419
      rld[i].opnum = MIN (rld[i].opnum, opnum);
1420
    }
1421
 
1422
  /* If the ostensible rtx being reloaded differs from the rtx found
1423
     in the location to substitute, this reload is not safe to combine
1424
     because we cannot reliably tell whether it appears in the insn.  */
1425
 
1426
  if (in != 0 && in != *inloc)
1427
    rld[i].nocombine = 1;
1428
 
1429
#if 0
1430
  /* This was replaced by changes in find_reloads_address_1 and the new
1431
     function inc_for_reload, which go with a new meaning of reload_inc.  */
1432
 
1433
  /* If this is an IN/OUT reload in an insn that sets the CC,
1434
     it must be for an autoincrement.  It doesn't work to store
1435
     the incremented value after the insn because that would clobber the CC.
1436
     So we must do the increment of the value reloaded from,
1437
     increment it, store it back, then decrement again.  */
1438
  if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1439
    {
1440
      out = 0;
1441
      rld[i].out = 0;
1442
      rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1443
      /* If we did not find a nonzero amount-to-increment-by,
1444
         that contradicts the belief that IN is being incremented
1445
         in an address in this insn.  */
1446
      gcc_assert (rld[i].inc != 0);
1447
    }
1448
#endif
1449
 
1450
  /* If we will replace IN and OUT with the reload-reg,
1451
     record where they are located so that substitution need
1452
     not do a tree walk.  */
1453
 
1454
  if (replace_reloads)
1455
    {
1456
      if (inloc != 0)
1457
        {
1458
          struct replacement *r = &replacements[n_replacements++];
1459
          r->what = i;
1460
          r->subreg_loc = in_subreg_loc;
1461
          r->where = inloc;
1462
          r->mode = inmode;
1463
        }
1464
      if (outloc != 0 && outloc != inloc)
1465
        {
1466
          struct replacement *r = &replacements[n_replacements++];
1467
          r->what = i;
1468
          r->where = outloc;
1469
          r->subreg_loc = out_subreg_loc;
1470
          r->mode = outmode;
1471
        }
1472
    }
1473
 
1474
  /* If this reload is just being introduced and it has both
1475
     an incoming quantity and an outgoing quantity that are
1476
     supposed to be made to match, see if either one of the two
1477
     can serve as the place to reload into.
1478
 
1479
     If one of them is acceptable, set rld[i].reg_rtx
1480
     to that one.  */
1481
 
1482
  if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1483
    {
1484
      rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1485
                                          inmode, outmode,
1486
                                          rld[i].class, i,
1487
                                          earlyclobber_operand_p (out));
1488
 
1489
      /* If the outgoing register already contains the same value
1490
         as the incoming one, we can dispense with loading it.
1491
         The easiest way to tell the caller that is to give a phony
1492
         value for the incoming operand (same as outgoing one).  */
1493
      if (rld[i].reg_rtx == out
1494
          && (REG_P (in) || CONSTANT_P (in))
1495
          && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1496
                                  static_reload_reg_p, i, inmode))
1497
        rld[i].in = out;
1498
    }
1499
 
1500
  /* If this is an input reload and the operand contains a register that
1501
     dies in this insn and is used nowhere else, see if it is the right class
1502
     to be used for this reload.  Use it if so.  (This occurs most commonly
1503
     in the case of paradoxical SUBREGs and in-out reloads).  We cannot do
1504
     this if it is also an output reload that mentions the register unless
1505
     the output is a SUBREG that clobbers an entire register.
1506
 
1507
     Note that the operand might be one of the spill regs, if it is a
1508
     pseudo reg and we are in a block where spilling has not taken place.
1509
     But if there is no spilling in this block, that is OK.
1510
     An explicitly used hard reg cannot be a spill reg.  */
1511
 
1512
  if (rld[i].reg_rtx == 0 && in != 0 && hard_regs_live_known)
1513
    {
1514
      rtx note;
1515
      int regno;
1516
      enum machine_mode rel_mode = inmode;
1517
 
1518
      if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1519
        rel_mode = outmode;
1520
 
1521
      for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1522
        if (REG_NOTE_KIND (note) == REG_DEAD
1523
            && REG_P (XEXP (note, 0))
1524
            && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1525
            && reg_mentioned_p (XEXP (note, 0), in)
1526
            /* Check that we don't use a hardreg for an uninitialized
1527
               pseudo.  See also find_dummy_reload().  */
1528
            && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1529
                || ! bitmap_bit_p (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end,
1530
                                   ORIGINAL_REGNO (XEXP (note, 0))))
1531
            && ! refers_to_regno_for_reload_p (regno,
1532
                                               (regno
1533
                                                + hard_regno_nregs[regno]
1534
                                                                  [rel_mode]),
1535
                                               PATTERN (this_insn), inloc)
1536
            /* If this is also an output reload, IN cannot be used as
1537
               the reload register if it is set in this insn unless IN
1538
               is also OUT.  */
1539
            && (out == 0 || in == out
1540
                || ! hard_reg_set_here_p (regno,
1541
                                          (regno
1542
                                           + hard_regno_nregs[regno]
1543
                                                             [rel_mode]),
1544
                                          PATTERN (this_insn)))
1545
            /* ??? Why is this code so different from the previous?
1546
               Is there any simple coherent way to describe the two together?
1547
               What's going on here.  */
1548
            && (in != out
1549
                || (GET_CODE (in) == SUBREG
1550
                    && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1551
                         / UNITS_PER_WORD)
1552
                        == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1553
                             + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1554
            /* Make sure the operand fits in the reg that dies.  */
1555
            && (GET_MODE_SIZE (rel_mode)
1556
                <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1557
            && HARD_REGNO_MODE_OK (regno, inmode)
1558
            && HARD_REGNO_MODE_OK (regno, outmode))
1559
          {
1560
            unsigned int offs;
1561
            unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1562
                                      hard_regno_nregs[regno][outmode]);
1563
 
1564
            for (offs = 0; offs < nregs; offs++)
1565
              if (fixed_regs[regno + offs]
1566
                  || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1567
                                          regno + offs))
1568
                break;
1569
 
1570
            if (offs == nregs
1571
                && (! (refers_to_regno_for_reload_p
1572
                       (regno, (regno + hard_regno_nregs[regno][inmode]),
1573
                                in, (rtx *)0))
1574
                    || can_reload_into (in, regno, inmode)))
1575
              {
1576
                rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1577
                break;
1578
              }
1579
          }
1580
    }
1581
 
1582
  if (out)
1583
    output_reloadnum = i;
1584
 
1585
  return i;
1586
}
1587
 
1588
/* Record an additional place we must replace a value
1589
   for which we have already recorded a reload.
1590
   RELOADNUM is the value returned by push_reload
1591
   when the reload was recorded.
1592
   This is used in insn patterns that use match_dup.  */
1593
 
1594
static void
1595
push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1596
{
1597
  if (replace_reloads)
1598
    {
1599
      struct replacement *r = &replacements[n_replacements++];
1600
      r->what = reloadnum;
1601
      r->where = loc;
1602
      r->subreg_loc = 0;
1603
      r->mode = mode;
1604
    }
1605
}
1606
 
1607
/* Duplicate any replacement we have recorded to apply at
1608
   location ORIG_LOC to also be performed at DUP_LOC.
1609
   This is used in insn patterns that use match_dup.  */
1610
 
1611
static void
1612
dup_replacements (rtx *dup_loc, rtx *orig_loc)
1613
{
1614
  int i, n = n_replacements;
1615
 
1616
  for (i = 0; i < n; i++)
1617
    {
1618
      struct replacement *r = &replacements[i];
1619
      if (r->where == orig_loc)
1620
        push_replacement (dup_loc, r->what, r->mode);
1621
    }
1622
}
1623
 
1624
/* Transfer all replacements that used to be in reload FROM to be in
1625
   reload TO.  */
1626
 
1627
void
1628
transfer_replacements (int to, int from)
1629
{
1630
  int i;
1631
 
1632
  for (i = 0; i < n_replacements; i++)
1633
    if (replacements[i].what == from)
1634
      replacements[i].what = to;
1635
}
1636
 
1637
/* IN_RTX is the value loaded by a reload that we now decided to inherit,
1638
   or a subpart of it.  If we have any replacements registered for IN_RTX,
1639
   cancel the reloads that were supposed to load them.
1640
   Return nonzero if we canceled any reloads.  */
1641
int
1642
remove_address_replacements (rtx in_rtx)
1643
{
1644
  int i, j;
1645
  char reload_flags[MAX_RELOADS];
1646
  int something_changed = 0;
1647
 
1648
  memset (reload_flags, 0, sizeof reload_flags);
1649
  for (i = 0, j = 0; i < n_replacements; i++)
1650
    {
1651
      if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1652
        reload_flags[replacements[i].what] |= 1;
1653
      else
1654
        {
1655
          replacements[j++] = replacements[i];
1656
          reload_flags[replacements[i].what] |= 2;
1657
        }
1658
    }
1659
  /* Note that the following store must be done before the recursive calls.  */
1660
  n_replacements = j;
1661
 
1662
  for (i = n_reloads - 1; i >= 0; i--)
1663
    {
1664
      if (reload_flags[i] == 1)
1665
        {
1666
          deallocate_reload_reg (i);
1667
          remove_address_replacements (rld[i].in);
1668
          rld[i].in = 0;
1669
          something_changed = 1;
1670
        }
1671
    }
1672
  return something_changed;
1673
}
1674
 
1675
/* If there is only one output reload, and it is not for an earlyclobber
1676
   operand, try to combine it with a (logically unrelated) input reload
1677
   to reduce the number of reload registers needed.
1678
 
1679
   This is safe if the input reload does not appear in
1680
   the value being output-reloaded, because this implies
1681
   it is not needed any more once the original insn completes.
1682
 
1683
   If that doesn't work, see we can use any of the registers that
1684
   die in this insn as a reload register.  We can if it is of the right
1685
   class and does not appear in the value being output-reloaded.  */
1686
 
1687
static void
1688
combine_reloads (void)
1689
{
1690
  int i;
1691
  int output_reload = -1;
1692
  int secondary_out = -1;
1693
  rtx note;
1694
 
1695
  /* Find the output reload; return unless there is exactly one
1696
     and that one is mandatory.  */
1697
 
1698
  for (i = 0; i < n_reloads; i++)
1699
    if (rld[i].out != 0)
1700
      {
1701
        if (output_reload >= 0)
1702
          return;
1703
        output_reload = i;
1704
      }
1705
 
1706
  if (output_reload < 0 || rld[output_reload].optional)
1707
    return;
1708
 
1709
  /* An input-output reload isn't combinable.  */
1710
 
1711
  if (rld[output_reload].in != 0)
1712
    return;
1713
 
1714
  /* If this reload is for an earlyclobber operand, we can't do anything.  */
1715
  if (earlyclobber_operand_p (rld[output_reload].out))
1716
    return;
1717
 
1718
  /* If there is a reload for part of the address of this operand, we would
1719
     need to chnage it to RELOAD_FOR_OTHER_ADDRESS.  But that would extend
1720
     its life to the point where doing this combine would not lower the
1721
     number of spill registers needed.  */
1722
  for (i = 0; i < n_reloads; i++)
1723
    if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1724
         || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1725
        && rld[i].opnum == rld[output_reload].opnum)
1726
      return;
1727
 
1728
  /* Check each input reload; can we combine it?  */
1729
 
1730
  for (i = 0; i < n_reloads; i++)
1731
    if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1732
        /* Life span of this reload must not extend past main insn.  */
1733
        && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1734
        && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1735
        && rld[i].when_needed != RELOAD_OTHER
1736
        && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1737
            == CLASS_MAX_NREGS (rld[output_reload].class,
1738
                                rld[output_reload].outmode))
1739
        && rld[i].inc == 0
1740
        && rld[i].reg_rtx == 0
1741
#ifdef SECONDARY_MEMORY_NEEDED
1742
        /* Don't combine two reloads with different secondary
1743
           memory locations.  */
1744
        && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1745
            || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1746
            || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1747
                            secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1748
#endif
1749
        && (SMALL_REGISTER_CLASSES
1750
            ? (rld[i].class == rld[output_reload].class)
1751
            : (reg_class_subset_p (rld[i].class,
1752
                                   rld[output_reload].class)
1753
               || reg_class_subset_p (rld[output_reload].class,
1754
                                      rld[i].class)))
1755
        && (MATCHES (rld[i].in, rld[output_reload].out)
1756
            /* Args reversed because the first arg seems to be
1757
               the one that we imagine being modified
1758
               while the second is the one that might be affected.  */
1759
            || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1760
                                                      rld[i].in)
1761
                /* However, if the input is a register that appears inside
1762
                   the output, then we also can't share.
1763
                   Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1764
                   If the same reload reg is used for both reg 69 and the
1765
                   result to be stored in memory, then that result
1766
                   will clobber the address of the memory ref.  */
1767
                && ! (REG_P (rld[i].in)
1768
                      && reg_overlap_mentioned_for_reload_p (rld[i].in,
1769
                                                             rld[output_reload].out))))
1770
        && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1771
                                         rld[i].when_needed != RELOAD_FOR_INPUT)
1772
        && (reg_class_size[(int) rld[i].class]
1773
            || SMALL_REGISTER_CLASSES)
1774
        /* We will allow making things slightly worse by combining an
1775
           input and an output, but no worse than that.  */
1776
        && (rld[i].when_needed == RELOAD_FOR_INPUT
1777
            || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1778
      {
1779
        int j;
1780
 
1781
        /* We have found a reload to combine with!  */
1782
        rld[i].out = rld[output_reload].out;
1783
        rld[i].out_reg = rld[output_reload].out_reg;
1784
        rld[i].outmode = rld[output_reload].outmode;
1785
        /* Mark the old output reload as inoperative.  */
1786
        rld[output_reload].out = 0;
1787
        /* The combined reload is needed for the entire insn.  */
1788
        rld[i].when_needed = RELOAD_OTHER;
1789
        /* If the output reload had a secondary reload, copy it.  */
1790
        if (rld[output_reload].secondary_out_reload != -1)
1791
          {
1792
            rld[i].secondary_out_reload
1793
              = rld[output_reload].secondary_out_reload;
1794
            rld[i].secondary_out_icode
1795
              = rld[output_reload].secondary_out_icode;
1796
          }
1797
 
1798
#ifdef SECONDARY_MEMORY_NEEDED
1799
        /* Copy any secondary MEM.  */
1800
        if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1801
          secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1802
            = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1803
#endif
1804
        /* If required, minimize the register class.  */
1805
        if (reg_class_subset_p (rld[output_reload].class,
1806
                                rld[i].class))
1807
          rld[i].class = rld[output_reload].class;
1808
 
1809
        /* Transfer all replacements from the old reload to the combined.  */
1810
        for (j = 0; j < n_replacements; j++)
1811
          if (replacements[j].what == output_reload)
1812
            replacements[j].what = i;
1813
 
1814
        return;
1815
      }
1816
 
1817
  /* If this insn has only one operand that is modified or written (assumed
1818
     to be the first),  it must be the one corresponding to this reload.  It
1819
     is safe to use anything that dies in this insn for that output provided
1820
     that it does not occur in the output (we already know it isn't an
1821
     earlyclobber.  If this is an asm insn, give up.  */
1822
 
1823
  if (INSN_CODE (this_insn) == -1)
1824
    return;
1825
 
1826
  for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1827
    if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1828
        || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1829
      return;
1830
 
1831
  /* See if some hard register that dies in this insn and is not used in
1832
     the output is the right class.  Only works if the register we pick
1833
     up can fully hold our output reload.  */
1834
  for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1835
    if (REG_NOTE_KIND (note) == REG_DEAD
1836
        && REG_P (XEXP (note, 0))
1837
        && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1838
                                                 rld[output_reload].out)
1839
        && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1840
        && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1841
        && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1842
                              REGNO (XEXP (note, 0)))
1843
        && (hard_regno_nregs[REGNO (XEXP (note, 0))][rld[output_reload].outmode]
1844
            <= hard_regno_nregs[REGNO (XEXP (note, 0))][GET_MODE (XEXP (note, 0))])
1845
        /* Ensure that a secondary or tertiary reload for this output
1846
           won't want this register.  */
1847
        && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1848
            || (! (TEST_HARD_REG_BIT
1849
                   (reg_class_contents[(int) rld[secondary_out].class],
1850
                    REGNO (XEXP (note, 0))))
1851
                && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1852
                    ||  ! (TEST_HARD_REG_BIT
1853
                           (reg_class_contents[(int) rld[secondary_out].class],
1854
                            REGNO (XEXP (note, 0)))))))
1855
        && ! fixed_regs[REGNO (XEXP (note, 0))]
1856
        /* Check that we don't use a hardreg for an uninitialized
1857
           pseudo.  See also find_dummy_reload().  */
1858
        && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1859
            || ! bitmap_bit_p (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end,
1860
                               ORIGINAL_REGNO (XEXP (note, 0)))))
1861
      {
1862
        rld[output_reload].reg_rtx
1863
          = gen_rtx_REG (rld[output_reload].outmode,
1864
                         REGNO (XEXP (note, 0)));
1865
        return;
1866
      }
1867
}
1868
 
1869
/* Try to find a reload register for an in-out reload (expressions IN and OUT).
1870
   See if one of IN and OUT is a register that may be used;
1871
   this is desirable since a spill-register won't be needed.
1872
   If so, return the register rtx that proves acceptable.
1873
 
1874
   INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1875
   CLASS is the register class required for the reload.
1876
 
1877
   If FOR_REAL is >= 0, it is the number of the reload,
1878
   and in some cases when it can be discovered that OUT doesn't need
1879
   to be computed, clear out rld[FOR_REAL].out.
1880
 
1881
   If FOR_REAL is -1, this should not be done, because this call
1882
   is just to see if a register can be found, not to find and install it.
1883
 
1884
   EARLYCLOBBER is nonzero if OUT is an earlyclobber operand.  This
1885
   puts an additional constraint on being able to use IN for OUT since
1886
   IN must not appear elsewhere in the insn (it is assumed that IN itself
1887
   is safe from the earlyclobber).  */
1888
 
1889
static rtx
1890
find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1891
                   enum machine_mode inmode, enum machine_mode outmode,
1892
                   enum reg_class class, int for_real, int earlyclobber)
1893
{
1894
  rtx in = real_in;
1895
  rtx out = real_out;
1896
  int in_offset = 0;
1897
  int out_offset = 0;
1898
  rtx value = 0;
1899
 
1900
  /* If operands exceed a word, we can't use either of them
1901
     unless they have the same size.  */
1902
  if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1903
      && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1904
          || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1905
    return 0;
1906
 
1907
  /* Note that {in,out}_offset are needed only when 'in' or 'out'
1908
     respectively refers to a hard register.  */
1909
 
1910
  /* Find the inside of any subregs.  */
1911
  while (GET_CODE (out) == SUBREG)
1912
    {
1913
      if (REG_P (SUBREG_REG (out))
1914
          && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1915
        out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1916
                                           GET_MODE (SUBREG_REG (out)),
1917
                                           SUBREG_BYTE (out),
1918
                                           GET_MODE (out));
1919
      out = SUBREG_REG (out);
1920
    }
1921
  while (GET_CODE (in) == SUBREG)
1922
    {
1923
      if (REG_P (SUBREG_REG (in))
1924
          && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1925
        in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1926
                                          GET_MODE (SUBREG_REG (in)),
1927
                                          SUBREG_BYTE (in),
1928
                                          GET_MODE (in));
1929
      in = SUBREG_REG (in);
1930
    }
1931
 
1932
  /* Narrow down the reg class, the same way push_reload will;
1933
     otherwise we might find a dummy now, but push_reload won't.  */
1934
  {
1935
    enum reg_class preferred_class = PREFERRED_RELOAD_CLASS (in, class);
1936
    if (preferred_class != NO_REGS)
1937
      class = preferred_class;
1938
  }
1939
 
1940
  /* See if OUT will do.  */
1941
  if (REG_P (out)
1942
      && REGNO (out) < FIRST_PSEUDO_REGISTER)
1943
    {
1944
      unsigned int regno = REGNO (out) + out_offset;
1945
      unsigned int nwords = hard_regno_nregs[regno][outmode];
1946
      rtx saved_rtx;
1947
 
1948
      /* When we consider whether the insn uses OUT,
1949
         ignore references within IN.  They don't prevent us
1950
         from copying IN into OUT, because those refs would
1951
         move into the insn that reloads IN.
1952
 
1953
         However, we only ignore IN in its role as this reload.
1954
         If the insn uses IN elsewhere and it contains OUT,
1955
         that counts.  We can't be sure it's the "same" operand
1956
         so it might not go through this reload.  */
1957
      saved_rtx = *inloc;
1958
      *inloc = const0_rtx;
1959
 
1960
      if (regno < FIRST_PSEUDO_REGISTER
1961
          && HARD_REGNO_MODE_OK (regno, outmode)
1962
          && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1963
                                             PATTERN (this_insn), outloc))
1964
        {
1965
          unsigned int i;
1966
 
1967
          for (i = 0; i < nwords; i++)
1968
            if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1969
                                     regno + i))
1970
              break;
1971
 
1972
          if (i == nwords)
1973
            {
1974
              if (REG_P (real_out))
1975
                value = real_out;
1976
              else
1977
                value = gen_rtx_REG (outmode, regno);
1978
            }
1979
        }
1980
 
1981
      *inloc = saved_rtx;
1982
    }
1983
 
1984
  /* Consider using IN if OUT was not acceptable
1985
     or if OUT dies in this insn (like the quotient in a divmod insn).
1986
     We can't use IN unless it is dies in this insn,
1987
     which means we must know accurately which hard regs are live.
1988
     Also, the result can't go in IN if IN is used within OUT,
1989
     or if OUT is an earlyclobber and IN appears elsewhere in the insn.  */
1990
  if (hard_regs_live_known
1991
      && REG_P (in)
1992
      && REGNO (in) < FIRST_PSEUDO_REGISTER
1993
      && (value == 0
1994
          || find_reg_note (this_insn, REG_UNUSED, real_out))
1995
      && find_reg_note (this_insn, REG_DEAD, real_in)
1996
      && !fixed_regs[REGNO (in)]
1997
      && HARD_REGNO_MODE_OK (REGNO (in),
1998
                             /* The only case where out and real_out might
1999
                                have different modes is where real_out
2000
                                is a subreg, and in that case, out
2001
                                has a real mode.  */
2002
                             (GET_MODE (out) != VOIDmode
2003
                              ? GET_MODE (out) : outmode))
2004
        /* But only do all this if we can be sure, that this input
2005
           operand doesn't correspond with an uninitialized pseudoreg.
2006
           global can assign some hardreg to it, which is the same as
2007
           a different pseudo also currently live (as it can ignore the
2008
           conflict).  So we never must introduce writes to such hardregs,
2009
           as they would clobber the other live pseudo using the same.
2010
           See also PR20973.  */
2011
      && (ORIGINAL_REGNO (in) < FIRST_PSEUDO_REGISTER
2012
          || ! bitmap_bit_p (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end,
2013
                             ORIGINAL_REGNO (in))))
2014
    {
2015
      unsigned int regno = REGNO (in) + in_offset;
2016
      unsigned int nwords = hard_regno_nregs[regno][inmode];
2017
 
2018
      if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
2019
          && ! hard_reg_set_here_p (regno, regno + nwords,
2020
                                    PATTERN (this_insn))
2021
          && (! earlyclobber
2022
              || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2023
                                                 PATTERN (this_insn), inloc)))
2024
        {
2025
          unsigned int i;
2026
 
2027
          for (i = 0; i < nwords; i++)
2028
            if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
2029
                                     regno + i))
2030
              break;
2031
 
2032
          if (i == nwords)
2033
            {
2034
              /* If we were going to use OUT as the reload reg
2035
                 and changed our mind, it means OUT is a dummy that
2036
                 dies here.  So don't bother copying value to it.  */
2037
              if (for_real >= 0 && value == real_out)
2038
                rld[for_real].out = 0;
2039
              if (REG_P (real_in))
2040
                value = real_in;
2041
              else
2042
                value = gen_rtx_REG (inmode, regno);
2043
            }
2044
        }
2045
    }
2046
 
2047
  return value;
2048
}
2049
 
2050
/* This page contains subroutines used mainly for determining
2051
   whether the IN or an OUT of a reload can serve as the
2052
   reload register.  */
2053
 
2054
/* Return 1 if X is an operand of an insn that is being earlyclobbered.  */
2055
 
2056
int
2057
earlyclobber_operand_p (rtx x)
2058
{
2059
  int i;
2060
 
2061
  for (i = 0; i < n_earlyclobbers; i++)
2062
    if (reload_earlyclobbers[i] == x)
2063
      return 1;
2064
 
2065
  return 0;
2066
}
2067
 
2068
/* Return 1 if expression X alters a hard reg in the range
2069
   from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2070
   either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2071
   X should be the body of an instruction.  */
2072
 
2073
static int
2074
hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2075
{
2076
  if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2077
    {
2078
      rtx op0 = SET_DEST (x);
2079
 
2080
      while (GET_CODE (op0) == SUBREG)
2081
        op0 = SUBREG_REG (op0);
2082
      if (REG_P (op0))
2083
        {
2084
          unsigned int r = REGNO (op0);
2085
 
2086
          /* See if this reg overlaps range under consideration.  */
2087
          if (r < end_regno
2088
              && r + hard_regno_nregs[r][GET_MODE (op0)] > beg_regno)
2089
            return 1;
2090
        }
2091
    }
2092
  else if (GET_CODE (x) == PARALLEL)
2093
    {
2094
      int i = XVECLEN (x, 0) - 1;
2095
 
2096
      for (; i >= 0; i--)
2097
        if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2098
          return 1;
2099
    }
2100
 
2101
  return 0;
2102
}
2103
 
2104
/* Return 1 if ADDR is a valid memory address for mode MODE,
2105
   and check that each pseudo reg has the proper kind of
2106
   hard reg.  */
2107
 
2108
int
2109
strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
2110
{
2111
  GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2112
  return 0;
2113
 
2114
 win:
2115
  return 1;
2116
}
2117
 
2118
/* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2119
   if they are the same hard reg, and has special hacks for
2120
   autoincrement and autodecrement.
2121
   This is specifically intended for find_reloads to use
2122
   in determining whether two operands match.
2123
   X is the operand whose number is the lower of the two.
2124
 
2125
   The value is 2 if Y contains a pre-increment that matches
2126
   a non-incrementing address in X.  */
2127
 
2128
/* ??? To be completely correct, we should arrange to pass
2129
   for X the output operand and for Y the input operand.
2130
   For now, we assume that the output operand has the lower number
2131
   because that is natural in (SET output (... input ...)).  */
2132
 
2133
int
2134
operands_match_p (rtx x, rtx y)
2135
{
2136
  int i;
2137
  RTX_CODE code = GET_CODE (x);
2138
  const char *fmt;
2139
  int success_2;
2140
 
2141
  if (x == y)
2142
    return 1;
2143
  if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2144
      && (REG_P (y) || (GET_CODE (y) == SUBREG
2145
                                  && REG_P (SUBREG_REG (y)))))
2146
    {
2147
      int j;
2148
 
2149
      if (code == SUBREG)
2150
        {
2151
          i = REGNO (SUBREG_REG (x));
2152
          if (i >= FIRST_PSEUDO_REGISTER)
2153
            goto slow;
2154
          i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2155
                                    GET_MODE (SUBREG_REG (x)),
2156
                                    SUBREG_BYTE (x),
2157
                                    GET_MODE (x));
2158
        }
2159
      else
2160
        i = REGNO (x);
2161
 
2162
      if (GET_CODE (y) == SUBREG)
2163
        {
2164
          j = REGNO (SUBREG_REG (y));
2165
          if (j >= FIRST_PSEUDO_REGISTER)
2166
            goto slow;
2167
          j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2168
                                    GET_MODE (SUBREG_REG (y)),
2169
                                    SUBREG_BYTE (y),
2170
                                    GET_MODE (y));
2171
        }
2172
      else
2173
        j = REGNO (y);
2174
 
2175
      /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2176
         multiple hard register group of scalar integer registers, so that
2177
         for example (reg:DI 0) and (reg:SI 1) will be considered the same
2178
         register.  */
2179
      if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2180
          && SCALAR_INT_MODE_P (GET_MODE (x))
2181
          && i < FIRST_PSEUDO_REGISTER)
2182
        i += hard_regno_nregs[i][GET_MODE (x)] - 1;
2183
      if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2184
          && SCALAR_INT_MODE_P (GET_MODE (y))
2185
          && j < FIRST_PSEUDO_REGISTER)
2186
        j += hard_regno_nregs[j][GET_MODE (y)] - 1;
2187
 
2188
      return i == j;
2189
    }
2190
  /* If two operands must match, because they are really a single
2191
     operand of an assembler insn, then two postincrements are invalid
2192
     because the assembler insn would increment only once.
2193
     On the other hand, a postincrement matches ordinary indexing
2194
     if the postincrement is the output operand.  */
2195
  if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2196
    return operands_match_p (XEXP (x, 0), y);
2197
  /* Two preincrements are invalid
2198
     because the assembler insn would increment only once.
2199
     On the other hand, a preincrement matches ordinary indexing
2200
     if the preincrement is the input operand.
2201
     In this case, return 2, since some callers need to do special
2202
     things when this happens.  */
2203
  if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2204
      || GET_CODE (y) == PRE_MODIFY)
2205
    return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2206
 
2207
 slow:
2208
 
2209
  /* Now we have disposed of all the cases in which different rtx codes
2210
     can match.  */
2211
  if (code != GET_CODE (y))
2212
    return 0;
2213
 
2214
  /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.  */
2215
  if (GET_MODE (x) != GET_MODE (y))
2216
    return 0;
2217
 
2218
  switch (code)
2219
    {
2220
    case CONST_INT:
2221
    case CONST_DOUBLE:
2222
      return 0;
2223
 
2224
    case LABEL_REF:
2225
      return XEXP (x, 0) == XEXP (y, 0);
2226
    case SYMBOL_REF:
2227
      return XSTR (x, 0) == XSTR (y, 0);
2228
 
2229
    default:
2230
      break;
2231
    }
2232
 
2233
  /* Compare the elements.  If any pair of corresponding elements
2234
     fail to match, return 0 for the whole things.  */
2235
 
2236
  success_2 = 0;
2237
  fmt = GET_RTX_FORMAT (code);
2238
  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2239
    {
2240
      int val, j;
2241
      switch (fmt[i])
2242
        {
2243
        case 'w':
2244
          if (XWINT (x, i) != XWINT (y, i))
2245
            return 0;
2246
          break;
2247
 
2248
        case 'i':
2249
          if (XINT (x, i) != XINT (y, i))
2250
            return 0;
2251
          break;
2252
 
2253
        case 'e':
2254
          val = operands_match_p (XEXP (x, i), XEXP (y, i));
2255
          if (val == 0)
2256
            return 0;
2257
          /* If any subexpression returns 2,
2258
             we should return 2 if we are successful.  */
2259
          if (val == 2)
2260
            success_2 = 1;
2261
          break;
2262
 
2263
        case '0':
2264
          break;
2265
 
2266
        case 'E':
2267
          if (XVECLEN (x, i) != XVECLEN (y, i))
2268
            return 0;
2269
          for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2270
            {
2271
              val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2272
              if (val == 0)
2273
                return 0;
2274
              if (val == 2)
2275
                success_2 = 1;
2276
            }
2277
          break;
2278
 
2279
          /* It is believed that rtx's at this level will never
2280
             contain anything but integers and other rtx's,
2281
             except for within LABEL_REFs and SYMBOL_REFs.  */
2282
        default:
2283
          gcc_unreachable ();
2284
        }
2285
    }
2286
  return 1 + success_2;
2287
}
2288
 
2289
/* Describe the range of registers or memory referenced by X.
2290
   If X is a register, set REG_FLAG and put the first register
2291
   number into START and the last plus one into END.
2292
   If X is a memory reference, put a base address into BASE
2293
   and a range of integer offsets into START and END.
2294
   If X is pushing on the stack, we can assume it causes no trouble,
2295
   so we set the SAFE field.  */
2296
 
2297
static struct decomposition
2298
decompose (rtx x)
2299
{
2300
  struct decomposition val;
2301
  int all_const = 0;
2302
 
2303
  memset (&val, 0, sizeof (val));
2304
 
2305
  switch (GET_CODE (x))
2306
    {
2307
    case MEM:
2308
      {
2309
        rtx base = NULL_RTX, offset = 0;
2310
        rtx addr = XEXP (x, 0);
2311
 
2312
        if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2313
            || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2314
          {
2315
            val.base = XEXP (addr, 0);
2316
            val.start = -GET_MODE_SIZE (GET_MODE (x));
2317
            val.end = GET_MODE_SIZE (GET_MODE (x));
2318
            val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2319
            return val;
2320
          }
2321
 
2322
        if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2323
          {
2324
            if (GET_CODE (XEXP (addr, 1)) == PLUS
2325
                && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2326
                && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2327
              {
2328
                val.base  = XEXP (addr, 0);
2329
                val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2330
                val.end   = INTVAL (XEXP (XEXP (addr, 1), 1));
2331
                val.safe  = REGNO (val.base) == STACK_POINTER_REGNUM;
2332
                return val;
2333
              }
2334
          }
2335
 
2336
        if (GET_CODE (addr) == CONST)
2337
          {
2338
            addr = XEXP (addr, 0);
2339
            all_const = 1;
2340
          }
2341
        if (GET_CODE (addr) == PLUS)
2342
          {
2343
            if (CONSTANT_P (XEXP (addr, 0)))
2344
              {
2345
                base = XEXP (addr, 1);
2346
                offset = XEXP (addr, 0);
2347
              }
2348
            else if (CONSTANT_P (XEXP (addr, 1)))
2349
              {
2350
                base = XEXP (addr, 0);
2351
                offset = XEXP (addr, 1);
2352
              }
2353
          }
2354
 
2355
        if (offset == 0)
2356
          {
2357
            base = addr;
2358
            offset = const0_rtx;
2359
          }
2360
        if (GET_CODE (offset) == CONST)
2361
          offset = XEXP (offset, 0);
2362
        if (GET_CODE (offset) == PLUS)
2363
          {
2364
            if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2365
              {
2366
                base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2367
                offset = XEXP (offset, 0);
2368
              }
2369
            else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2370
              {
2371
                base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2372
                offset = XEXP (offset, 1);
2373
              }
2374
            else
2375
              {
2376
                base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2377
                offset = const0_rtx;
2378
              }
2379
          }
2380
        else if (GET_CODE (offset) != CONST_INT)
2381
          {
2382
            base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2383
            offset = const0_rtx;
2384
          }
2385
 
2386
        if (all_const && GET_CODE (base) == PLUS)
2387
          base = gen_rtx_CONST (GET_MODE (base), base);
2388
 
2389
        gcc_assert (GET_CODE (offset) == CONST_INT);
2390
 
2391
        val.start = INTVAL (offset);
2392
        val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2393
        val.base = base;
2394
      }
2395
      break;
2396
 
2397
    case REG:
2398
      val.reg_flag = 1;
2399
      val.start = true_regnum (x);
2400
      if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2401
        {
2402
          /* A pseudo with no hard reg.  */
2403
          val.start = REGNO (x);
2404
          val.end = val.start + 1;
2405
        }
2406
      else
2407
        /* A hard reg.  */
2408
        val.end = val.start + hard_regno_nregs[val.start][GET_MODE (x)];
2409
      break;
2410
 
2411
    case SUBREG:
2412
      if (!REG_P (SUBREG_REG (x)))
2413
        /* This could be more precise, but it's good enough.  */
2414
        return decompose (SUBREG_REG (x));
2415
      val.reg_flag = 1;
2416
      val.start = true_regnum (x);
2417
      if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2418
        return decompose (SUBREG_REG (x));
2419
      else
2420
        /* A hard reg.  */
2421
        val.end = val.start + hard_regno_nregs[val.start][GET_MODE (x)];
2422
      break;
2423
 
2424
    case SCRATCH:
2425
      /* This hasn't been assigned yet, so it can't conflict yet.  */
2426
      val.safe = 1;
2427
      break;
2428
 
2429
    default:
2430
      gcc_assert (CONSTANT_P (x));
2431
      val.safe = 1;
2432
      break;
2433
    }
2434
  return val;
2435
}
2436
 
2437
/* Return 1 if altering Y will not modify the value of X.
2438
   Y is also described by YDATA, which should be decompose (Y).  */
2439
 
2440
static int
2441
immune_p (rtx x, rtx y, struct decomposition ydata)
2442
{
2443
  struct decomposition xdata;
2444
 
2445
  if (ydata.reg_flag)
2446
    return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2447
  if (ydata.safe)
2448
    return 1;
2449
 
2450
  gcc_assert (MEM_P (y));
2451
  /* If Y is memory and X is not, Y can't affect X.  */
2452
  if (!MEM_P (x))
2453
    return 1;
2454
 
2455
  xdata = decompose (x);
2456
 
2457
  if (! rtx_equal_p (xdata.base, ydata.base))
2458
    {
2459
      /* If bases are distinct symbolic constants, there is no overlap.  */
2460
      if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2461
        return 1;
2462
      /* Constants and stack slots never overlap.  */
2463
      if (CONSTANT_P (xdata.base)
2464
          && (ydata.base == frame_pointer_rtx
2465
              || ydata.base == hard_frame_pointer_rtx
2466
              || ydata.base == stack_pointer_rtx))
2467
        return 1;
2468
      if (CONSTANT_P (ydata.base)
2469
          && (xdata.base == frame_pointer_rtx
2470
              || xdata.base == hard_frame_pointer_rtx
2471
              || xdata.base == stack_pointer_rtx))
2472
        return 1;
2473
      /* If either base is variable, we don't know anything.  */
2474
      return 0;
2475
    }
2476
 
2477
  return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2478
}
2479
 
2480
/* Similar, but calls decompose.  */
2481
 
2482
int
2483
safe_from_earlyclobber (rtx op, rtx clobber)
2484
{
2485
  struct decomposition early_data;
2486
 
2487
  early_data = decompose (clobber);
2488
  return immune_p (op, clobber, early_data);
2489
}
2490
 
2491
/* Main entry point of this file: search the body of INSN
2492
   for values that need reloading and record them with push_reload.
2493
   REPLACE nonzero means record also where the values occur
2494
   so that subst_reloads can be used.
2495
 
2496
   IND_LEVELS says how many levels of indirection are supported by this
2497
   machine; a value of zero means that a memory reference is not a valid
2498
   memory address.
2499
 
2500
   LIVE_KNOWN says we have valid information about which hard
2501
   regs are live at each point in the program; this is true when
2502
   we are called from global_alloc but false when stupid register
2503
   allocation has been done.
2504
 
2505
   RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2506
   which is nonnegative if the reg has been commandeered for reloading into.
2507
   It is copied into STATIC_RELOAD_REG_P and referenced from there
2508
   by various subroutines.
2509
 
2510
   Return TRUE if some operands need to be changed, because of swapping
2511
   commutative operands, reg_equiv_address substitution, or whatever.  */
2512
 
2513
int
2514
find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2515
              short *reload_reg_p)
2516
{
2517
  int insn_code_number;
2518
  int i, j;
2519
  int noperands;
2520
  /* These start out as the constraints for the insn
2521
     and they are chewed up as we consider alternatives.  */
2522
  char *constraints[MAX_RECOG_OPERANDS];
2523
  /* These are the preferred classes for an operand, or NO_REGS if it isn't
2524
     a register.  */
2525
  enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2526
  char pref_or_nothing[MAX_RECOG_OPERANDS];
2527
  /* Nonzero for a MEM operand whose entire address needs a reload.
2528
     May be -1 to indicate the entire address may or may not need a reload.  */
2529
  int address_reloaded[MAX_RECOG_OPERANDS];
2530
  /* Nonzero for an address operand that needs to be completely reloaded.
2531
     May be -1 to indicate the entire operand may or may not need a reload.  */
2532
  int address_operand_reloaded[MAX_RECOG_OPERANDS];
2533
  /* Value of enum reload_type to use for operand.  */
2534
  enum reload_type operand_type[MAX_RECOG_OPERANDS];
2535
  /* Value of enum reload_type to use within address of operand.  */
2536
  enum reload_type address_type[MAX_RECOG_OPERANDS];
2537
  /* Save the usage of each operand.  */
2538
  enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2539
  int no_input_reloads = 0, no_output_reloads = 0;
2540
  int n_alternatives;
2541
  int this_alternative[MAX_RECOG_OPERANDS];
2542
  char this_alternative_match_win[MAX_RECOG_OPERANDS];
2543
  char this_alternative_win[MAX_RECOG_OPERANDS];
2544
  char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2545
  char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2546
  int this_alternative_matches[MAX_RECOG_OPERANDS];
2547
  int swapped;
2548
  int goal_alternative[MAX_RECOG_OPERANDS];
2549
  int this_alternative_number;
2550
  int goal_alternative_number = 0;
2551
  int operand_reloadnum[MAX_RECOG_OPERANDS];
2552
  int goal_alternative_matches[MAX_RECOG_OPERANDS];
2553
  int goal_alternative_matched[MAX_RECOG_OPERANDS];
2554
  char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2555
  char goal_alternative_win[MAX_RECOG_OPERANDS];
2556
  char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2557
  char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2558
  int goal_alternative_swapped;
2559
  int best;
2560
  int commutative;
2561
  char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2562
  rtx substed_operand[MAX_RECOG_OPERANDS];
2563
  rtx body = PATTERN (insn);
2564
  rtx set = single_set (insn);
2565
  int goal_earlyclobber = 0, this_earlyclobber;
2566
  enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2567
  int retval = 0;
2568
 
2569
  this_insn = insn;
2570
  n_reloads = 0;
2571
  n_replacements = 0;
2572
  n_earlyclobbers = 0;
2573
  replace_reloads = replace;
2574
  hard_regs_live_known = live_known;
2575
  static_reload_reg_p = reload_reg_p;
2576
 
2577
  /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2578
     neither are insns that SET cc0.  Insns that use CC0 are not allowed
2579
     to have any input reloads.  */
2580
  if (JUMP_P (insn) || CALL_P (insn))
2581
    no_output_reloads = 1;
2582
 
2583
#ifdef HAVE_cc0
2584
  if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2585
    no_input_reloads = 1;
2586
  if (reg_set_p (cc0_rtx, PATTERN (insn)))
2587
    no_output_reloads = 1;
2588
#endif
2589
 
2590
#ifdef SECONDARY_MEMORY_NEEDED
2591
  /* The eliminated forms of any secondary memory locations are per-insn, so
2592
     clear them out here.  */
2593
 
2594
  if (secondary_memlocs_elim_used)
2595
    {
2596
      memset (secondary_memlocs_elim, 0,
2597
              sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2598
      secondary_memlocs_elim_used = 0;
2599
    }
2600
#endif
2601
 
2602
  /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2603
     is cheap to move between them.  If it is not, there may not be an insn
2604
     to do the copy, so we may need a reload.  */
2605
  if (GET_CODE (body) == SET
2606
      && REG_P (SET_DEST (body))
2607
      && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2608
      && REG_P (SET_SRC (body))
2609
      && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2610
      && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2611
                             REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2612
                             REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2613
    return 0;
2614
 
2615
  extract_insn (insn);
2616
 
2617
  noperands = reload_n_operands = recog_data.n_operands;
2618
  n_alternatives = recog_data.n_alternatives;
2619
 
2620
  /* Just return "no reloads" if insn has no operands with constraints.  */
2621
  if (noperands == 0 || n_alternatives == 0)
2622
    return 0;
2623
 
2624
  insn_code_number = INSN_CODE (insn);
2625
  this_insn_is_asm = insn_code_number < 0;
2626
 
2627
  memcpy (operand_mode, recog_data.operand_mode,
2628
          noperands * sizeof (enum machine_mode));
2629
  memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2630
 
2631
  commutative = -1;
2632
 
2633
  /* If we will need to know, later, whether some pair of operands
2634
     are the same, we must compare them now and save the result.
2635
     Reloading the base and index registers will clobber them
2636
     and afterward they will fail to match.  */
2637
 
2638
  for (i = 0; i < noperands; i++)
2639
    {
2640
      char *p;
2641
      int c;
2642
 
2643
      substed_operand[i] = recog_data.operand[i];
2644
      p = constraints[i];
2645
 
2646
      modified[i] = RELOAD_READ;
2647
 
2648
      /* Scan this operand's constraint to see if it is an output operand,
2649
         an in-out operand, is commutative, or should match another.  */
2650
 
2651
      while ((c = *p))
2652
        {
2653
          p += CONSTRAINT_LEN (c, p);
2654
          switch (c)
2655
            {
2656
            case '=':
2657
              modified[i] = RELOAD_WRITE;
2658
              break;
2659
            case '+':
2660
              modified[i] = RELOAD_READ_WRITE;
2661
              break;
2662
            case '%':
2663
              {
2664
                /* The last operand should not be marked commutative.  */
2665
                gcc_assert (i != noperands - 1);
2666
 
2667
                /* We currently only support one commutative pair of
2668
                   operands.  Some existing asm code currently uses more
2669
                   than one pair.  Previously, that would usually work,
2670
                   but sometimes it would crash the compiler.  We
2671
                   continue supporting that case as well as we can by
2672
                   silently ignoring all but the first pair.  In the
2673
                   future we may handle it correctly.  */
2674
                if (commutative < 0)
2675
                  commutative = i;
2676
                else
2677
                  gcc_assert (this_insn_is_asm);
2678
              }
2679
              break;
2680
            /* Use of ISDIGIT is tempting here, but it may get expensive because
2681
               of locale support we don't want.  */
2682
            case '0': case '1': case '2': case '3': case '4':
2683
            case '5': case '6': case '7': case '8': case '9':
2684
              {
2685
                c = strtoul (p - 1, &p, 10);
2686
 
2687
                operands_match[c][i]
2688
                  = operands_match_p (recog_data.operand[c],
2689
                                      recog_data.operand[i]);
2690
 
2691
                /* An operand may not match itself.  */
2692
                gcc_assert (c != i);
2693
 
2694
                /* If C can be commuted with C+1, and C might need to match I,
2695
                   then C+1 might also need to match I.  */
2696
                if (commutative >= 0)
2697
                  {
2698
                    if (c == commutative || c == commutative + 1)
2699
                      {
2700
                        int other = c + (c == commutative ? 1 : -1);
2701
                        operands_match[other][i]
2702
                          = operands_match_p (recog_data.operand[other],
2703
                                              recog_data.operand[i]);
2704
                      }
2705
                    if (i == commutative || i == commutative + 1)
2706
                      {
2707
                        int other = i + (i == commutative ? 1 : -1);
2708
                        operands_match[c][other]
2709
                          = operands_match_p (recog_data.operand[c],
2710
                                              recog_data.operand[other]);
2711
                      }
2712
                    /* Note that C is supposed to be less than I.
2713
                       No need to consider altering both C and I because in
2714
                       that case we would alter one into the other.  */
2715
                  }
2716
              }
2717
            }
2718
        }
2719
    }
2720
 
2721
  /* Examine each operand that is a memory reference or memory address
2722
     and reload parts of the addresses into index registers.
2723
     Also here any references to pseudo regs that didn't get hard regs
2724
     but are equivalent to constants get replaced in the insn itself
2725
     with those constants.  Nobody will ever see them again.
2726
 
2727
     Finally, set up the preferred classes of each operand.  */
2728
 
2729
  for (i = 0; i < noperands; i++)
2730
    {
2731
      RTX_CODE code = GET_CODE (recog_data.operand[i]);
2732
 
2733
      address_reloaded[i] = 0;
2734
      address_operand_reloaded[i] = 0;
2735
      operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2736
                         : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2737
                         : RELOAD_OTHER);
2738
      address_type[i]
2739
        = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2740
           : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2741
           : RELOAD_OTHER);
2742
 
2743
      if (*constraints[i] == 0)
2744
        /* Ignore things like match_operator operands.  */
2745
        ;
2746
      else if (constraints[i][0] == 'p'
2747
               || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2748
        {
2749
          address_operand_reloaded[i]
2750
            = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2751
                                    recog_data.operand[i],
2752
                                    recog_data.operand_loc[i],
2753
                                    i, operand_type[i], ind_levels, insn);
2754
 
2755
          /* If we now have a simple operand where we used to have a
2756
             PLUS or MULT, re-recognize and try again.  */
2757
          if ((OBJECT_P (*recog_data.operand_loc[i])
2758
               || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2759
              && (GET_CODE (recog_data.operand[i]) == MULT
2760
                  || GET_CODE (recog_data.operand[i]) == PLUS))
2761
            {
2762
              INSN_CODE (insn) = -1;
2763
              retval = find_reloads (insn, replace, ind_levels, live_known,
2764
                                     reload_reg_p);
2765
              return retval;
2766
            }
2767
 
2768
          recog_data.operand[i] = *recog_data.operand_loc[i];
2769
          substed_operand[i] = recog_data.operand[i];
2770
 
2771
          /* Address operands are reloaded in their existing mode,
2772
             no matter what is specified in the machine description.  */
2773
          operand_mode[i] = GET_MODE (recog_data.operand[i]);
2774
        }
2775
      else if (code == MEM)
2776
        {
2777
          address_reloaded[i]
2778
            = find_reloads_address (GET_MODE (recog_data.operand[i]),
2779
                                    recog_data.operand_loc[i],
2780
                                    XEXP (recog_data.operand[i], 0),
2781
                                    &XEXP (recog_data.operand[i], 0),
2782
                                    i, address_type[i], ind_levels, insn);
2783
          recog_data.operand[i] = *recog_data.operand_loc[i];
2784
          substed_operand[i] = recog_data.operand[i];
2785
        }
2786
      else if (code == SUBREG)
2787
        {
2788
          rtx reg = SUBREG_REG (recog_data.operand[i]);
2789
          rtx op
2790
            = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2791
                                   ind_levels,
2792
                                   set != 0
2793
                                   && &SET_DEST (set) == recog_data.operand_loc[i],
2794
                                   insn,
2795
                                   &address_reloaded[i]);
2796
 
2797
          /* If we made a MEM to load (a part of) the stackslot of a pseudo
2798
             that didn't get a hard register, emit a USE with a REG_EQUAL
2799
             note in front so that we might inherit a previous, possibly
2800
             wider reload.  */
2801
 
2802
          if (replace
2803
              && MEM_P (op)
2804
              && REG_P (reg)
2805
              && (GET_MODE_SIZE (GET_MODE (reg))
2806
                  >= GET_MODE_SIZE (GET_MODE (op))))
2807
            set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2808
                                                   insn),
2809
                                 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2810
 
2811
          substed_operand[i] = recog_data.operand[i] = op;
2812
        }
2813
      else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2814
        /* We can get a PLUS as an "operand" as a result of register
2815
           elimination.  See eliminate_regs and gen_reload.  We handle
2816
           a unary operator by reloading the operand.  */
2817
        substed_operand[i] = recog_data.operand[i]
2818
          = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2819
                                 ind_levels, 0, insn,
2820
                                 &address_reloaded[i]);
2821
      else if (code == REG)
2822
        {
2823
          /* This is equivalent to calling find_reloads_toplev.
2824
             The code is duplicated for speed.
2825
             When we find a pseudo always equivalent to a constant,
2826
             we replace it by the constant.  We must be sure, however,
2827
             that we don't try to replace it in the insn in which it
2828
             is being set.  */
2829
          int regno = REGNO (recog_data.operand[i]);
2830
          if (reg_equiv_constant[regno] != 0
2831
              && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2832
            {
2833
              /* Record the existing mode so that the check if constants are
2834
                 allowed will work when operand_mode isn't specified.  */
2835
 
2836
              if (operand_mode[i] == VOIDmode)
2837
                operand_mode[i] = GET_MODE (recog_data.operand[i]);
2838
 
2839
              substed_operand[i] = recog_data.operand[i]
2840
                = reg_equiv_constant[regno];
2841
            }
2842
          if (reg_equiv_memory_loc[regno] != 0
2843
              && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2844
            /* We need not give a valid is_set_dest argument since the case
2845
               of a constant equivalence was checked above.  */
2846
            substed_operand[i] = recog_data.operand[i]
2847
              = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2848
                                     ind_levels, 0, insn,
2849
                                     &address_reloaded[i]);
2850
        }
2851
      /* If the operand is still a register (we didn't replace it with an
2852
         equivalent), get the preferred class to reload it into.  */
2853
      code = GET_CODE (recog_data.operand[i]);
2854
      preferred_class[i]
2855
        = ((code == REG && REGNO (recog_data.operand[i])
2856
            >= FIRST_PSEUDO_REGISTER)
2857
           ? reg_preferred_class (REGNO (recog_data.operand[i]))
2858
           : NO_REGS);
2859
      pref_or_nothing[i]
2860
        = (code == REG
2861
           && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2862
           && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2863
    }
2864
 
2865
  /* If this is simply a copy from operand 1 to operand 0, merge the
2866
     preferred classes for the operands.  */
2867
  if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2868
      && recog_data.operand[1] == SET_SRC (set))
2869
    {
2870
      preferred_class[0] = preferred_class[1]
2871
        = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2872
      pref_or_nothing[0] |= pref_or_nothing[1];
2873
      pref_or_nothing[1] |= pref_or_nothing[0];
2874
    }
2875
 
2876
  /* Now see what we need for pseudo-regs that didn't get hard regs
2877
     or got the wrong kind of hard reg.  For this, we must consider
2878
     all the operands together against the register constraints.  */
2879
 
2880
  best = MAX_RECOG_OPERANDS * 2 + 600;
2881
 
2882
  swapped = 0;
2883
  goal_alternative_swapped = 0;
2884
 try_swapped:
2885
 
2886
  /* The constraints are made of several alternatives.
2887
     Each operand's constraint looks like foo,bar,... with commas
2888
     separating the alternatives.  The first alternatives for all
2889
     operands go together, the second alternatives go together, etc.
2890
 
2891
     First loop over alternatives.  */
2892
 
2893
  for (this_alternative_number = 0;
2894
       this_alternative_number < n_alternatives;
2895
       this_alternative_number++)
2896
    {
2897
      /* Loop over operands for one constraint alternative.  */
2898
      /* LOSERS counts those that don't fit this alternative
2899
         and would require loading.  */
2900
      int losers = 0;
2901
      /* BAD is set to 1 if it some operand can't fit this alternative
2902
         even after reloading.  */
2903
      int bad = 0;
2904
      /* REJECT is a count of how undesirable this alternative says it is
2905
         if any reloading is required.  If the alternative matches exactly
2906
         then REJECT is ignored, but otherwise it gets this much
2907
         counted against it in addition to the reloading needed.  Each
2908
         ? counts three times here since we want the disparaging caused by
2909
         a bad register class to only count 1/3 as much.  */
2910
      int reject = 0;
2911
 
2912
      this_earlyclobber = 0;
2913
 
2914
      for (i = 0; i < noperands; i++)
2915
        {
2916
          char *p = constraints[i];
2917
          char *end;
2918
          int len;
2919
          int win = 0;
2920
          int did_match = 0;
2921
          /* 0 => this operand can be reloaded somehow for this alternative.  */
2922
          int badop = 1;
2923
          /* 0 => this operand can be reloaded if the alternative allows regs.  */
2924
          int winreg = 0;
2925
          int c;
2926
          int m;
2927
          rtx operand = recog_data.operand[i];
2928
          int offset = 0;
2929
          /* Nonzero means this is a MEM that must be reloaded into a reg
2930
             regardless of what the constraint says.  */
2931
          int force_reload = 0;
2932
          int offmemok = 0;
2933
          /* Nonzero if a constant forced into memory would be OK for this
2934
             operand.  */
2935
          int constmemok = 0;
2936
          int earlyclobber = 0;
2937
 
2938
          /* If the predicate accepts a unary operator, it means that
2939
             we need to reload the operand, but do not do this for
2940
             match_operator and friends.  */
2941
          if (UNARY_P (operand) && *p != 0)
2942
            operand = XEXP (operand, 0);
2943
 
2944
          /* If the operand is a SUBREG, extract
2945
             the REG or MEM (or maybe even a constant) within.
2946
             (Constants can occur as a result of reg_equiv_constant.)  */
2947
 
2948
          while (GET_CODE (operand) == SUBREG)
2949
            {
2950
              /* Offset only matters when operand is a REG and
2951
                 it is a hard reg.  This is because it is passed
2952
                 to reg_fits_class_p if it is a REG and all pseudos
2953
                 return 0 from that function.  */
2954
              if (REG_P (SUBREG_REG (operand))
2955
                  && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2956
                {
2957
                  if (!subreg_offset_representable_p
2958
                        (REGNO (SUBREG_REG (operand)),
2959
                         GET_MODE (SUBREG_REG (operand)),
2960
                         SUBREG_BYTE (operand),
2961
                         GET_MODE (operand)))
2962
                     force_reload = 1;
2963
                  offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2964
                                                 GET_MODE (SUBREG_REG (operand)),
2965
                                                 SUBREG_BYTE (operand),
2966
                                                 GET_MODE (operand));
2967
                }
2968
              operand = SUBREG_REG (operand);
2969
              /* Force reload if this is a constant or PLUS or if there may
2970
                 be a problem accessing OPERAND in the outer mode.  */
2971
              if (CONSTANT_P (operand)
2972
                  || GET_CODE (operand) == PLUS
2973
                  /* We must force a reload of paradoxical SUBREGs
2974
                     of a MEM because the alignment of the inner value
2975
                     may not be enough to do the outer reference.  On
2976
                     big-endian machines, it may also reference outside
2977
                     the object.
2978
 
2979
                     On machines that extend byte operations and we have a
2980
                     SUBREG where both the inner and outer modes are no wider
2981
                     than a word and the inner mode is narrower, is integral,
2982
                     and gets extended when loaded from memory, combine.c has
2983
                     made assumptions about the behavior of the machine in such
2984
                     register access.  If the data is, in fact, in memory we
2985
                     must always load using the size assumed to be in the
2986
                     register and let the insn do the different-sized
2987
                     accesses.
2988
 
2989
                     This is doubly true if WORD_REGISTER_OPERATIONS.  In
2990
                     this case eliminate_regs has left non-paradoxical
2991
                     subregs for push_reload to see.  Make sure it does
2992
                     by forcing the reload.
2993
 
2994
                     ??? When is it right at this stage to have a subreg
2995
                     of a mem that is _not_ to be handled specially?  IMO
2996
                     those should have been reduced to just a mem.  */
2997
                  || ((MEM_P (operand)
2998
                       || (REG_P (operand)
2999
                           && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3000
#ifndef WORD_REGISTER_OPERATIONS
3001
                      && (((GET_MODE_BITSIZE (GET_MODE (operand))
3002
                            < BIGGEST_ALIGNMENT)
3003
                           && (GET_MODE_SIZE (operand_mode[i])
3004
                               > GET_MODE_SIZE (GET_MODE (operand))))
3005
                          || BYTES_BIG_ENDIAN
3006
#ifdef LOAD_EXTEND_OP
3007
                          || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3008
                              && (GET_MODE_SIZE (GET_MODE (operand))
3009
                                  <= UNITS_PER_WORD)
3010
                              && (GET_MODE_SIZE (operand_mode[i])
3011
                                  > GET_MODE_SIZE (GET_MODE (operand)))
3012
                              && INTEGRAL_MODE_P (GET_MODE (operand))
3013
                              && LOAD_EXTEND_OP (GET_MODE (operand)) != UNKNOWN)
3014
#endif
3015
                          )
3016
#endif
3017
                      )
3018
                  )
3019
                force_reload = 1;
3020
            }
3021
 
3022
          this_alternative[i] = (int) NO_REGS;
3023
          this_alternative_win[i] = 0;
3024
          this_alternative_match_win[i] = 0;
3025
          this_alternative_offmemok[i] = 0;
3026
          this_alternative_earlyclobber[i] = 0;
3027
          this_alternative_matches[i] = -1;
3028
 
3029
          /* An empty constraint or empty alternative
3030
             allows anything which matched the pattern.  */
3031
          if (*p == 0 || *p == ',')
3032
            win = 1, badop = 0;
3033
 
3034
          /* Scan this alternative's specs for this operand;
3035
             set WIN if the operand fits any letter in this alternative.
3036
             Otherwise, clear BADOP if this operand could
3037
             fit some letter after reloads,
3038
             or set WINREG if this operand could fit after reloads
3039
             provided the constraint allows some registers.  */
3040
 
3041
          do
3042
            switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3043
              {
3044
              case '\0':
3045
                len = 0;
3046
                break;
3047
              case ',':
3048
                c = '\0';
3049
                break;
3050
 
3051
              case '=':  case '+':  case '*':
3052
                break;
3053
 
3054
              case '%':
3055
                /* We only support one commutative marker, the first
3056
                   one.  We already set commutative above.  */
3057
                break;
3058
 
3059
              case '?':
3060
                reject += 6;
3061
                break;
3062
 
3063
              case '!':
3064
                reject = 600;
3065
                break;
3066
 
3067
              case '#':
3068
                /* Ignore rest of this alternative as far as
3069
                   reloading is concerned.  */
3070
                do
3071
                  p++;
3072
                while (*p && *p != ',');
3073
                len = 0;
3074
                break;
3075
 
3076
              case '0':  case '1':  case '2':  case '3':  case '4':
3077
              case '5':  case '6':  case '7':  case '8':  case '9':
3078
                m = strtoul (p, &end, 10);
3079
                p = end;
3080
                len = 0;
3081
 
3082
                this_alternative_matches[i] = m;
3083
                /* We are supposed to match a previous operand.
3084
                   If we do, we win if that one did.
3085
                   If we do not, count both of the operands as losers.
3086
                   (This is too conservative, since most of the time
3087
                   only a single reload insn will be needed to make
3088
                   the two operands win.  As a result, this alternative
3089
                   may be rejected when it is actually desirable.)  */
3090
                if ((swapped && (m != commutative || i != commutative + 1))
3091
                    /* If we are matching as if two operands were swapped,
3092
                       also pretend that operands_match had been computed
3093
                       with swapped.
3094
                       But if I is the second of those and C is the first,
3095
                       don't exchange them, because operands_match is valid
3096
                       only on one side of its diagonal.  */
3097
                    ? (operands_match
3098
                       [(m == commutative || m == commutative + 1)
3099
                       ? 2 * commutative + 1 - m : m]
3100
                       [(i == commutative || i == commutative + 1)
3101
                       ? 2 * commutative + 1 - i : i])
3102
                    : operands_match[m][i])
3103
                  {
3104
                    /* If we are matching a non-offsettable address where an
3105
                       offsettable address was expected, then we must reject
3106
                       this combination, because we can't reload it.  */
3107
                    if (this_alternative_offmemok[m]
3108
                        && MEM_P (recog_data.operand[m])
3109
                        && this_alternative[m] == (int) NO_REGS
3110
                        && ! this_alternative_win[m])
3111
                      bad = 1;
3112
 
3113
                    did_match = this_alternative_win[m];
3114
                  }
3115
                else
3116
                  {
3117
                    /* Operands don't match.  */
3118
                    rtx value;
3119
                    int loc1, loc2;
3120
                    /* Retroactively mark the operand we had to match
3121
                       as a loser, if it wasn't already.  */
3122
                    if (this_alternative_win[m])
3123
                      losers++;
3124
                    this_alternative_win[m] = 0;
3125
                    if (this_alternative[m] == (int) NO_REGS)
3126
                      bad = 1;
3127
                    /* But count the pair only once in the total badness of
3128
                       this alternative, if the pair can be a dummy reload.
3129
                       The pointers in operand_loc are not swapped; swap
3130
                       them by hand if necessary.  */
3131
                    if (swapped && i == commutative)
3132
                      loc1 = commutative + 1;
3133
                    else if (swapped && i == commutative + 1)
3134
                      loc1 = commutative;
3135
                    else
3136
                      loc1 = i;
3137
                    if (swapped && m == commutative)
3138
                      loc2 = commutative + 1;
3139
                    else if (swapped && m == commutative + 1)
3140
                      loc2 = commutative;
3141
                    else
3142
                      loc2 = m;
3143
                    value
3144
                      = find_dummy_reload (recog_data.operand[i],
3145
                                           recog_data.operand[m],
3146
                                           recog_data.operand_loc[loc1],
3147
                                           recog_data.operand_loc[loc2],
3148
                                           operand_mode[i], operand_mode[m],
3149
                                           this_alternative[m], -1,
3150
                                           this_alternative_earlyclobber[m]);
3151
 
3152
                    if (value != 0)
3153
                      losers--;
3154
                  }
3155
                /* This can be fixed with reloads if the operand
3156
                   we are supposed to match can be fixed with reloads.  */
3157
                badop = 0;
3158
                this_alternative[i] = this_alternative[m];
3159
 
3160
                /* If we have to reload this operand and some previous
3161
                   operand also had to match the same thing as this
3162
                   operand, we don't know how to do that.  So reject this
3163
                   alternative.  */
3164
                if (! did_match || force_reload)
3165
                  for (j = 0; j < i; j++)
3166
                    if (this_alternative_matches[j]
3167
                        == this_alternative_matches[i])
3168
                      badop = 1;
3169
                break;
3170
 
3171
              case 'p':
3172
                /* All necessary reloads for an address_operand
3173
                   were handled in find_reloads_address.  */
3174
                this_alternative[i]
3175
                  = (int) base_reg_class (VOIDmode, ADDRESS, SCRATCH);
3176
                win = 1;
3177
                badop = 0;
3178
                break;
3179
 
3180
              case 'm':
3181
                if (force_reload)
3182
                  break;
3183
                if (MEM_P (operand)
3184
                    || (REG_P (operand)
3185
                        && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3186
                        && reg_renumber[REGNO (operand)] < 0))
3187
                  win = 1;
3188
                if (CONST_POOL_OK_P (operand))
3189
                  badop = 0;
3190
                constmemok = 1;
3191
                break;
3192
 
3193
              case '<':
3194
                if (MEM_P (operand)
3195
                    && ! address_reloaded[i]
3196
                    && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3197
                        || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3198
                  win = 1;
3199
                break;
3200
 
3201
              case '>':
3202
                if (MEM_P (operand)
3203
                    && ! address_reloaded[i]
3204
                    && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3205
                        || GET_CODE (XEXP (operand, 0)) == POST_INC))
3206
                  win = 1;
3207
                break;
3208
 
3209
                /* Memory operand whose address is not offsettable.  */
3210
              case 'V':
3211
                if (force_reload)
3212
                  break;
3213
                if (MEM_P (operand)
3214
                    && ! (ind_levels ? offsettable_memref_p (operand)
3215
                          : offsettable_nonstrict_memref_p (operand))
3216
                    /* Certain mem addresses will become offsettable
3217
                       after they themselves are reloaded.  This is important;
3218
                       we don't want our own handling of unoffsettables
3219
                       to override the handling of reg_equiv_address.  */
3220
                    && !(REG_P (XEXP (operand, 0))
3221
                         && (ind_levels == 0
3222
                             || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3223
                  win = 1;
3224
                break;
3225
 
3226
                /* Memory operand whose address is offsettable.  */
3227
              case 'o':
3228
                if (force_reload)
3229
                  break;
3230
                if ((MEM_P (operand)
3231
                     /* If IND_LEVELS, find_reloads_address won't reload a
3232
                        pseudo that didn't get a hard reg, so we have to
3233
                        reject that case.  */
3234
                     && ((ind_levels ? offsettable_memref_p (operand)
3235
                          : offsettable_nonstrict_memref_p (operand))
3236
                         /* A reloaded address is offsettable because it is now
3237
                            just a simple register indirect.  */
3238
                         || address_reloaded[i] == 1))
3239
                    || (REG_P (operand)
3240
                        && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3241
                        && reg_renumber[REGNO (operand)] < 0
3242
                        /* If reg_equiv_address is nonzero, we will be
3243
                           loading it into a register; hence it will be
3244
                           offsettable, but we cannot say that reg_equiv_mem
3245
                           is offsettable without checking.  */
3246
                        && ((reg_equiv_mem[REGNO (operand)] != 0
3247
                             && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3248
                            || (reg_equiv_address[REGNO (operand)] != 0))))
3249
                  win = 1;
3250
                if (CONST_POOL_OK_P (operand)
3251
                    || MEM_P (operand))
3252
                  badop = 0;
3253
                constmemok = 1;
3254
                offmemok = 1;
3255
                break;
3256
 
3257
              case '&':
3258
                /* Output operand that is stored before the need for the
3259
                   input operands (and their index registers) is over.  */
3260
                earlyclobber = 1, this_earlyclobber = 1;
3261
                break;
3262
 
3263
              case 'E':
3264
              case 'F':
3265
                if (GET_CODE (operand) == CONST_DOUBLE
3266
                    || (GET_CODE (operand) == CONST_VECTOR
3267
                        && (GET_MODE_CLASS (GET_MODE (operand))
3268
                            == MODE_VECTOR_FLOAT)))
3269
                  win = 1;
3270
                break;
3271
 
3272
              case 'G':
3273
              case 'H':
3274
                if (GET_CODE (operand) == CONST_DOUBLE
3275
                    && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3276
                  win = 1;
3277
                break;
3278
 
3279
              case 's':
3280
                if (GET_CODE (operand) == CONST_INT
3281
                    || (GET_CODE (operand) == CONST_DOUBLE
3282
                        && GET_MODE (operand) == VOIDmode))
3283
                  break;
3284
              case 'i':
3285
                if (CONSTANT_P (operand)
3286
                    && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)))
3287
                  win = 1;
3288
                break;
3289
 
3290
              case 'n':
3291
                if (GET_CODE (operand) == CONST_INT
3292
                    || (GET_CODE (operand) == CONST_DOUBLE
3293
                        && GET_MODE (operand) == VOIDmode))
3294
                  win = 1;
3295
                break;
3296
 
3297
              case 'I':
3298
              case 'J':
3299
              case 'K':
3300
              case 'L':
3301
              case 'M':
3302
              case 'N':
3303
              case 'O':
3304
              case 'P':
3305
                if (GET_CODE (operand) == CONST_INT
3306
                    && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3307
                  win = 1;
3308
                break;
3309
 
3310
              case 'X':
3311
                force_reload = 0;
3312
                win = 1;
3313
                break;
3314
 
3315
              case 'g':
3316
                if (! force_reload
3317
                    /* A PLUS is never a valid operand, but reload can make
3318
                       it from a register when eliminating registers.  */
3319
                    && GET_CODE (operand) != PLUS
3320
                    /* A SCRATCH is not a valid operand.  */
3321
                    && GET_CODE (operand) != SCRATCH
3322
                    && (! CONSTANT_P (operand)
3323
                        || ! flag_pic
3324
                        || LEGITIMATE_PIC_OPERAND_P (operand))
3325
                    && (GENERAL_REGS == ALL_REGS
3326
                        || !REG_P (operand)
3327
                        || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3328
                            && reg_renumber[REGNO (operand)] < 0)))
3329
                  win = 1;
3330
                /* Drop through into 'r' case.  */
3331
 
3332
              case 'r':
3333
                this_alternative[i]
3334
                  = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3335
                goto reg;
3336
 
3337
              default:
3338
                if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3339
                  {
3340
#ifdef EXTRA_CONSTRAINT_STR
3341
                    if (EXTRA_MEMORY_CONSTRAINT (c, p))
3342
                      {
3343
                        if (force_reload)
3344
                          break;
3345
                        if (EXTRA_CONSTRAINT_STR (operand, c, p))
3346
                          win = 1;
3347
                        /* If the address was already reloaded,
3348
                           we win as well.  */
3349
                        else if (MEM_P (operand)
3350
                                 && address_reloaded[i] == 1)
3351
                          win = 1;
3352
                        /* Likewise if the address will be reloaded because
3353
                           reg_equiv_address is nonzero.  For reg_equiv_mem
3354
                           we have to check.  */
3355
                        else if (REG_P (operand)
3356
                                 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3357
                                 && reg_renumber[REGNO (operand)] < 0
3358
                                 && ((reg_equiv_mem[REGNO (operand)] != 0
3359
                                      && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3360
                                     || (reg_equiv_address[REGNO (operand)] != 0)))
3361
                          win = 1;
3362
 
3363
                        /* If we didn't already win, we can reload
3364
                           constants via force_const_mem, and other
3365
                           MEMs by reloading the address like for 'o'.  */
3366
                        if (CONST_POOL_OK_P (operand)
3367
                            || MEM_P (operand))
3368
                          badop = 0;
3369
                        constmemok = 1;
3370
                        offmemok = 1;
3371
                        break;
3372
                      }
3373
                    if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3374
                      {
3375
                        if (EXTRA_CONSTRAINT_STR (operand, c, p))
3376
                          win = 1;
3377
 
3378
                        /* If we didn't already win, we can reload
3379
                           the address into a base register.  */
3380
                        this_alternative[i]
3381
                          = (int) base_reg_class (VOIDmode, ADDRESS, SCRATCH);
3382
                        badop = 0;
3383
                        break;
3384
                      }
3385
 
3386
                    if (EXTRA_CONSTRAINT_STR (operand, c, p))
3387
                      win = 1;
3388
#endif
3389
                    break;
3390
                  }
3391
 
3392
                this_alternative[i]
3393
                  = (int) (reg_class_subunion
3394
                           [this_alternative[i]]
3395
                           [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3396
              reg:
3397
                if (GET_MODE (operand) == BLKmode)
3398
                  break;
3399
                winreg = 1;
3400
                if (REG_P (operand)
3401
                    && reg_fits_class_p (operand, this_alternative[i],
3402
                                         offset, GET_MODE (recog_data.operand[i])))
3403
                  win = 1;
3404
                break;
3405
              }
3406
          while ((p += len), c);
3407
 
3408
          constraints[i] = p;
3409
 
3410
          /* If this operand could be handled with a reg,
3411
             and some reg is allowed, then this operand can be handled.  */
3412
          if (winreg && this_alternative[i] != (int) NO_REGS)
3413
            badop = 0;
3414
 
3415
          /* Record which operands fit this alternative.  */
3416
          this_alternative_earlyclobber[i] = earlyclobber;
3417
          if (win && ! force_reload)
3418
            this_alternative_win[i] = 1;
3419
          else if (did_match && ! force_reload)
3420
            this_alternative_match_win[i] = 1;
3421
          else
3422
            {
3423
              int const_to_mem = 0;
3424
 
3425
              this_alternative_offmemok[i] = offmemok;
3426
              losers++;
3427
              if (badop)
3428
                bad = 1;
3429
              /* Alternative loses if it has no regs for a reg operand.  */
3430
              if (REG_P (operand)
3431
                  && this_alternative[i] == (int) NO_REGS
3432
                  && this_alternative_matches[i] < 0)
3433
                bad = 1;
3434
 
3435
              /* If this is a constant that is reloaded into the desired
3436
                 class by copying it to memory first, count that as another
3437
                 reload.  This is consistent with other code and is
3438
                 required to avoid choosing another alternative when
3439
                 the constant is moved into memory by this function on
3440
                 an early reload pass.  Note that the test here is
3441
                 precisely the same as in the code below that calls
3442
                 force_const_mem.  */
3443
              if (CONST_POOL_OK_P (operand)
3444
                  && ((PREFERRED_RELOAD_CLASS (operand,
3445
                                               (enum reg_class) this_alternative[i])
3446
                       == NO_REGS)
3447
                      || no_input_reloads)
3448
                  && operand_mode[i] != VOIDmode)
3449
                {
3450
                  const_to_mem = 1;
3451
                  if (this_alternative[i] != (int) NO_REGS)
3452
                    losers++;
3453
                }
3454
 
3455
              /* Alternative loses if it requires a type of reload not
3456
                 permitted for this insn.  We can always reload SCRATCH
3457
                 and objects with a REG_UNUSED note.  */
3458
              if (GET_CODE (operand) != SCRATCH
3459
                       && modified[i] != RELOAD_READ && no_output_reloads
3460
                       && ! find_reg_note (insn, REG_UNUSED, operand))
3461
                bad = 1;
3462
              else if (modified[i] != RELOAD_WRITE && no_input_reloads
3463
                       && ! const_to_mem)
3464
                bad = 1;
3465
 
3466
              /* If we can't reload this value at all, reject this
3467
                 alternative.  Note that we could also lose due to
3468
                 LIMIT_RELOAD_CLASS, but we don't check that
3469
                 here.  */
3470
 
3471
              if (! CONSTANT_P (operand)
3472
                  && (enum reg_class) this_alternative[i] != NO_REGS)
3473
                {
3474
                  if (PREFERRED_RELOAD_CLASS
3475
                        (operand, (enum reg_class) this_alternative[i])
3476
                      == NO_REGS)
3477
                    reject = 600;
3478
 
3479
#ifdef PREFERRED_OUTPUT_RELOAD_CLASS
3480
                  if (operand_type[i] == RELOAD_FOR_OUTPUT
3481
                      && PREFERRED_OUTPUT_RELOAD_CLASS
3482
                           (operand, (enum reg_class) this_alternative[i])
3483
                         == NO_REGS)
3484
                    reject = 600;
3485
#endif
3486
                }
3487
 
3488
              /* We prefer to reload pseudos over reloading other things,
3489
                 since such reloads may be able to be eliminated later.
3490
                 If we are reloading a SCRATCH, we won't be generating any
3491
                 insns, just using a register, so it is also preferred.
3492
                 So bump REJECT in other cases.  Don't do this in the
3493
                 case where we are forcing a constant into memory and
3494
                 it will then win since we don't want to have a different
3495
                 alternative match then.  */
3496
              if (! (REG_P (operand)
3497
                     && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3498
                  && GET_CODE (operand) != SCRATCH
3499
                  && ! (const_to_mem && constmemok))
3500
                reject += 2;
3501
 
3502
              /* Input reloads can be inherited more often than output
3503
                 reloads can be removed, so penalize output reloads.  */
3504
              if (operand_type[i] != RELOAD_FOR_INPUT
3505
                  && GET_CODE (operand) != SCRATCH)
3506
                reject++;
3507
            }
3508
 
3509
          /* If this operand is a pseudo register that didn't get a hard
3510
             reg and this alternative accepts some register, see if the
3511
             class that we want is a subset of the preferred class for this
3512
             register.  If not, but it intersects that class, use the
3513
             preferred class instead.  If it does not intersect the preferred
3514
             class, show that usage of this alternative should be discouraged;
3515
             it will be discouraged more still if the register is `preferred
3516
             or nothing'.  We do this because it increases the chance of
3517
             reusing our spill register in a later insn and avoiding a pair
3518
             of memory stores and loads.
3519
 
3520
             Don't bother with this if this alternative will accept this
3521
             operand.
3522
 
3523
             Don't do this for a multiword operand, since it is only a
3524
             small win and has the risk of requiring more spill registers,
3525
             which could cause a large loss.
3526
 
3527
             Don't do this if the preferred class has only one register
3528
             because we might otherwise exhaust the class.  */
3529
 
3530
          if (! win && ! did_match
3531
              && this_alternative[i] != (int) NO_REGS
3532
              && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3533
              && reg_class_size [(int) preferred_class[i]] > 0
3534
              && ! SMALL_REGISTER_CLASS_P (preferred_class[i]))
3535
            {
3536
              if (! reg_class_subset_p (this_alternative[i],
3537
                                        preferred_class[i]))
3538
                {
3539
                  /* Since we don't have a way of forming the intersection,
3540
                     we just do something special if the preferred class
3541
                     is a subset of the class we have; that's the most
3542
                     common case anyway.  */
3543
                  if (reg_class_subset_p (preferred_class[i],
3544
                                          this_alternative[i]))
3545
                    this_alternative[i] = (int) preferred_class[i];
3546
                  else
3547
                    reject += (2 + 2 * pref_or_nothing[i]);
3548
                }
3549
            }
3550
        }
3551
 
3552
      /* Now see if any output operands that are marked "earlyclobber"
3553
         in this alternative conflict with any input operands
3554
         or any memory addresses.  */
3555
 
3556
      for (i = 0; i < noperands; i++)
3557
        if (this_alternative_earlyclobber[i]
3558
            && (this_alternative_win[i] || this_alternative_match_win[i]))
3559
          {
3560
            struct decomposition early_data;
3561
 
3562
            early_data = decompose (recog_data.operand[i]);
3563
 
3564
            gcc_assert (modified[i] != RELOAD_READ);
3565
 
3566
            if (this_alternative[i] == NO_REGS)
3567
              {
3568
                this_alternative_earlyclobber[i] = 0;
3569
                gcc_assert (this_insn_is_asm);
3570
                error_for_asm (this_insn,
3571
                               "%<&%> constraint used with no register class");
3572
              }
3573
 
3574
            for (j = 0; j < noperands; j++)
3575
              /* Is this an input operand or a memory ref?  */
3576
              if ((MEM_P (recog_data.operand[j])
3577
                   || modified[j] != RELOAD_WRITE)
3578
                  && j != i
3579
                  /* Ignore things like match_operator operands.  */
3580
                  && *recog_data.constraints[j] != 0
3581
                  /* Don't count an input operand that is constrained to match
3582
                     the early clobber operand.  */
3583
                  && ! (this_alternative_matches[j] == i
3584
                        && rtx_equal_p (recog_data.operand[i],
3585
                                        recog_data.operand[j]))
3586
                  /* Is it altered by storing the earlyclobber operand?  */
3587
                  && !immune_p (recog_data.operand[j], recog_data.operand[i],
3588
                                early_data))
3589
                {
3590
                  /* If the output is in a non-empty few-regs class,
3591
                     it's costly to reload it, so reload the input instead.  */
3592
                  if (SMALL_REGISTER_CLASS_P (this_alternative[i])
3593
                      && (REG_P (recog_data.operand[j])
3594
                          || GET_CODE (recog_data.operand[j]) == SUBREG))
3595
                    {
3596
                      losers++;
3597
                      this_alternative_win[j] = 0;
3598
                      this_alternative_match_win[j] = 0;
3599
                    }
3600
                  else
3601
                    break;
3602
                }
3603
            /* If an earlyclobber operand conflicts with something,
3604
               it must be reloaded, so request this and count the cost.  */
3605
            if (j != noperands)
3606
              {
3607
                losers++;
3608
                this_alternative_win[i] = 0;
3609
                this_alternative_match_win[j] = 0;
3610
                for (j = 0; j < noperands; j++)
3611
                  if (this_alternative_matches[j] == i
3612
                      && this_alternative_match_win[j])
3613
                    {
3614
                      this_alternative_win[j] = 0;
3615
                      this_alternative_match_win[j] = 0;
3616
                      losers++;
3617
                    }
3618
              }
3619
          }
3620
 
3621
      /* If one alternative accepts all the operands, no reload required,
3622
         choose that alternative; don't consider the remaining ones.  */
3623
      if (losers == 0)
3624
        {
3625
          /* Unswap these so that they are never swapped at `finish'.  */
3626
          if (commutative >= 0)
3627
            {
3628
              recog_data.operand[commutative] = substed_operand[commutative];
3629
              recog_data.operand[commutative + 1]
3630
                = substed_operand[commutative + 1];
3631
            }
3632
          for (i = 0; i < noperands; i++)
3633
            {
3634
              goal_alternative_win[i] = this_alternative_win[i];
3635
              goal_alternative_match_win[i] = this_alternative_match_win[i];
3636
              goal_alternative[i] = this_alternative[i];
3637
              goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3638
              goal_alternative_matches[i] = this_alternative_matches[i];
3639
              goal_alternative_earlyclobber[i]
3640
                = this_alternative_earlyclobber[i];
3641
            }
3642
          goal_alternative_number = this_alternative_number;
3643
          goal_alternative_swapped = swapped;
3644
          goal_earlyclobber = this_earlyclobber;
3645
          goto finish;
3646
        }
3647
 
3648
      /* REJECT, set by the ! and ? constraint characters and when a register
3649
         would be reloaded into a non-preferred class, discourages the use of
3650
         this alternative for a reload goal.  REJECT is incremented by six
3651
         for each ? and two for each non-preferred class.  */
3652
      losers = losers * 6 + reject;
3653
 
3654
      /* If this alternative can be made to work by reloading,
3655
         and it needs less reloading than the others checked so far,
3656
         record it as the chosen goal for reloading.  */
3657
      if (! bad && best > losers)
3658
        {
3659
          for (i = 0; i < noperands; i++)
3660
            {
3661
              goal_alternative[i] = this_alternative[i];
3662
              goal_alternative_win[i] = this_alternative_win[i];
3663
              goal_alternative_match_win[i] = this_alternative_match_win[i];
3664
              goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3665
              goal_alternative_matches[i] = this_alternative_matches[i];
3666
              goal_alternative_earlyclobber[i]
3667
                = this_alternative_earlyclobber[i];
3668
            }
3669
          goal_alternative_swapped = swapped;
3670
          best = losers;
3671
          goal_alternative_number = this_alternative_number;
3672
          goal_earlyclobber = this_earlyclobber;
3673
        }
3674
    }
3675
 
3676
  /* If insn is commutative (it's safe to exchange a certain pair of operands)
3677
     then we need to try each alternative twice,
3678
     the second time matching those two operands
3679
     as if we had exchanged them.
3680
     To do this, really exchange them in operands.
3681
 
3682
     If we have just tried the alternatives the second time,
3683
     return operands to normal and drop through.  */
3684
 
3685
  if (commutative >= 0)
3686
    {
3687
      swapped = !swapped;
3688
      if (swapped)
3689
        {
3690
          enum reg_class tclass;
3691
          int t;
3692
 
3693
          recog_data.operand[commutative] = substed_operand[commutative + 1];
3694
          recog_data.operand[commutative + 1] = substed_operand[commutative];
3695
          /* Swap the duplicates too.  */
3696
          for (i = 0; i < recog_data.n_dups; i++)
3697
            if (recog_data.dup_num[i] == commutative
3698
                || recog_data.dup_num[i] == commutative + 1)
3699
              *recog_data.dup_loc[i]
3700
                 = recog_data.operand[(int) recog_data.dup_num[i]];
3701
 
3702
          tclass = preferred_class[commutative];
3703
          preferred_class[commutative] = preferred_class[commutative + 1];
3704
          preferred_class[commutative + 1] = tclass;
3705
 
3706
          t = pref_or_nothing[commutative];
3707
          pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3708
          pref_or_nothing[commutative + 1] = t;
3709
 
3710
          t = address_reloaded[commutative];
3711
          address_reloaded[commutative] = address_reloaded[commutative + 1];
3712
          address_reloaded[commutative + 1] = t;
3713
 
3714
          memcpy (constraints, recog_data.constraints,
3715
                  noperands * sizeof (char *));
3716
          goto try_swapped;
3717
        }
3718
      else
3719
        {
3720
          recog_data.operand[commutative] = substed_operand[commutative];
3721
          recog_data.operand[commutative + 1]
3722
            = substed_operand[commutative + 1];
3723
          /* Unswap the duplicates too.  */
3724
          for (i = 0; i < recog_data.n_dups; i++)
3725
            if (recog_data.dup_num[i] == commutative
3726
                || recog_data.dup_num[i] == commutative + 1)
3727
              *recog_data.dup_loc[i]
3728
                 = recog_data.operand[(int) recog_data.dup_num[i]];
3729
        }
3730
    }
3731
 
3732
  /* The operands don't meet the constraints.
3733
     goal_alternative describes the alternative
3734
     that we could reach by reloading the fewest operands.
3735
     Reload so as to fit it.  */
3736
 
3737
  if (best == MAX_RECOG_OPERANDS * 2 + 600)
3738
    {
3739
      /* No alternative works with reloads??  */
3740
      if (insn_code_number >= 0)
3741
        fatal_insn ("unable to generate reloads for:", insn);
3742
      error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
3743
      /* Avoid further trouble with this insn.  */
3744
      PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3745
      n_reloads = 0;
3746
      return 0;
3747
    }
3748
 
3749
  /* Jump to `finish' from above if all operands are valid already.
3750
     In that case, goal_alternative_win is all 1.  */
3751
 finish:
3752
 
3753
  /* Right now, for any pair of operands I and J that are required to match,
3754
     with I < J,
3755
     goal_alternative_matches[J] is I.
3756
     Set up goal_alternative_matched as the inverse function:
3757
     goal_alternative_matched[I] = J.  */
3758
 
3759
  for (i = 0; i < noperands; i++)
3760
    goal_alternative_matched[i] = -1;
3761
 
3762
  for (i = 0; i < noperands; i++)
3763
    if (! goal_alternative_win[i]
3764
        && goal_alternative_matches[i] >= 0)
3765
      goal_alternative_matched[goal_alternative_matches[i]] = i;
3766
 
3767
  for (i = 0; i < noperands; i++)
3768
    goal_alternative_win[i] |= goal_alternative_match_win[i];
3769
 
3770
  /* If the best alternative is with operands 1 and 2 swapped,
3771
     consider them swapped before reporting the reloads.  Update the
3772
     operand numbers of any reloads already pushed.  */
3773
 
3774
  if (goal_alternative_swapped)
3775
    {
3776
      rtx tem;
3777
 
3778
      tem = substed_operand[commutative];
3779
      substed_operand[commutative] = substed_operand[commutative + 1];
3780
      substed_operand[commutative + 1] = tem;
3781
      tem = recog_data.operand[commutative];
3782
      recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3783
      recog_data.operand[commutative + 1] = tem;
3784
      tem = *recog_data.operand_loc[commutative];
3785
      *recog_data.operand_loc[commutative]
3786
        = *recog_data.operand_loc[commutative + 1];
3787
      *recog_data.operand_loc[commutative + 1] = tem;
3788
 
3789
      for (i = 0; i < n_reloads; i++)
3790
        {
3791
          if (rld[i].opnum == commutative)
3792
            rld[i].opnum = commutative + 1;
3793
          else if (rld[i].opnum == commutative + 1)
3794
            rld[i].opnum = commutative;
3795
        }
3796
    }
3797
 
3798
  for (i = 0; i < noperands; i++)
3799
    {
3800
      operand_reloadnum[i] = -1;
3801
 
3802
      /* If this is an earlyclobber operand, we need to widen the scope.
3803
         The reload must remain valid from the start of the insn being
3804
         reloaded until after the operand is stored into its destination.
3805
         We approximate this with RELOAD_OTHER even though we know that we
3806
         do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3807
 
3808
         One special case that is worth checking is when we have an
3809
         output that is earlyclobber but isn't used past the insn (typically
3810
         a SCRATCH).  In this case, we only need have the reload live
3811
         through the insn itself, but not for any of our input or output
3812
         reloads.
3813
         But we must not accidentally narrow the scope of an existing
3814
         RELOAD_OTHER reload - leave these alone.
3815
 
3816
         In any case, anything needed to address this operand can remain
3817
         however they were previously categorized.  */
3818
 
3819
      if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3820
        operand_type[i]
3821
          = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3822
             ? RELOAD_FOR_INSN : RELOAD_OTHER);
3823
    }
3824
 
3825
  /* Any constants that aren't allowed and can't be reloaded
3826
     into registers are here changed into memory references.  */
3827
  for (i = 0; i < noperands; i++)
3828
    if (! goal_alternative_win[i]
3829
        && CONST_POOL_OK_P (recog_data.operand[i])
3830
        && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3831
                                     (enum reg_class) goal_alternative[i])
3832
             == NO_REGS)
3833
            || no_input_reloads)
3834
        && operand_mode[i] != VOIDmode)
3835
      {
3836
        substed_operand[i] = recog_data.operand[i]
3837
          = find_reloads_toplev (force_const_mem (operand_mode[i],
3838
                                                  recog_data.operand[i]),
3839
                                 i, address_type[i], ind_levels, 0, insn,
3840
                                 NULL);
3841
        if (alternative_allows_memconst (recog_data.constraints[i],
3842
                                         goal_alternative_number))
3843
          goal_alternative_win[i] = 1;
3844
      }
3845
 
3846
  /* Likewise any invalid constants appearing as operand of a PLUS
3847
     that is to be reloaded.  */
3848
  for (i = 0; i < noperands; i++)
3849
    if (! goal_alternative_win[i]
3850
        && GET_CODE (recog_data.operand[i]) == PLUS
3851
        && CONST_POOL_OK_P (XEXP (recog_data.operand[i], 1))
3852
        && (PREFERRED_RELOAD_CLASS (XEXP (recog_data.operand[i], 1),
3853
                                    (enum reg_class) goal_alternative[i])
3854
             == NO_REGS)
3855
        && operand_mode[i] != VOIDmode)
3856
      {
3857
        rtx tem = force_const_mem (operand_mode[i],
3858
                                   XEXP (recog_data.operand[i], 1));
3859
        tem = gen_rtx_PLUS (operand_mode[i],
3860
                            XEXP (recog_data.operand[i], 0), tem);
3861
 
3862
        substed_operand[i] = recog_data.operand[i]
3863
          = find_reloads_toplev (tem, i, address_type[i],
3864
                                 ind_levels, 0, insn, NULL);
3865
      }
3866
 
3867
  /* Record the values of the earlyclobber operands for the caller.  */
3868
  if (goal_earlyclobber)
3869
    for (i = 0; i < noperands; i++)
3870
      if (goal_alternative_earlyclobber[i])
3871
        reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3872
 
3873
  /* Now record reloads for all the operands that need them.  */
3874
  for (i = 0; i < noperands; i++)
3875
    if (! goal_alternative_win[i])
3876
      {
3877
        /* Operands that match previous ones have already been handled.  */
3878
        if (goal_alternative_matches[i] >= 0)
3879
          ;
3880
        /* Handle an operand with a nonoffsettable address
3881
           appearing where an offsettable address will do
3882
           by reloading the address into a base register.
3883
 
3884
           ??? We can also do this when the operand is a register and
3885
           reg_equiv_mem is not offsettable, but this is a bit tricky,
3886
           so we don't bother with it.  It may not be worth doing.  */
3887
        else if (goal_alternative_matched[i] == -1
3888
                 && goal_alternative_offmemok[i]
3889
                 && MEM_P (recog_data.operand[i]))
3890
          {
3891
            /* If the address to be reloaded is a VOIDmode constant,
3892
               use Pmode as mode of the reload register, as would have
3893
               been done by find_reloads_address.  */
3894
            enum machine_mode address_mode;
3895
            address_mode = GET_MODE (XEXP (recog_data.operand[i], 0));
3896
            if (address_mode == VOIDmode)
3897
              address_mode = Pmode;
3898
 
3899
            operand_reloadnum[i]
3900
              = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3901
                             &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3902
                             base_reg_class (VOIDmode, MEM, SCRATCH),
3903
                             address_mode,
3904
                             VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3905
            rld[operand_reloadnum[i]].inc
3906
              = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3907
 
3908
            /* If this operand is an output, we will have made any
3909
               reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3910
               now we are treating part of the operand as an input, so
3911
               we must change these to RELOAD_FOR_INPUT_ADDRESS.  */
3912
 
3913
            if (modified[i] == RELOAD_WRITE)
3914
              {
3915
                for (j = 0; j < n_reloads; j++)
3916
                  {
3917
                    if (rld[j].opnum == i)
3918
                      {
3919
                        if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3920
                          rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3921
                        else if (rld[j].when_needed
3922
                                 == RELOAD_FOR_OUTADDR_ADDRESS)
3923
                          rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3924
                      }
3925
                  }
3926
              }
3927
          }
3928
        else if (goal_alternative_matched[i] == -1)
3929
          {
3930
            operand_reloadnum[i]
3931
              = push_reload ((modified[i] != RELOAD_WRITE
3932
                              ? recog_data.operand[i] : 0),
3933
                             (modified[i] != RELOAD_READ
3934
                              ? recog_data.operand[i] : 0),
3935
                             (modified[i] != RELOAD_WRITE
3936
                              ? recog_data.operand_loc[i] : 0),
3937
                             (modified[i] != RELOAD_READ
3938
                              ? recog_data.operand_loc[i] : 0),
3939
                             (enum reg_class) goal_alternative[i],
3940
                             (modified[i] == RELOAD_WRITE
3941
                              ? VOIDmode : operand_mode[i]),
3942
                             (modified[i] == RELOAD_READ
3943
                              ? VOIDmode : operand_mode[i]),
3944
                             (insn_code_number < 0 ? 0
3945
                              : insn_data[insn_code_number].operand[i].strict_low),
3946
                             0, i, operand_type[i]);
3947
          }
3948
        /* In a matching pair of operands, one must be input only
3949
           and the other must be output only.
3950
           Pass the input operand as IN and the other as OUT.  */
3951
        else if (modified[i] == RELOAD_READ
3952
                 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3953
          {
3954
            operand_reloadnum[i]
3955
              = push_reload (recog_data.operand[i],
3956
                             recog_data.operand[goal_alternative_matched[i]],
3957
                             recog_data.operand_loc[i],
3958
                             recog_data.operand_loc[goal_alternative_matched[i]],
3959
                             (enum reg_class) goal_alternative[i],
3960
                             operand_mode[i],
3961
                             operand_mode[goal_alternative_matched[i]],
3962
                             0, 0, i, RELOAD_OTHER);
3963
            operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3964
          }
3965
        else if (modified[i] == RELOAD_WRITE
3966
                 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3967
          {
3968
            operand_reloadnum[goal_alternative_matched[i]]
3969
              = push_reload (recog_data.operand[goal_alternative_matched[i]],
3970
                             recog_data.operand[i],
3971
                             recog_data.operand_loc[goal_alternative_matched[i]],
3972
                             recog_data.operand_loc[i],
3973
                             (enum reg_class) goal_alternative[i],
3974
                             operand_mode[goal_alternative_matched[i]],
3975
                             operand_mode[i],
3976
                             0, 0, i, RELOAD_OTHER);
3977
            operand_reloadnum[i] = output_reloadnum;
3978
          }
3979
        else
3980
          {
3981
            gcc_assert (insn_code_number < 0);
3982
            error_for_asm (insn, "inconsistent operand constraints "
3983
                           "in an %<asm%>");
3984
            /* Avoid further trouble with this insn.  */
3985
            PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3986
            n_reloads = 0;
3987
            return 0;
3988
          }
3989
      }
3990
    else if (goal_alternative_matched[i] < 0
3991
             && goal_alternative_matches[i] < 0
3992
             && address_operand_reloaded[i] != 1
3993
             && optimize)
3994
      {
3995
        /* For each non-matching operand that's a MEM or a pseudo-register
3996
           that didn't get a hard register, make an optional reload.
3997
           This may get done even if the insn needs no reloads otherwise.  */
3998
 
3999
        rtx operand = recog_data.operand[i];
4000
 
4001
        while (GET_CODE (operand) == SUBREG)
4002
          operand = SUBREG_REG (operand);
4003
        if ((MEM_P (operand)
4004
             || (REG_P (operand)
4005
                 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4006
            /* If this is only for an output, the optional reload would not
4007
               actually cause us to use a register now, just note that
4008
               something is stored here.  */
4009
            && ((enum reg_class) goal_alternative[i] != NO_REGS
4010
                || modified[i] == RELOAD_WRITE)
4011
            && ! no_input_reloads
4012
            /* An optional output reload might allow to delete INSN later.
4013
               We mustn't make in-out reloads on insns that are not permitted
4014
               output reloads.
4015
               If this is an asm, we can't delete it; we must not even call
4016
               push_reload for an optional output reload in this case,
4017
               because we can't be sure that the constraint allows a register,
4018
               and push_reload verifies the constraints for asms.  */
4019
            && (modified[i] == RELOAD_READ
4020
                || (! no_output_reloads && ! this_insn_is_asm)))
4021
          operand_reloadnum[i]
4022
            = push_reload ((modified[i] != RELOAD_WRITE
4023
                            ? recog_data.operand[i] : 0),
4024
                           (modified[i] != RELOAD_READ
4025
                            ? recog_data.operand[i] : 0),
4026
                           (modified[i] != RELOAD_WRITE
4027
                            ? recog_data.operand_loc[i] : 0),
4028
                           (modified[i] != RELOAD_READ
4029
                            ? recog_data.operand_loc[i] : 0),
4030
                           (enum reg_class) goal_alternative[i],
4031
                           (modified[i] == RELOAD_WRITE
4032
                            ? VOIDmode : operand_mode[i]),
4033
                           (modified[i] == RELOAD_READ
4034
                            ? VOIDmode : operand_mode[i]),
4035
                           (insn_code_number < 0 ? 0
4036
                            : insn_data[insn_code_number].operand[i].strict_low),
4037
                           1, i, operand_type[i]);
4038
        /* If a memory reference remains (either as a MEM or a pseudo that
4039
           did not get a hard register), yet we can't make an optional
4040
           reload, check if this is actually a pseudo register reference;
4041
           we then need to emit a USE and/or a CLOBBER so that reload
4042
           inheritance will do the right thing.  */
4043
        else if (replace
4044
                 && (MEM_P (operand)
4045
                     || (REG_P (operand)
4046
                         && REGNO (operand) >= FIRST_PSEUDO_REGISTER
4047
                         && reg_renumber [REGNO (operand)] < 0)))
4048
          {
4049
            operand = *recog_data.operand_loc[i];
4050
 
4051
            while (GET_CODE (operand) == SUBREG)
4052
              operand = SUBREG_REG (operand);
4053
            if (REG_P (operand))
4054
              {
4055
                if (modified[i] != RELOAD_WRITE)
4056
                  /* We mark the USE with QImode so that we recognize
4057
                     it as one that can be safely deleted at the end
4058
                     of reload.  */
4059
                  PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
4060
                                              insn), QImode);
4061
                if (modified[i] != RELOAD_READ)
4062
                  emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
4063
              }
4064
          }
4065
      }
4066
    else if (goal_alternative_matches[i] >= 0
4067
             && goal_alternative_win[goal_alternative_matches[i]]
4068
             && modified[i] == RELOAD_READ
4069
             && modified[goal_alternative_matches[i]] == RELOAD_WRITE
4070
             && ! no_input_reloads && ! no_output_reloads
4071
             && optimize)
4072
      {
4073
        /* Similarly, make an optional reload for a pair of matching
4074
           objects that are in MEM or a pseudo that didn't get a hard reg.  */
4075
 
4076
        rtx operand = recog_data.operand[i];
4077
 
4078
        while (GET_CODE (operand) == SUBREG)
4079
          operand = SUBREG_REG (operand);
4080
        if ((MEM_P (operand)
4081
             || (REG_P (operand)
4082
                 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4083
            && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
4084
                != NO_REGS))
4085
          operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4086
            = push_reload (recog_data.operand[goal_alternative_matches[i]],
4087
                           recog_data.operand[i],
4088
                           recog_data.operand_loc[goal_alternative_matches[i]],
4089
                           recog_data.operand_loc[i],
4090
                           (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4091
                           operand_mode[goal_alternative_matches[i]],
4092
                           operand_mode[i],
4093
                           0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4094
      }
4095
 
4096
  /* Perform whatever substitutions on the operands we are supposed
4097
     to make due to commutativity or replacement of registers
4098
     with equivalent constants or memory slots.  */
4099
 
4100
  for (i = 0; i < noperands; i++)
4101
    {
4102
      /* We only do this on the last pass through reload, because it is
4103
         possible for some data (like reg_equiv_address) to be changed during
4104
         later passes.  Moreover, we lose the opportunity to get a useful
4105
         reload_{in,out}_reg when we do these replacements.  */
4106
 
4107
      if (replace)
4108
        {
4109
          rtx substitution = substed_operand[i];
4110
 
4111
          *recog_data.operand_loc[i] = substitution;
4112
 
4113
          /* If we're replacing an operand with a LABEL_REF, we need
4114
             to make sure that there's a REG_LABEL note attached to
4115
             this instruction.  */
4116
          if (!JUMP_P (insn)
4117
              && GET_CODE (substitution) == LABEL_REF
4118
              && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
4119
            REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
4120
                                                  XEXP (substitution, 0),
4121
                                                  REG_NOTES (insn));
4122
        }
4123
      else
4124
        retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4125
    }
4126
 
4127
  /* If this insn pattern contains any MATCH_DUP's, make sure that
4128
     they will be substituted if the operands they match are substituted.
4129
     Also do now any substitutions we already did on the operands.
4130
 
4131
     Don't do this if we aren't making replacements because we might be
4132
     propagating things allocated by frame pointer elimination into places
4133
     it doesn't expect.  */
4134
 
4135
  if (insn_code_number >= 0 && replace)
4136
    for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4137
      {
4138
        int opno = recog_data.dup_num[i];
4139
        *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4140
        dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4141
      }
4142
 
4143
#if 0
4144
  /* This loses because reloading of prior insns can invalidate the equivalence
4145
     (or at least find_equiv_reg isn't smart enough to find it any more),
4146
     causing this insn to need more reload regs than it needed before.
4147
     It may be too late to make the reload regs available.
4148
     Now this optimization is done safely in choose_reload_regs.  */
4149
 
4150
  /* For each reload of a reg into some other class of reg,
4151
     search for an existing equivalent reg (same value now) in the right class.
4152
     We can use it as long as we don't need to change its contents.  */
4153
  for (i = 0; i < n_reloads; i++)
4154
    if (rld[i].reg_rtx == 0
4155
        && rld[i].in != 0
4156
        && REG_P (rld[i].in)
4157
        && rld[i].out == 0)
4158
      {
4159
        rld[i].reg_rtx
4160
          = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4161
                            static_reload_reg_p, 0, rld[i].inmode);
4162
        /* Prevent generation of insn to load the value
4163
           because the one we found already has the value.  */
4164
        if (rld[i].reg_rtx)
4165
          rld[i].in = rld[i].reg_rtx;
4166
      }
4167
#endif
4168
 
4169
  /* If we detected error and replaced asm instruction by USE, forget about the
4170
     reloads.  */
4171
  if (GET_CODE (PATTERN (insn)) == USE
4172
      && GET_CODE (XEXP (PATTERN (insn), 0)) == CONST_INT)
4173
    n_reloads = 0;
4174
 
4175
  /* Perhaps an output reload can be combined with another
4176
     to reduce needs by one.  */
4177
  if (!goal_earlyclobber)
4178
    combine_reloads ();
4179
 
4180
  /* If we have a pair of reloads for parts of an address, they are reloading
4181
     the same object, the operands themselves were not reloaded, and they
4182
     are for two operands that are supposed to match, merge the reloads and
4183
     change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS.  */
4184
 
4185
  for (i = 0; i < n_reloads; i++)
4186
    {
4187
      int k;
4188
 
4189
      for (j = i + 1; j < n_reloads; j++)
4190
        if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4191
             || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4192
             || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4193
             || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4194
            && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4195
                || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4196
                || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4197
                || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4198
            && rtx_equal_p (rld[i].in, rld[j].in)
4199
            && (operand_reloadnum[rld[i].opnum] < 0
4200
                || rld[operand_reloadnum[rld[i].opnum]].optional)
4201
            && (operand_reloadnum[rld[j].opnum] < 0
4202
                || rld[operand_reloadnum[rld[j].opnum]].optional)
4203
            && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4204
                || (goal_alternative_matches[rld[j].opnum]
4205
                    == rld[i].opnum)))
4206
          {
4207
            for (k = 0; k < n_replacements; k++)
4208
              if (replacements[k].what == j)
4209
                replacements[k].what = i;
4210
 
4211
            if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4212
                || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4213
              rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4214
            else
4215
              rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4216
            rld[j].in = 0;
4217
          }
4218
    }
4219
 
4220
  /* Scan all the reloads and update their type.
4221
     If a reload is for the address of an operand and we didn't reload
4222
     that operand, change the type.  Similarly, change the operand number
4223
     of a reload when two operands match.  If a reload is optional, treat it
4224
     as though the operand isn't reloaded.
4225
 
4226
     ??? This latter case is somewhat odd because if we do the optional
4227
     reload, it means the object is hanging around.  Thus we need only
4228
     do the address reload if the optional reload was NOT done.
4229
 
4230
     Change secondary reloads to be the address type of their operand, not
4231
     the normal type.
4232
 
4233
     If an operand's reload is now RELOAD_OTHER, change any
4234
     RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4235
     RELOAD_FOR_OTHER_ADDRESS.  */
4236
 
4237
  for (i = 0; i < n_reloads; i++)
4238
    {
4239
      if (rld[i].secondary_p
4240
          && rld[i].when_needed == operand_type[rld[i].opnum])
4241
        rld[i].when_needed = address_type[rld[i].opnum];
4242
 
4243
      if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4244
           || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4245
           || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4246
           || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4247
          && (operand_reloadnum[rld[i].opnum] < 0
4248
              || rld[operand_reloadnum[rld[i].opnum]].optional))
4249
        {
4250
          /* If we have a secondary reload to go along with this reload,
4251
             change its type to RELOAD_FOR_OPADDR_ADDR.  */
4252
 
4253
          if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4254
               || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4255
              && rld[i].secondary_in_reload != -1)
4256
            {
4257
              int secondary_in_reload = rld[i].secondary_in_reload;
4258
 
4259
              rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4260
 
4261
              /* If there's a tertiary reload we have to change it also.  */
4262
              if (secondary_in_reload > 0
4263
                  && rld[secondary_in_reload].secondary_in_reload != -1)
4264
                rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4265
                  = RELOAD_FOR_OPADDR_ADDR;
4266
            }
4267
 
4268
          if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4269
               || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4270
              && rld[i].secondary_out_reload != -1)
4271
            {
4272
              int secondary_out_reload = rld[i].secondary_out_reload;
4273
 
4274
              rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4275
 
4276
              /* If there's a tertiary reload we have to change it also.  */
4277
              if (secondary_out_reload
4278
                  && rld[secondary_out_reload].secondary_out_reload != -1)
4279
                rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4280
                  = RELOAD_FOR_OPADDR_ADDR;
4281
            }
4282
 
4283
          if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4284
              || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4285
            rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4286
          else
4287
            rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4288
        }
4289
 
4290
      if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4291
           || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4292
          && operand_reloadnum[rld[i].opnum] >= 0
4293
          && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4294
              == RELOAD_OTHER))
4295
        rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4296
 
4297
      if (goal_alternative_matches[rld[i].opnum] >= 0)
4298
        rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4299
    }
4300
 
4301
  /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4302
     If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4303
     reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4304
 
4305
     choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4306
     conflict with RELOAD_FOR_OPERAND_ADDRESS reloads.  This is true for a
4307
     single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4308
     However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4309
     then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4310
     RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4311
     This is complicated by the fact that a single operand can have more
4312
     than one RELOAD_FOR_OPERAND_ADDRESS reload.  It is very difficult to fix
4313
     choose_reload_regs without affecting code quality, and cases that
4314
     actually fail are extremely rare, so it turns out to be better to fix
4315
     the problem here by not generating cases that choose_reload_regs will
4316
     fail for.  */
4317
  /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4318
     RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4319
     a single operand.
4320
     We can reduce the register pressure by exploiting that a
4321
     RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4322
     does not conflict with any of them, if it is only used for the first of
4323
     the RELOAD_FOR_X_ADDRESS reloads.  */
4324
  {
4325
    int first_op_addr_num = -2;
4326
    int first_inpaddr_num[MAX_RECOG_OPERANDS];
4327
    int first_outpaddr_num[MAX_RECOG_OPERANDS];
4328
    int need_change = 0;
4329
    /* We use last_op_addr_reload and the contents of the above arrays
4330
       first as flags - -2 means no instance encountered, -1 means exactly
4331
       one instance encountered.
4332
       If more than one instance has been encountered, we store the reload
4333
       number of the first reload of the kind in question; reload numbers
4334
       are known to be non-negative.  */
4335
    for (i = 0; i < noperands; i++)
4336
      first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4337
    for (i = n_reloads - 1; i >= 0; i--)
4338
      {
4339
        switch (rld[i].when_needed)
4340
          {
4341
          case RELOAD_FOR_OPERAND_ADDRESS:
4342
            if (++first_op_addr_num >= 0)
4343
              {
4344
                first_op_addr_num = i;
4345
                need_change = 1;
4346
              }
4347
            break;
4348
          case RELOAD_FOR_INPUT_ADDRESS:
4349
            if (++first_inpaddr_num[rld[i].opnum] >= 0)
4350
              {
4351
                first_inpaddr_num[rld[i].opnum] = i;
4352
                need_change = 1;
4353
              }
4354
            break;
4355
          case RELOAD_FOR_OUTPUT_ADDRESS:
4356
            if (++first_outpaddr_num[rld[i].opnum] >= 0)
4357
              {
4358
                first_outpaddr_num[rld[i].opnum] = i;
4359
                need_change = 1;
4360
              }
4361
            break;
4362
          default:
4363
            break;
4364
          }
4365
      }
4366
 
4367
    if (need_change)
4368
      {
4369
        for (i = 0; i < n_reloads; i++)
4370
          {
4371
            int first_num;
4372
            enum reload_type type;
4373
 
4374
            switch (rld[i].when_needed)
4375
              {
4376
              case RELOAD_FOR_OPADDR_ADDR:
4377
                first_num = first_op_addr_num;
4378
                type = RELOAD_FOR_OPERAND_ADDRESS;
4379
                break;
4380
              case RELOAD_FOR_INPADDR_ADDRESS:
4381
                first_num = first_inpaddr_num[rld[i].opnum];
4382
                type = RELOAD_FOR_INPUT_ADDRESS;
4383
                break;
4384
              case RELOAD_FOR_OUTADDR_ADDRESS:
4385
                first_num = first_outpaddr_num[rld[i].opnum];
4386
                type = RELOAD_FOR_OUTPUT_ADDRESS;
4387
                break;
4388
              default:
4389
                continue;
4390
              }
4391
            if (first_num < 0)
4392
              continue;
4393
            else if (i > first_num)
4394
              rld[i].when_needed = type;
4395
            else
4396
              {
4397
                /* Check if the only TYPE reload that uses reload I is
4398
                   reload FIRST_NUM.  */
4399
                for (j = n_reloads - 1; j > first_num; j--)
4400
                  {
4401
                    if (rld[j].when_needed == type
4402
                        && (rld[i].secondary_p
4403
                            ? rld[j].secondary_in_reload == i
4404
                            : reg_mentioned_p (rld[i].in, rld[j].in)))
4405
                      {
4406
                        rld[i].when_needed = type;
4407
                        break;
4408
                      }
4409
                  }
4410
              }
4411
          }
4412
      }
4413
  }
4414
 
4415
  /* See if we have any reloads that are now allowed to be merged
4416
     because we've changed when the reload is needed to
4417
     RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS.  Only
4418
     check for the most common cases.  */
4419
 
4420
  for (i = 0; i < n_reloads; i++)
4421
    if (rld[i].in != 0 && rld[i].out == 0
4422
        && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4423
            || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4424
            || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4425
      for (j = 0; j < n_reloads; j++)
4426
        if (i != j && rld[j].in != 0 && rld[j].out == 0
4427
            && rld[j].when_needed == rld[i].when_needed
4428
            && MATCHES (rld[i].in, rld[j].in)
4429
            && rld[i].class == rld[j].class
4430
            && !rld[i].nocombine && !rld[j].nocombine
4431
            && rld[i].reg_rtx == rld[j].reg_rtx)
4432
          {
4433
            rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4434
            transfer_replacements (i, j);
4435
            rld[j].in = 0;
4436
          }
4437
 
4438
#ifdef HAVE_cc0
4439
  /* If we made any reloads for addresses, see if they violate a
4440
     "no input reloads" requirement for this insn.  But loads that we
4441
     do after the insn (such as for output addresses) are fine.  */
4442
  if (no_input_reloads)
4443
    for (i = 0; i < n_reloads; i++)
4444
      gcc_assert (rld[i].in == 0
4445
                  || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS
4446
                  || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS);
4447
#endif
4448
 
4449
  /* Compute reload_mode and reload_nregs.  */
4450
  for (i = 0; i < n_reloads; i++)
4451
    {
4452
      rld[i].mode
4453
        = (rld[i].inmode == VOIDmode
4454
           || (GET_MODE_SIZE (rld[i].outmode)
4455
               > GET_MODE_SIZE (rld[i].inmode)))
4456
          ? rld[i].outmode : rld[i].inmode;
4457
 
4458
      rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4459
    }
4460
 
4461
  /* Special case a simple move with an input reload and a
4462
     destination of a hard reg, if the hard reg is ok, use it.  */
4463
  for (i = 0; i < n_reloads; i++)
4464
    if (rld[i].when_needed == RELOAD_FOR_INPUT
4465
        && GET_CODE (PATTERN (insn)) == SET
4466
        && REG_P (SET_DEST (PATTERN (insn)))
4467
        && SET_SRC (PATTERN (insn)) == rld[i].in)
4468
      {
4469
        rtx dest = SET_DEST (PATTERN (insn));
4470
        unsigned int regno = REGNO (dest);
4471
 
4472
        if (regno < FIRST_PSEUDO_REGISTER
4473
            && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4474
            && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4475
          {
4476
            int nr = hard_regno_nregs[regno][rld[i].mode];
4477
            int ok = 1, nri;
4478
 
4479
            for (nri = 1; nri < nr; nri ++)
4480
              if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
4481
                ok = 0;
4482
 
4483
            if (ok)
4484
              rld[i].reg_rtx = dest;
4485
          }
4486
      }
4487
 
4488
  return retval;
4489
}
4490
 
4491
/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4492
   accepts a memory operand with constant address.  */
4493
 
4494
static int
4495
alternative_allows_memconst (const char *constraint, int altnum)
4496
{
4497
  int c;
4498
  /* Skip alternatives before the one requested.  */
4499
  while (altnum > 0)
4500
    {
4501
      while (*constraint++ != ',');
4502
      altnum--;
4503
    }
4504
  /* Scan the requested alternative for 'm' or 'o'.
4505
     If one of them is present, this alternative accepts memory constants.  */
4506
  for (; (c = *constraint) && c != ',' && c != '#';
4507
       constraint += CONSTRAINT_LEN (c, constraint))
4508
    if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c, constraint))
4509
      return 1;
4510
  return 0;
4511
}
4512
 
4513
/* Scan X for memory references and scan the addresses for reloading.
4514
   Also checks for references to "constant" regs that we want to eliminate
4515
   and replaces them with the values they stand for.
4516
   We may alter X destructively if it contains a reference to such.
4517
   If X is just a constant reg, we return the equivalent value
4518
   instead of X.
4519
 
4520
   IND_LEVELS says how many levels of indirect addressing this machine
4521
   supports.
4522
 
4523
   OPNUM and TYPE identify the purpose of the reload.
4524
 
4525
   IS_SET_DEST is true if X is the destination of a SET, which is not
4526
   appropriate to be replaced by a constant.
4527
 
4528
   INSN, if nonzero, is the insn in which we do the reload.  It is used
4529
   to determine if we may generate output reloads, and where to put USEs
4530
   for pseudos that we have to replace with stack slots.
4531
 
4532
   ADDRESS_RELOADED.  If nonzero, is a pointer to where we put the
4533
   result of find_reloads_address.  */
4534
 
4535
static rtx
4536
find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4537
                     int ind_levels, int is_set_dest, rtx insn,
4538
                     int *address_reloaded)
4539
{
4540
  RTX_CODE code = GET_CODE (x);
4541
 
4542
  const char *fmt = GET_RTX_FORMAT (code);
4543
  int i;
4544
  int copied;
4545
 
4546
  if (code == REG)
4547
    {
4548
      /* This code is duplicated for speed in find_reloads.  */
4549
      int regno = REGNO (x);
4550
      if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4551
        x = reg_equiv_constant[regno];
4552
#if 0
4553
      /*  This creates (subreg (mem...)) which would cause an unnecessary
4554
          reload of the mem.  */
4555
      else if (reg_equiv_mem[regno] != 0)
4556
        x = reg_equiv_mem[regno];
4557
#endif
4558
      else if (reg_equiv_memory_loc[regno]
4559
               && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4560
        {
4561
          rtx mem = make_memloc (x, regno);
4562
          if (reg_equiv_address[regno]
4563
              || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4564
            {
4565
              /* If this is not a toplevel operand, find_reloads doesn't see
4566
                 this substitution.  We have to emit a USE of the pseudo so
4567
                 that delete_output_reload can see it.  */
4568
              if (replace_reloads && recog_data.operand[opnum] != x)
4569
                /* We mark the USE with QImode so that we recognize it
4570
                   as one that can be safely deleted at the end of
4571
                   reload.  */
4572
                PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4573
                          QImode);
4574
              x = mem;
4575
              i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4576
                                        opnum, type, ind_levels, insn);
4577
              if (x != mem)
4578
                push_reg_equiv_alt_mem (regno, x);
4579
              if (address_reloaded)
4580
                *address_reloaded = i;
4581
            }
4582
        }
4583
      return x;
4584
    }
4585
  if (code == MEM)
4586
    {
4587
      rtx tem = x;
4588
 
4589
      i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4590
                                opnum, type, ind_levels, insn);
4591
      if (address_reloaded)
4592
        *address_reloaded = i;
4593
 
4594
      return tem;
4595
    }
4596
 
4597
  if (code == SUBREG && REG_P (SUBREG_REG (x)))
4598
    {
4599
      /* Check for SUBREG containing a REG that's equivalent to a
4600
         constant.  If the constant has a known value, truncate it
4601
         right now.  Similarly if we are extracting a single-word of a
4602
         multi-word constant.  If the constant is symbolic, allow it
4603
         to be substituted normally.  push_reload will strip the
4604
         subreg later.  The constant must not be VOIDmode, because we
4605
         will lose the mode of the register (this should never happen
4606
         because one of the cases above should handle it).  */
4607
 
4608
      int regno = REGNO (SUBREG_REG (x));
4609
      rtx tem;
4610
 
4611
      if (subreg_lowpart_p (x)
4612
          && regno >= FIRST_PSEUDO_REGISTER
4613
          && reg_renumber[regno] < 0
4614
          && reg_equiv_constant[regno] != 0
4615
          && (tem = gen_lowpart_common (GET_MODE (x),
4616
                                        reg_equiv_constant[regno])) != 0)
4617
        return tem;
4618
 
4619
      if (regno >= FIRST_PSEUDO_REGISTER
4620
          && reg_renumber[regno] < 0
4621
          && reg_equiv_constant[regno] != 0)
4622
        {
4623
          tem =
4624
            simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4625
                                 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4626
          gcc_assert (tem);
4627
          return tem;
4628
        }
4629
 
4630
      /* If the subreg contains a reg that will be converted to a mem,
4631
         convert the subreg to a narrower memref now.
4632
         Otherwise, we would get (subreg (mem ...) ...),
4633
         which would force reload of the mem.
4634
 
4635
         We also need to do this if there is an equivalent MEM that is
4636
         not offsettable.  In that case, alter_subreg would produce an
4637
         invalid address on big-endian machines.
4638
 
4639
         For machines that extend byte loads, we must not reload using
4640
         a wider mode if we have a paradoxical SUBREG.  find_reloads will
4641
         force a reload in that case.  So we should not do anything here.  */
4642
 
4643
      if (regno >= FIRST_PSEUDO_REGISTER
4644
#ifdef LOAD_EXTEND_OP
4645
               && (GET_MODE_SIZE (GET_MODE (x))
4646
                   <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4647
#endif
4648
               && (reg_equiv_address[regno] != 0
4649
                   || (reg_equiv_mem[regno] != 0
4650
                       && (! strict_memory_address_p (GET_MODE (x),
4651
                                                      XEXP (reg_equiv_mem[regno], 0))
4652
                           || ! offsettable_memref_p (reg_equiv_mem[regno])
4653
                           || num_not_at_initial_offset))))
4654
        x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4655
                                         insn);
4656
    }
4657
 
4658
  for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4659
    {
4660
      if (fmt[i] == 'e')
4661
        {
4662
          rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4663
                                              ind_levels, is_set_dest, insn,
4664
                                              address_reloaded);
4665
          /* If we have replaced a reg with it's equivalent memory loc -
4666
             that can still be handled here e.g. if it's in a paradoxical
4667
             subreg - we must make the change in a copy, rather than using
4668
             a destructive change.  This way, find_reloads can still elect
4669
             not to do the change.  */
4670
          if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4671
            {
4672
              x = shallow_copy_rtx (x);
4673
              copied = 1;
4674
            }
4675
          XEXP (x, i) = new_part;
4676
        }
4677
    }
4678
  return x;
4679
}
4680
 
4681
/* Return a mem ref for the memory equivalent of reg REGNO.
4682
   This mem ref is not shared with anything.  */
4683
 
4684
static rtx
4685
make_memloc (rtx ad, int regno)
4686
{
4687
  /* We must rerun eliminate_regs, in case the elimination
4688
     offsets have changed.  */
4689
  rtx tem
4690
    = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4691
 
4692
  /* If TEM might contain a pseudo, we must copy it to avoid
4693
     modifying it when we do the substitution for the reload.  */
4694
  if (rtx_varies_p (tem, 0))
4695
    tem = copy_rtx (tem);
4696
 
4697
  tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4698
  tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4699
 
4700
  /* Copy the result if it's still the same as the equivalence, to avoid
4701
     modifying it when we do the substitution for the reload.  */
4702
  if (tem == reg_equiv_memory_loc[regno])
4703
    tem = copy_rtx (tem);
4704
  return tem;
4705
}
4706
 
4707
/* Returns true if AD could be turned into a valid memory reference
4708
   to mode MODE by reloading the part pointed to by PART into a
4709
   register.  */
4710
 
4711
static int
4712
maybe_memory_address_p (enum machine_mode mode, rtx ad, rtx *part)
4713
{
4714
  int retv;
4715
  rtx tem = *part;
4716
  rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4717
 
4718
  *part = reg;
4719
  retv = memory_address_p (mode, ad);
4720
  *part = tem;
4721
 
4722
  return retv;
4723
}
4724
 
4725
/* Record all reloads needed for handling memory address AD
4726
   which appears in *LOC in a memory reference to mode MODE
4727
   which itself is found in location  *MEMREFLOC.
4728
   Note that we take shortcuts assuming that no multi-reg machine mode
4729
   occurs as part of an address.
4730
 
4731
   OPNUM and TYPE specify the purpose of this reload.
4732
 
4733
   IND_LEVELS says how many levels of indirect addressing this machine
4734
   supports.
4735
 
4736
   INSN, if nonzero, is the insn in which we do the reload.  It is used
4737
   to determine if we may generate output reloads, and where to put USEs
4738
   for pseudos that we have to replace with stack slots.
4739
 
4740
   Value is one if this address is reloaded or replaced as a whole; it is
4741
   zero if the top level of this address was not reloaded or replaced, and
4742
   it is -1 if it may or may not have been reloaded or replaced.
4743
 
4744
   Note that there is no verification that the address will be valid after
4745
   this routine does its work.  Instead, we rely on the fact that the address
4746
   was valid when reload started.  So we need only undo things that reload
4747
   could have broken.  These are wrong register types, pseudos not allocated
4748
   to a hard register, and frame pointer elimination.  */
4749
 
4750
static int
4751
find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4752
                      rtx *loc, int opnum, enum reload_type type,
4753
                      int ind_levels, rtx insn)
4754
{
4755
  int regno;
4756
  int removed_and = 0;
4757
  int op_index;
4758
  rtx tem;
4759
 
4760
  /* If the address is a register, see if it is a legitimate address and
4761
     reload if not.  We first handle the cases where we need not reload
4762
     or where we must reload in a non-standard way.  */
4763
 
4764
  if (REG_P (ad))
4765
    {
4766
      regno = REGNO (ad);
4767
 
4768
      /* If the register is equivalent to an invariant expression, substitute
4769
         the invariant, and eliminate any eliminable register references.  */
4770
      tem = reg_equiv_constant[regno];
4771
      if (tem != 0
4772
          && (tem = eliminate_regs (tem, mode, insn))
4773
          && strict_memory_address_p (mode, tem))
4774
        {
4775
          *loc = ad = tem;
4776
          return 0;
4777
        }
4778
 
4779
      tem = reg_equiv_memory_loc[regno];
4780
      if (tem != 0)
4781
        {
4782
          if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4783
            {
4784
              tem = make_memloc (ad, regno);
4785
              if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4786
                {
4787
                  rtx orig = tem;
4788
 
4789
                  find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4790
                                        &XEXP (tem, 0), opnum,
4791
                                        ADDR_TYPE (type), ind_levels, insn);
4792
                  if (tem != orig)
4793
                    push_reg_equiv_alt_mem (regno, tem);
4794
                }
4795
              /* We can avoid a reload if the register's equivalent memory
4796
                 expression is valid as an indirect memory address.
4797
                 But not all addresses are valid in a mem used as an indirect
4798
                 address: only reg or reg+constant.  */
4799
 
4800
              if (ind_levels > 0
4801
                  && strict_memory_address_p (mode, tem)
4802
                  && (REG_P (XEXP (tem, 0))
4803
                      || (GET_CODE (XEXP (tem, 0)) == PLUS
4804
                          && REG_P (XEXP (XEXP (tem, 0), 0))
4805
                          && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4806
                {
4807
                  /* TEM is not the same as what we'll be replacing the
4808
                     pseudo with after reload, put a USE in front of INSN
4809
                     in the final reload pass.  */
4810
                  if (replace_reloads
4811
                      && num_not_at_initial_offset
4812
                      && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4813
                    {
4814
                      *loc = tem;
4815
                      /* We mark the USE with QImode so that we
4816
                         recognize it as one that can be safely
4817
                         deleted at the end of reload.  */
4818
                      PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4819
                                                  insn), QImode);
4820
 
4821
                      /* This doesn't really count as replacing the address
4822
                         as a whole, since it is still a memory access.  */
4823
                    }
4824
                  return 0;
4825
                }
4826
              ad = tem;
4827
            }
4828
        }
4829
 
4830
      /* The only remaining case where we can avoid a reload is if this is a
4831
         hard register that is valid as a base register and which is not the
4832
         subject of a CLOBBER in this insn.  */
4833
 
4834
      else if (regno < FIRST_PSEUDO_REGISTER
4835
               && regno_ok_for_base_p (regno, mode, MEM, SCRATCH)
4836
               && ! regno_clobbered_p (regno, this_insn, mode, 0))
4837
        return 0;
4838
 
4839
      /* If we do not have one of the cases above, we must do the reload.  */
4840
      push_reload (ad, NULL_RTX, loc, (rtx*) 0, base_reg_class (mode, MEM, SCRATCH),
4841
                   GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4842
      return 1;
4843
    }
4844
 
4845
  if (strict_memory_address_p (mode, ad))
4846
    {
4847
      /* The address appears valid, so reloads are not needed.
4848
         But the address may contain an eliminable register.
4849
         This can happen because a machine with indirect addressing
4850
         may consider a pseudo register by itself a valid address even when
4851
         it has failed to get a hard reg.
4852
         So do a tree-walk to find and eliminate all such regs.  */
4853
 
4854
      /* But first quickly dispose of a common case.  */
4855
      if (GET_CODE (ad) == PLUS
4856
          && GET_CODE (XEXP (ad, 1)) == CONST_INT
4857
          && REG_P (XEXP (ad, 0))
4858
          && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4859
        return 0;
4860
 
4861
      subst_reg_equivs_changed = 0;
4862
      *loc = subst_reg_equivs (ad, insn);
4863
 
4864
      if (! subst_reg_equivs_changed)
4865
        return 0;
4866
 
4867
      /* Check result for validity after substitution.  */
4868
      if (strict_memory_address_p (mode, ad))
4869
        return 0;
4870
    }
4871
 
4872
#ifdef LEGITIMIZE_RELOAD_ADDRESS
4873
  do
4874
    {
4875
      if (memrefloc)
4876
        {
4877
          LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4878
                                     ind_levels, win);
4879
        }
4880
      break;
4881
    win:
4882
      *memrefloc = copy_rtx (*memrefloc);
4883
      XEXP (*memrefloc, 0) = ad;
4884
      move_replacements (&ad, &XEXP (*memrefloc, 0));
4885
      return -1;
4886
    }
4887
  while (0);
4888
#endif
4889
 
4890
  /* The address is not valid.  We have to figure out why.  First see if
4891
     we have an outer AND and remove it if so.  Then analyze what's inside.  */
4892
 
4893
  if (GET_CODE (ad) == AND)
4894
    {
4895
      removed_and = 1;
4896
      loc = &XEXP (ad, 0);
4897
      ad = *loc;
4898
    }
4899
 
4900
  /* One possibility for why the address is invalid is that it is itself
4901
     a MEM.  This can happen when the frame pointer is being eliminated, a
4902
     pseudo is not allocated to a hard register, and the offset between the
4903
     frame and stack pointers is not its initial value.  In that case the
4904
     pseudo will have been replaced by a MEM referring to the
4905
     stack pointer.  */
4906
  if (MEM_P (ad))
4907
    {
4908
      /* First ensure that the address in this MEM is valid.  Then, unless
4909
         indirect addresses are valid, reload the MEM into a register.  */
4910
      tem = ad;
4911
      find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4912
                            opnum, ADDR_TYPE (type),
4913
                            ind_levels == 0 ? 0 : ind_levels - 1, insn);
4914
 
4915
      /* If tem was changed, then we must create a new memory reference to
4916
         hold it and store it back into memrefloc.  */
4917
      if (tem != ad && memrefloc)
4918
        {
4919
          *memrefloc = copy_rtx (*memrefloc);
4920
          copy_replacements (tem, XEXP (*memrefloc, 0));
4921
          loc = &XEXP (*memrefloc, 0);
4922
          if (removed_and)
4923
            loc = &XEXP (*loc, 0);
4924
        }
4925
 
4926
      /* Check similar cases as for indirect addresses as above except
4927
         that we can allow pseudos and a MEM since they should have been
4928
         taken care of above.  */
4929
 
4930
      if (ind_levels == 0
4931
          || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4932
          || MEM_P (XEXP (tem, 0))
4933
          || ! (REG_P (XEXP (tem, 0))
4934
                || (GET_CODE (XEXP (tem, 0)) == PLUS
4935
                    && REG_P (XEXP (XEXP (tem, 0), 0))
4936
                    && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4937
        {
4938
          /* Must use TEM here, not AD, since it is the one that will
4939
             have any subexpressions reloaded, if needed.  */
4940
          push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4941
                       base_reg_class (mode, MEM, SCRATCH), GET_MODE (tem),
4942
                       VOIDmode, 0,
4943
                       0, opnum, type);
4944
          return ! removed_and;
4945
        }
4946
      else
4947
        return 0;
4948
    }
4949
 
4950
  /* If we have address of a stack slot but it's not valid because the
4951
     displacement is too large, compute the sum in a register.
4952
     Handle all base registers here, not just fp/ap/sp, because on some
4953
     targets (namely SH) we can also get too large displacements from
4954
     big-endian corrections.  */
4955
  else if (GET_CODE (ad) == PLUS
4956
           && REG_P (XEXP (ad, 0))
4957
           && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4958
           && GET_CODE (XEXP (ad, 1)) == CONST_INT
4959
           && regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, PLUS,
4960
                                   CONST_INT))
4961
 
4962
    {
4963
      /* Unshare the MEM rtx so we can safely alter it.  */
4964
      if (memrefloc)
4965
        {
4966
          *memrefloc = copy_rtx (*memrefloc);
4967
          loc = &XEXP (*memrefloc, 0);
4968
          if (removed_and)
4969
            loc = &XEXP (*loc, 0);
4970
        }
4971
 
4972
      if (double_reg_address_ok)
4973
        {
4974
          /* Unshare the sum as well.  */
4975
          *loc = ad = copy_rtx (ad);
4976
 
4977
          /* Reload the displacement into an index reg.
4978
             We assume the frame pointer or arg pointer is a base reg.  */
4979
          find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4980
                                     INDEX_REG_CLASS, GET_MODE (ad), opnum,
4981
                                     type, ind_levels);
4982
          return 0;
4983
        }
4984
      else
4985
        {
4986
          /* If the sum of two regs is not necessarily valid,
4987
             reload the sum into a base reg.
4988
             That will at least work.  */
4989
          find_reloads_address_part (ad, loc,
4990
                                     base_reg_class (mode, MEM, SCRATCH),
4991
                                     Pmode, opnum, type, ind_levels);
4992
        }
4993
      return ! removed_and;
4994
    }
4995
 
4996
  /* If we have an indexed stack slot, there are three possible reasons why
4997
     it might be invalid: The index might need to be reloaded, the address
4998
     might have been made by frame pointer elimination and hence have a
4999
     constant out of range, or both reasons might apply.
5000
 
5001
     We can easily check for an index needing reload, but even if that is the
5002
     case, we might also have an invalid constant.  To avoid making the
5003
     conservative assumption and requiring two reloads, we see if this address
5004
     is valid when not interpreted strictly.  If it is, the only problem is
5005
     that the index needs a reload and find_reloads_address_1 will take care
5006
     of it.
5007
 
5008
     Handle all base registers here, not just fp/ap/sp, because on some
5009
     targets (namely SPARC) we can also get invalid addresses from preventive
5010
     subreg big-endian corrections made by find_reloads_toplev.  We
5011
     can also get expressions involving LO_SUM (rather than PLUS) from
5012
     find_reloads_subreg_address.
5013
 
5014
     If we decide to do something, it must be that `double_reg_address_ok'
5015
     is true.  We generate a reload of the base register + constant and
5016
     rework the sum so that the reload register will be added to the index.
5017
     This is safe because we know the address isn't shared.
5018
 
5019
     We check for the base register as both the first and second operand of
5020
     the innermost PLUS and/or LO_SUM.  */
5021
 
5022
  for (op_index = 0; op_index < 2; ++op_index)
5023
    {
5024
      rtx operand, addend;
5025
      enum rtx_code inner_code;
5026
 
5027
      if (GET_CODE (ad) != PLUS)
5028
          continue;
5029
 
5030
      inner_code = GET_CODE (XEXP (ad, 0));
5031
      if (!(GET_CODE (ad) == PLUS
5032
            && GET_CODE (XEXP (ad, 1)) == CONST_INT
5033
            && (inner_code == PLUS || inner_code == LO_SUM)))
5034
        continue;
5035
 
5036
      operand = XEXP (XEXP (ad, 0), op_index);
5037
      if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
5038
        continue;
5039
 
5040
      addend = XEXP (XEXP (ad, 0), 1 - op_index);
5041
 
5042
      if ((regno_ok_for_base_p (REGNO (operand), mode, inner_code,
5043
                                GET_CODE (addend))
5044
           || operand == frame_pointer_rtx
5045
#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
5046
           || operand == hard_frame_pointer_rtx
5047
#endif
5048
#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5049
           || operand == arg_pointer_rtx
5050
#endif
5051
           || operand == stack_pointer_rtx)
5052
          && ! maybe_memory_address_p (mode, ad,
5053
                                       &XEXP (XEXP (ad, 0), 1 - op_index)))
5054
        {
5055
          rtx offset_reg;
5056
          enum reg_class cls;
5057
 
5058
          offset_reg = plus_constant (operand, INTVAL (XEXP (ad, 1)));
5059
 
5060
          /* Form the adjusted address.  */
5061
          if (GET_CODE (XEXP (ad, 0)) == PLUS)
5062
            ad = gen_rtx_PLUS (GET_MODE (ad),
5063
                               op_index == 0 ? offset_reg : addend,
5064
                               op_index == 0 ? addend : offset_reg);
5065
          else
5066
            ad = gen_rtx_LO_SUM (GET_MODE (ad),
5067
                                 op_index == 0 ? offset_reg : addend,
5068
                                 op_index == 0 ? addend : offset_reg);
5069
          *loc = ad;
5070
 
5071
          cls = base_reg_class (mode, MEM, GET_CODE (addend));
5072
          find_reloads_address_part (XEXP (ad, op_index),
5073
                                     &XEXP (ad, op_index), cls,
5074
                                     GET_MODE (ad), opnum, type, ind_levels);
5075
          find_reloads_address_1 (mode,
5076
                                  XEXP (ad, 1 - op_index), 1, GET_CODE (ad),
5077
                                  GET_CODE (XEXP (ad, op_index)),
5078
                                  &XEXP (ad, 1 - op_index), opnum,
5079
                                  type, 0, insn);
5080
 
5081
          return 0;
5082
        }
5083
    }
5084
 
5085
  /* See if address becomes valid when an eliminable register
5086
     in a sum is replaced.  */
5087
 
5088
  tem = ad;
5089
  if (GET_CODE (ad) == PLUS)
5090
    tem = subst_indexed_address (ad);
5091
  if (tem != ad && strict_memory_address_p (mode, tem))
5092
    {
5093
      /* Ok, we win that way.  Replace any additional eliminable
5094
         registers.  */
5095
 
5096
      subst_reg_equivs_changed = 0;
5097
      tem = subst_reg_equivs (tem, insn);
5098
 
5099
      /* Make sure that didn't make the address invalid again.  */
5100
 
5101
      if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
5102
        {
5103
          *loc = tem;
5104
          return 0;
5105
        }
5106
    }
5107
 
5108
  /* If constants aren't valid addresses, reload the constant address
5109
     into a register.  */
5110
  if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
5111
    {
5112
      /* If AD is an address in the constant pool, the MEM rtx may be shared.
5113
         Unshare it so we can safely alter it.  */
5114
      if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5115
          && CONSTANT_POOL_ADDRESS_P (ad))
5116
        {
5117
          *memrefloc = copy_rtx (*memrefloc);
5118
          loc = &XEXP (*memrefloc, 0);
5119
          if (removed_and)
5120
            loc = &XEXP (*loc, 0);
5121
        }
5122
 
5123
      find_reloads_address_part (ad, loc, base_reg_class (mode, MEM, SCRATCH),
5124
                                 Pmode, opnum, type, ind_levels);
5125
      return ! removed_and;
5126
    }
5127
 
5128
  return find_reloads_address_1 (mode, ad, 0, MEM, SCRATCH, loc, opnum, type,
5129
                                 ind_levels, insn);
5130
}
5131
 
5132
/* Find all pseudo regs appearing in AD
5133
   that are eliminable in favor of equivalent values
5134
   and do not have hard regs; replace them by their equivalents.
5135
   INSN, if nonzero, is the insn in which we do the reload.  We put USEs in
5136
   front of it for pseudos that we have to replace with stack slots.  */
5137
 
5138
static rtx
5139
subst_reg_equivs (rtx ad, rtx insn)
5140
{
5141
  RTX_CODE code = GET_CODE (ad);
5142
  int i;
5143
  const char *fmt;
5144
 
5145
  switch (code)
5146
    {
5147
    case HIGH:
5148
    case CONST_INT:
5149
    case CONST:
5150
    case CONST_DOUBLE:
5151
    case CONST_VECTOR:
5152
    case SYMBOL_REF:
5153
    case LABEL_REF:
5154
    case PC:
5155
    case CC0:
5156
      return ad;
5157
 
5158
    case REG:
5159
      {
5160
        int regno = REGNO (ad);
5161
 
5162
        if (reg_equiv_constant[regno] != 0)
5163
          {
5164
            subst_reg_equivs_changed = 1;
5165
            return reg_equiv_constant[regno];
5166
          }
5167
        if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5168
          {
5169
            rtx mem = make_memloc (ad, regno);
5170
            if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5171
              {
5172
                subst_reg_equivs_changed = 1;
5173
                /* We mark the USE with QImode so that we recognize it
5174
                   as one that can be safely deleted at the end of
5175
                   reload.  */
5176
                PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5177
                          QImode);
5178
                return mem;
5179
              }
5180
          }
5181
      }
5182
      return ad;
5183
 
5184
    case PLUS:
5185
      /* Quickly dispose of a common case.  */
5186
      if (XEXP (ad, 0) == frame_pointer_rtx
5187
          && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5188
        return ad;
5189
      break;
5190
 
5191
    default:
5192
      break;
5193
    }
5194
 
5195
  fmt = GET_RTX_FORMAT (code);
5196
  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5197
    if (fmt[i] == 'e')
5198
      XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5199
  return ad;
5200
}
5201
 
5202
/* Compute the sum of X and Y, making canonicalizations assumed in an
5203
   address, namely: sum constant integers, surround the sum of two
5204
   constants with a CONST, put the constant as the second operand, and
5205
   group the constant on the outermost sum.
5206
 
5207
   This routine assumes both inputs are already in canonical form.  */
5208
 
5209
rtx
5210
form_sum (rtx x, rtx y)
5211
{
5212
  rtx tem;
5213
  enum machine_mode mode = GET_MODE (x);
5214
 
5215
  if (mode == VOIDmode)
5216
    mode = GET_MODE (y);
5217
 
5218
  if (mode == VOIDmode)
5219
    mode = Pmode;
5220
 
5221
  if (GET_CODE (x) == CONST_INT)
5222
    return plus_constant (y, INTVAL (x));
5223
  else if (GET_CODE (y) == CONST_INT)
5224
    return plus_constant (x, INTVAL (y));
5225
  else if (CONSTANT_P (x))
5226
    tem = x, x = y, y = tem;
5227
 
5228
  if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5229
    return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5230
 
5231
  /* Note that if the operands of Y are specified in the opposite
5232
     order in the recursive calls below, infinite recursion will occur.  */
5233
  if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5234
    return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5235
 
5236
  /* If both constant, encapsulate sum.  Otherwise, just form sum.  A
5237
     constant will have been placed second.  */
5238
  if (CONSTANT_P (x) && CONSTANT_P (y))
5239
    {
5240
      if (GET_CODE (x) == CONST)
5241
        x = XEXP (x, 0);
5242
      if (GET_CODE (y) == CONST)
5243
        y = XEXP (y, 0);
5244
 
5245
      return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5246
    }
5247
 
5248
  return gen_rtx_PLUS (mode, x, y);
5249
}
5250
 
5251
/* If ADDR is a sum containing a pseudo register that should be
5252
   replaced with a constant (from reg_equiv_constant),
5253
   return the result of doing so, and also apply the associative
5254
   law so that the result is more likely to be a valid address.
5255
   (But it is not guaranteed to be one.)
5256
 
5257
   Note that at most one register is replaced, even if more are
5258
   replaceable.  Also, we try to put the result into a canonical form
5259
   so it is more likely to be a valid address.
5260
 
5261
   In all other cases, return ADDR.  */
5262
 
5263
static rtx
5264
subst_indexed_address (rtx addr)
5265
{
5266
  rtx op0 = 0, op1 = 0, op2 = 0;
5267
  rtx tem;
5268
  int regno;
5269
 
5270
  if (GET_CODE (addr) == PLUS)
5271
    {
5272
      /* Try to find a register to replace.  */
5273
      op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5274
      if (REG_P (op0)
5275
          && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5276
          && reg_renumber[regno] < 0
5277
          && reg_equiv_constant[regno] != 0)
5278
        op0 = reg_equiv_constant[regno];
5279
      else if (REG_P (op1)
5280
               && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5281
               && reg_renumber[regno] < 0
5282
               && reg_equiv_constant[regno] != 0)
5283
        op1 = reg_equiv_constant[regno];
5284
      else if (GET_CODE (op0) == PLUS
5285
               && (tem = subst_indexed_address (op0)) != op0)
5286
        op0 = tem;
5287
      else if (GET_CODE (op1) == PLUS
5288
               && (tem = subst_indexed_address (op1)) != op1)
5289
        op1 = tem;
5290
      else
5291
        return addr;
5292
 
5293
      /* Pick out up to three things to add.  */
5294
      if (GET_CODE (op1) == PLUS)
5295
        op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5296
      else if (GET_CODE (op0) == PLUS)
5297
        op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5298
 
5299
      /* Compute the sum.  */
5300
      if (op2 != 0)
5301
        op1 = form_sum (op1, op2);
5302
      if (op1 != 0)
5303
        op0 = form_sum (op0, op1);
5304
 
5305
      return op0;
5306
    }
5307
  return addr;
5308
}
5309
 
5310
/* Update the REG_INC notes for an insn.  It updates all REG_INC
5311
   notes for the instruction which refer to REGNO the to refer
5312
   to the reload number.
5313
 
5314
   INSN is the insn for which any REG_INC notes need updating.
5315
 
5316
   REGNO is the register number which has been reloaded.
5317
 
5318
   RELOADNUM is the reload number.  */
5319
 
5320
static void
5321
update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5322
                       int reloadnum ATTRIBUTE_UNUSED)
5323
{
5324
#ifdef AUTO_INC_DEC
5325
  rtx link;
5326
 
5327
  for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5328
    if (REG_NOTE_KIND (link) == REG_INC
5329
        && (int) REGNO (XEXP (link, 0)) == regno)
5330
      push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5331
#endif
5332
}
5333
 
5334
/* Record the pseudo registers we must reload into hard registers in a
5335
   subexpression of a would-be memory address, X referring to a value
5336
   in mode MODE.  (This function is not called if the address we find
5337
   is strictly valid.)
5338
 
5339
   CONTEXT = 1 means we are considering regs as index regs,
5340
   = 0 means we are considering them as base regs.
5341
   OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5342
   or an autoinc code.
5343
   If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5344
   is the code of the index part of the address.  Otherwise, pass SCRATCH
5345
   for this argument.
5346
   OPNUM and TYPE specify the purpose of any reloads made.
5347
 
5348
   IND_LEVELS says how many levels of indirect addressing are
5349
   supported at this point in the address.
5350
 
5351
   INSN, if nonzero, is the insn in which we do the reload.  It is used
5352
   to determine if we may generate output reloads.
5353
 
5354
   We return nonzero if X, as a whole, is reloaded or replaced.  */
5355
 
5356
/* Note that we take shortcuts assuming that no multi-reg machine mode
5357
   occurs as part of an address.
5358
   Also, this is not fully machine-customizable; it works for machines
5359
   such as VAXen and 68000's and 32000's, but other possible machines
5360
   could have addressing modes that this does not handle right.
5361
   If you add push_reload calls here, you need to make sure gen_reload
5362
   handles those cases gracefully.  */
5363
 
5364
static int
5365
find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5366
                        enum rtx_code outer_code, enum rtx_code index_code,
5367
                        rtx *loc, int opnum, enum reload_type type,
5368
                        int ind_levels, rtx insn)
5369
{
5370
#define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX)          \
5371
  ((CONTEXT) == 0                                                        \
5372
   ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX)                    \
5373
   : REGNO_OK_FOR_INDEX_P (REGNO))
5374
 
5375
  enum reg_class context_reg_class;
5376
  RTX_CODE code = GET_CODE (x);
5377
 
5378
  if (context == 1)
5379
    context_reg_class = INDEX_REG_CLASS;
5380
  else
5381
    context_reg_class = base_reg_class (mode, outer_code, index_code);
5382
 
5383
  switch (code)
5384
    {
5385
    case PLUS:
5386
      {
5387
        rtx orig_op0 = XEXP (x, 0);
5388
        rtx orig_op1 = XEXP (x, 1);
5389
        RTX_CODE code0 = GET_CODE (orig_op0);
5390
        RTX_CODE code1 = GET_CODE (orig_op1);
5391
        rtx op0 = orig_op0;
5392
        rtx op1 = orig_op1;
5393
 
5394
        if (GET_CODE (op0) == SUBREG)
5395
          {
5396
            op0 = SUBREG_REG (op0);
5397
            code0 = GET_CODE (op0);
5398
            if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5399
              op0 = gen_rtx_REG (word_mode,
5400
                                 (REGNO (op0) +
5401
                                  subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5402
                                                       GET_MODE (SUBREG_REG (orig_op0)),
5403
                                                       SUBREG_BYTE (orig_op0),
5404
                                                       GET_MODE (orig_op0))));
5405
          }
5406
 
5407
        if (GET_CODE (op1) == SUBREG)
5408
          {
5409
            op1 = SUBREG_REG (op1);
5410
            code1 = GET_CODE (op1);
5411
            if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5412
              /* ??? Why is this given op1's mode and above for
5413
                 ??? op0 SUBREGs we use word_mode?  */
5414
              op1 = gen_rtx_REG (GET_MODE (op1),
5415
                                 (REGNO (op1) +
5416
                                  subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5417
                                                       GET_MODE (SUBREG_REG (orig_op1)),
5418
                                                       SUBREG_BYTE (orig_op1),
5419
                                                       GET_MODE (orig_op1))));
5420
          }
5421
        /* Plus in the index register may be created only as a result of
5422
           register rematerialization for expression like &localvar*4.  Reload it.
5423
           It may be possible to combine the displacement on the outer level,
5424
           but it is probably not worthwhile to do so.  */
5425
        if (context == 1)
5426
          {
5427
            find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5428
                                  opnum, ADDR_TYPE (type), ind_levels, insn);
5429
            push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5430
                         context_reg_class,
5431
                         GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5432
            return 1;
5433
          }
5434
 
5435
        if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5436
            || code0 == ZERO_EXTEND || code1 == MEM)
5437
          {
5438
            find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5439
                                    &XEXP (x, 0), opnum, type, ind_levels,
5440
                                    insn);
5441
            find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5442
                                    &XEXP (x, 1), opnum, type, ind_levels,
5443
                                    insn);
5444
          }
5445
 
5446
        else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5447
                 || code1 == ZERO_EXTEND || code0 == MEM)
5448
          {
5449
            find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5450
                                    &XEXP (x, 0), opnum, type, ind_levels,
5451
                                    insn);
5452
            find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5453
                                    &XEXP (x, 1), opnum, type, ind_levels,
5454
                                    insn);
5455
          }
5456
 
5457
        else if (code0 == CONST_INT || code0 == CONST
5458
                 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5459
          find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5460
                                  &XEXP (x, 1), opnum, type, ind_levels,
5461
                                  insn);
5462
 
5463
        else if (code1 == CONST_INT || code1 == CONST
5464
                 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5465
          find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5466
                                  &XEXP (x, 0), opnum, type, ind_levels,
5467
                                  insn);
5468
 
5469
        else if (code0 == REG && code1 == REG)
5470
          {
5471
            if (REGNO_OK_FOR_INDEX_P (REGNO (op0))
5472
                && regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5473
              return 0;
5474
            else if (REGNO_OK_FOR_INDEX_P (REGNO (op1))
5475
                     && regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5476
              return 0;
5477
            else if (regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5478
              find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5479
                                      &XEXP (x, 0), opnum, type, ind_levels,
5480
                                      insn);
5481
            else if (regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5482
              find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5483
                                      &XEXP (x, 1), opnum, type, ind_levels,
5484
                                      insn);
5485
            else if (REGNO_OK_FOR_INDEX_P (REGNO (op1)))
5486
              find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5487
                                      &XEXP (x, 0), opnum, type, ind_levels,
5488
                                      insn);
5489
            else if (REGNO_OK_FOR_INDEX_P (REGNO (op0)))
5490
              find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5491
                                      &XEXP (x, 1), opnum, type, ind_levels,
5492
                                      insn);
5493
            else
5494
              {
5495
                find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5496
                                        &XEXP (x, 0), opnum, type, ind_levels,
5497
                                        insn);
5498
                find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5499
                                        &XEXP (x, 1), opnum, type, ind_levels,
5500
                                        insn);
5501
              }
5502
          }
5503
 
5504
        else if (code0 == REG)
5505
          {
5506
            find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5507
                                    &XEXP (x, 0), opnum, type, ind_levels,
5508
                                    insn);
5509
            find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5510
                                    &XEXP (x, 1), opnum, type, ind_levels,
5511
                                    insn);
5512
          }
5513
 
5514
        else if (code1 == REG)
5515
          {
5516
            find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5517
                                    &XEXP (x, 1), opnum, type, ind_levels,
5518
                                    insn);
5519
            find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5520
                                    &XEXP (x, 0), opnum, type, ind_levels,
5521
                                    insn);
5522
          }
5523
      }
5524
 
5525
      return 0;
5526
 
5527
    case POST_MODIFY:
5528
    case PRE_MODIFY:
5529
      {
5530
        rtx op0 = XEXP (x, 0);
5531
        rtx op1 = XEXP (x, 1);
5532
        enum rtx_code index_code;
5533
        int regno;
5534
        int reloadnum;
5535
 
5536
        if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5537
          return 0;
5538
 
5539
        /* Currently, we only support {PRE,POST}_MODIFY constructs
5540
           where a base register is {inc,dec}remented by the contents
5541
           of another register or by a constant value.  Thus, these
5542
           operands must match.  */
5543
        gcc_assert (op0 == XEXP (op1, 0));
5544
 
5545
        /* Require index register (or constant).  Let's just handle the
5546
           register case in the meantime... If the target allows
5547
           auto-modify by a constant then we could try replacing a pseudo
5548
           register with its equivalent constant where applicable.
5549
 
5550
           If we later decide to reload the whole PRE_MODIFY or
5551
           POST_MODIFY, inc_for_reload might clobber the reload register
5552
           before reading the index.  The index register might therefore
5553
           need to live longer than a TYPE reload normally would, so be
5554
           conservative and class it as RELOAD_OTHER.  */
5555
        if (REG_P (XEXP (op1, 1)))
5556
          if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5557
            find_reloads_address_1 (mode, XEXP (op1, 1), 1, code, SCRATCH,
5558
                                    &XEXP (op1, 1), opnum, RELOAD_OTHER,
5559
                                    ind_levels, insn);
5560
 
5561
        gcc_assert (REG_P (XEXP (op1, 0)));
5562
 
5563
        regno = REGNO (XEXP (op1, 0));
5564
        index_code = GET_CODE (XEXP (op1, 1));
5565
 
5566
        /* A register that is incremented cannot be constant!  */
5567
        gcc_assert (regno < FIRST_PSEUDO_REGISTER
5568
                    || reg_equiv_constant[regno] == 0);
5569
 
5570
        /* Handle a register that is equivalent to a memory location
5571
            which cannot be addressed directly.  */
5572
        if (reg_equiv_memory_loc[regno] != 0
5573
            && (reg_equiv_address[regno] != 0
5574
                || num_not_at_initial_offset))
5575
          {
5576
            rtx tem = make_memloc (XEXP (x, 0), regno);
5577
 
5578
            if (reg_equiv_address[regno]
5579
                || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5580
              {
5581
                rtx orig = tem;
5582
 
5583
                /* First reload the memory location's address.
5584
                    We can't use ADDR_TYPE (type) here, because we need to
5585
                    write back the value after reading it, hence we actually
5586
                    need two registers.  */
5587
                find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5588
                                      &XEXP (tem, 0), opnum,
5589
                                      RELOAD_OTHER,
5590
                                      ind_levels, insn);
5591
 
5592
                if (tem != orig)
5593
                  push_reg_equiv_alt_mem (regno, tem);
5594
 
5595
                /* Then reload the memory location into a base
5596
                   register.  */
5597
                reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5598
                                         &XEXP (op1, 0),
5599
                                         base_reg_class (mode, code,
5600
                                                         index_code),
5601
                                         GET_MODE (x), GET_MODE (x), 0,
5602
                                         0, opnum, RELOAD_OTHER);
5603
 
5604
                update_auto_inc_notes (this_insn, regno, reloadnum);
5605
                return 0;
5606
              }
5607
          }
5608
 
5609
        if (reg_renumber[regno] >= 0)
5610
          regno = reg_renumber[regno];
5611
 
5612
        /* We require a base register here...  */
5613
        if (!regno_ok_for_base_p (regno, GET_MODE (x), code, index_code))
5614
          {
5615
            reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5616
                                     &XEXP (op1, 0), &XEXP (x, 0),
5617
                                     base_reg_class (mode, code, index_code),
5618
                                     GET_MODE (x), GET_MODE (x), 0, 0,
5619
                                     opnum, RELOAD_OTHER);
5620
 
5621
            update_auto_inc_notes (this_insn, regno, reloadnum);
5622
            return 0;
5623
          }
5624
      }
5625
      return 0;
5626
 
5627
    case POST_INC:
5628
    case POST_DEC:
5629
    case PRE_INC:
5630
    case PRE_DEC:
5631
      if (REG_P (XEXP (x, 0)))
5632
        {
5633
          int regno = REGNO (XEXP (x, 0));
5634
          int value = 0;
5635
          rtx x_orig = x;
5636
 
5637
          /* A register that is incremented cannot be constant!  */
5638
          gcc_assert (regno < FIRST_PSEUDO_REGISTER
5639
                      || reg_equiv_constant[regno] == 0);
5640
 
5641
          /* Handle a register that is equivalent to a memory location
5642
             which cannot be addressed directly.  */
5643
          if (reg_equiv_memory_loc[regno] != 0
5644
              && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5645
            {
5646
              rtx tem = make_memloc (XEXP (x, 0), regno);
5647
              if (reg_equiv_address[regno]
5648
                  || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5649
                {
5650
                  rtx orig = tem;
5651
 
5652
                  /* First reload the memory location's address.
5653
                     We can't use ADDR_TYPE (type) here, because we need to
5654
                     write back the value after reading it, hence we actually
5655
                     need two registers.  */
5656
                  find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5657
                                        &XEXP (tem, 0), opnum, type,
5658
                                        ind_levels, insn);
5659
                  if (tem != orig)
5660
                    push_reg_equiv_alt_mem (regno, tem);
5661
                  /* Put this inside a new increment-expression.  */
5662
                  x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5663
                  /* Proceed to reload that, as if it contained a register.  */
5664
                }
5665
            }
5666
 
5667
          /* If we have a hard register that is ok as an index,
5668
             don't make a reload.  If an autoincrement of a nice register
5669
             isn't "valid", it must be that no autoincrement is "valid".
5670
             If that is true and something made an autoincrement anyway,
5671
             this must be a special context where one is allowed.
5672
             (For example, a "push" instruction.)
5673
             We can't improve this address, so leave it alone.  */
5674
 
5675
          /* Otherwise, reload the autoincrement into a suitable hard reg
5676
             and record how much to increment by.  */
5677
 
5678
          if (reg_renumber[regno] >= 0)
5679
            regno = reg_renumber[regno];
5680
          if (regno >= FIRST_PSEUDO_REGISTER
5681
              || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5682
                                      index_code))
5683
            {
5684
              int reloadnum;
5685
 
5686
              /* If we can output the register afterwards, do so, this
5687
                 saves the extra update.
5688
                 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5689
                 CALL_INSN - and it does not set CC0.
5690
                 But don't do this if we cannot directly address the
5691
                 memory location, since this will make it harder to
5692
                 reuse address reloads, and increases register pressure.
5693
                 Also don't do this if we can probably update x directly.  */
5694
              rtx equiv = (MEM_P (XEXP (x, 0))
5695
                           ? XEXP (x, 0)
5696
                           : reg_equiv_mem[regno]);
5697
              int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5698
              if (insn && NONJUMP_INSN_P (insn) && equiv
5699
                  && memory_operand (equiv, GET_MODE (equiv))
5700
#ifdef HAVE_cc0
5701
                  && ! sets_cc0_p (PATTERN (insn))
5702
#endif
5703
                  && ! (icode != CODE_FOR_nothing
5704
                        && ((*insn_data[icode].operand[0].predicate)
5705
                            (equiv, Pmode))
5706
                        && ((*insn_data[icode].operand[1].predicate)
5707
                            (equiv, Pmode))))
5708
                {
5709
                  /* We use the original pseudo for loc, so that
5710
                     emit_reload_insns() knows which pseudo this
5711
                     reload refers to and updates the pseudo rtx, not
5712
                     its equivalent memory location, as well as the
5713
                     corresponding entry in reg_last_reload_reg.  */
5714
                  loc = &XEXP (x_orig, 0);
5715
                  x = XEXP (x, 0);
5716
                  reloadnum
5717
                    = push_reload (x, x, loc, loc,
5718
                                   context_reg_class,
5719
                                   GET_MODE (x), GET_MODE (x), 0, 0,
5720
                                   opnum, RELOAD_OTHER);
5721
                }
5722
              else
5723
                {
5724
                  reloadnum
5725
                    = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5726
                                   context_reg_class,
5727
                                   GET_MODE (x), GET_MODE (x), 0, 0,
5728
                                   opnum, type);
5729
                  rld[reloadnum].inc
5730
                    = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5731
 
5732
                  value = 1;
5733
                }
5734
 
5735
              update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5736
                                     reloadnum);
5737
            }
5738
          return value;
5739
        }
5740
 
5741
      else if (MEM_P (XEXP (x, 0)))
5742
        {
5743
          /* This is probably the result of a substitution, by eliminate_regs,
5744
             of an equivalent address for a pseudo that was not allocated to a
5745
             hard register.  Verify that the specified address is valid and
5746
             reload it into a register.  */
5747
          /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE.  */
5748
          rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5749
          rtx link;
5750
          int reloadnum;
5751
 
5752
          /* Since we know we are going to reload this item, don't decrement
5753
             for the indirection level.
5754
 
5755
             Note that this is actually conservative:  it would be slightly
5756
             more efficient to use the value of SPILL_INDIRECT_LEVELS from
5757
             reload1.c here.  */
5758
          /* We can't use ADDR_TYPE (type) here, because we need to
5759
             write back the value after reading it, hence we actually
5760
             need two registers.  */
5761
          find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5762
                                XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5763
                                opnum, type, ind_levels, insn);
5764
 
5765
          reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5766
                                   context_reg_class,
5767
                                   GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5768
          rld[reloadnum].inc
5769
            = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5770
 
5771
          link = FIND_REG_INC_NOTE (this_insn, tem);
5772
          if (link != 0)
5773
            push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5774
 
5775
          return 1;
5776
        }
5777
      return 0;
5778
 
5779
    case TRUNCATE:
5780
    case SIGN_EXTEND:
5781
    case ZERO_EXTEND:
5782
      /* Look for parts to reload in the inner expression and reload them
5783
         too, in addition to this operation.  Reloading all inner parts in
5784
         addition to this one shouldn't be necessary, but at this point,
5785
         we don't know if we can possibly omit any part that *can* be
5786
         reloaded.  Targets that are better off reloading just either part
5787
         (or perhaps even a different part of an outer expression), should
5788
         define LEGITIMIZE_RELOAD_ADDRESS.  */
5789
      find_reloads_address_1 (GET_MODE (XEXP (x, 0)), XEXP (x, 0),
5790
                              context, code, SCRATCH, &XEXP (x, 0), opnum,
5791
                              type, ind_levels, insn);
5792
      push_reload (x, NULL_RTX, loc, (rtx*) 0,
5793
                   context_reg_class,
5794
                   GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5795
      return 1;
5796
 
5797
    case MEM:
5798
      /* This is probably the result of a substitution, by eliminate_regs, of
5799
         an equivalent address for a pseudo that was not allocated to a hard
5800
         register.  Verify that the specified address is valid and reload it
5801
         into a register.
5802
 
5803
         Since we know we are going to reload this item, don't decrement for
5804
         the indirection level.
5805
 
5806
         Note that this is actually conservative:  it would be slightly more
5807
         efficient to use the value of SPILL_INDIRECT_LEVELS from
5808
         reload1.c here.  */
5809
 
5810
      find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5811
                            opnum, ADDR_TYPE (type), ind_levels, insn);
5812
      push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5813
                   context_reg_class,
5814
                   GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5815
      return 1;
5816
 
5817
    case REG:
5818
      {
5819
        int regno = REGNO (x);
5820
 
5821
        if (reg_equiv_constant[regno] != 0)
5822
          {
5823
            find_reloads_address_part (reg_equiv_constant[regno], loc,
5824
                                       context_reg_class,
5825
                                       GET_MODE (x), opnum, type, ind_levels);
5826
            return 1;
5827
          }
5828
 
5829
#if 0 /* This might screw code in reload1.c to delete prior output-reload
5830
         that feeds this insn.  */
5831
        if (reg_equiv_mem[regno] != 0)
5832
          {
5833
            push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5834
                         context_reg_class,
5835
                         GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5836
            return 1;
5837
          }
5838
#endif
5839
 
5840
        if (reg_equiv_memory_loc[regno]
5841
            && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5842
          {
5843
            rtx tem = make_memloc (x, regno);
5844
            if (reg_equiv_address[regno] != 0
5845
                || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5846
              {
5847
                x = tem;
5848
                find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5849
                                      &XEXP (x, 0), opnum, ADDR_TYPE (type),
5850
                                      ind_levels, insn);
5851
                if (x != tem)
5852
                  push_reg_equiv_alt_mem (regno, x);
5853
              }
5854
          }
5855
 
5856
        if (reg_renumber[regno] >= 0)
5857
          regno = reg_renumber[regno];
5858
 
5859
        if (regno >= FIRST_PSEUDO_REGISTER
5860
            || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5861
                                    index_code))
5862
          {
5863
            push_reload (x, NULL_RTX, loc, (rtx*) 0,
5864
                         context_reg_class,
5865
                         GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5866
            return 1;
5867
          }
5868
 
5869
        /* If a register appearing in an address is the subject of a CLOBBER
5870
           in this insn, reload it into some other register to be safe.
5871
           The CLOBBER is supposed to make the register unavailable
5872
           from before this insn to after it.  */
5873
        if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5874
          {
5875
            push_reload (x, NULL_RTX, loc, (rtx*) 0,
5876
                         context_reg_class,
5877
                         GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5878
            return 1;
5879
          }
5880
      }
5881
      return 0;
5882
 
5883
    case SUBREG:
5884
      if (REG_P (SUBREG_REG (x)))
5885
        {
5886
          /* If this is a SUBREG of a hard register and the resulting register
5887
             is of the wrong class, reload the whole SUBREG.  This avoids
5888
             needless copies if SUBREG_REG is multi-word.  */
5889
          if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5890
            {
5891
              int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5892
 
5893
              if (!REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5894
                                       index_code))
5895
                {
5896
                  push_reload (x, NULL_RTX, loc, (rtx*) 0,
5897
                               context_reg_class,
5898
                               GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5899
                  return 1;
5900
                }
5901
            }
5902
          /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5903
             is larger than the class size, then reload the whole SUBREG.  */
5904
          else
5905
            {
5906
              enum reg_class class = context_reg_class;
5907
              if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5908
                  > reg_class_size[class])
5909
                {
5910
                  x = find_reloads_subreg_address (x, 0, opnum,
5911
                                                   ADDR_TYPE (type),
5912
                                                   ind_levels, insn);
5913
                  push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5914
                               GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5915
                  return 1;
5916
                }
5917
            }
5918
        }
5919
      break;
5920
 
5921
    default:
5922
      break;
5923
    }
5924
 
5925
  {
5926
    const char *fmt = GET_RTX_FORMAT (code);
5927
    int i;
5928
 
5929
    for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5930
      {
5931
        if (fmt[i] == 'e')
5932
          /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
5933
             we get here.  */
5934
          find_reloads_address_1 (mode, XEXP (x, i), context, code, SCRATCH,
5935
                                  &XEXP (x, i), opnum, type, ind_levels, insn);
5936
      }
5937
  }
5938
 
5939
#undef REG_OK_FOR_CONTEXT
5940
  return 0;
5941
}
5942
 
5943
/* X, which is found at *LOC, is a part of an address that needs to be
5944
   reloaded into a register of class CLASS.  If X is a constant, or if
5945
   X is a PLUS that contains a constant, check that the constant is a
5946
   legitimate operand and that we are supposed to be able to load
5947
   it into the register.
5948
 
5949
   If not, force the constant into memory and reload the MEM instead.
5950
 
5951
   MODE is the mode to use, in case X is an integer constant.
5952
 
5953
   OPNUM and TYPE describe the purpose of any reloads made.
5954
 
5955
   IND_LEVELS says how many levels of indirect addressing this machine
5956
   supports.  */
5957
 
5958
static void
5959
find_reloads_address_part (rtx x, rtx *loc, enum reg_class class,
5960
                           enum machine_mode mode, int opnum,
5961
                           enum reload_type type, int ind_levels)
5962
{
5963
  if (CONSTANT_P (x)
5964
      && (! LEGITIMATE_CONSTANT_P (x)
5965
          || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5966
    {
5967
      rtx tem;
5968
 
5969
      tem = x = force_const_mem (mode, x);
5970
      find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5971
                            opnum, type, ind_levels, 0);
5972
    }
5973
 
5974
  else if (GET_CODE (x) == PLUS
5975
           && CONSTANT_P (XEXP (x, 1))
5976
           && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5977
               || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5978
    {
5979
      rtx tem;
5980
 
5981
      tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5982
      x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5983
      find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5984
                            opnum, type, ind_levels, 0);
5985
    }
5986
 
5987
  push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5988
               mode, VOIDmode, 0, 0, opnum, type);
5989
}
5990
 
5991
/* X, a subreg of a pseudo, is a part of an address that needs to be
5992
   reloaded.
5993
 
5994
   If the pseudo is equivalent to a memory location that cannot be directly
5995
   addressed, make the necessary address reloads.
5996
 
5997
   If address reloads have been necessary, or if the address is changed
5998
   by register elimination, return the rtx of the memory location;
5999
   otherwise, return X.
6000
 
6001
   If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
6002
   memory location.
6003
 
6004
   OPNUM and TYPE identify the purpose of the reload.
6005
 
6006
   IND_LEVELS says how many levels of indirect addressing are
6007
   supported at this point in the address.
6008
 
6009
   INSN, if nonzero, is the insn in which we do the reload.  It is used
6010
   to determine where to put USEs for pseudos that we have to replace with
6011
   stack slots.  */
6012
 
6013
static rtx
6014
find_reloads_subreg_address (rtx x, int force_replace, int opnum,
6015
                             enum reload_type type, int ind_levels, rtx insn)
6016
{
6017
  int regno = REGNO (SUBREG_REG (x));
6018
 
6019
  if (reg_equiv_memory_loc[regno])
6020
    {
6021
      /* If the address is not directly addressable, or if the address is not
6022
         offsettable, then it must be replaced.  */
6023
      if (! force_replace
6024
          && (reg_equiv_address[regno]
6025
              || ! offsettable_memref_p (reg_equiv_mem[regno])))
6026
        force_replace = 1;
6027
 
6028
      if (force_replace || num_not_at_initial_offset)
6029
        {
6030
          rtx tem = make_memloc (SUBREG_REG (x), regno);
6031
 
6032
          /* If the address changes because of register elimination, then
6033
             it must be replaced.  */
6034
          if (force_replace
6035
              || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
6036
            {
6037
              unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
6038
              unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
6039
              int offset;
6040
              rtx orig = tem;
6041
              enum machine_mode orig_mode = GET_MODE (orig);
6042
              int reloaded;
6043
 
6044
              /* For big-endian paradoxical subregs, SUBREG_BYTE does not
6045
                 hold the correct (negative) byte offset.  */
6046
              if (BYTES_BIG_ENDIAN && outer_size > inner_size)
6047
                offset = inner_size - outer_size;
6048
              else
6049
                offset = SUBREG_BYTE (x);
6050
 
6051
              XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
6052
              PUT_MODE (tem, GET_MODE (x));
6053
 
6054
              /* If this was a paradoxical subreg that we replaced, the
6055
                 resulting memory must be sufficiently aligned to allow
6056
                 us to widen the mode of the memory.  */
6057
              if (outer_size > inner_size)
6058
                {
6059
                  rtx base;
6060
 
6061
                  base = XEXP (tem, 0);
6062
                  if (GET_CODE (base) == PLUS)
6063
                    {
6064
                      if (GET_CODE (XEXP (base, 1)) == CONST_INT
6065
                          && INTVAL (XEXP (base, 1)) % outer_size != 0)
6066
                        return x;
6067
                      base = XEXP (base, 0);
6068
                    }
6069
                  if (!REG_P (base)
6070
                      || (REGNO_POINTER_ALIGN (REGNO (base))
6071
                          < outer_size * BITS_PER_UNIT))
6072
                    return x;
6073
                }
6074
 
6075
              reloaded = find_reloads_address (GET_MODE (tem), &tem,
6076
                                               XEXP (tem, 0), &XEXP (tem, 0),
6077
                                               opnum, type, ind_levels, insn);
6078
              /* ??? Do we need to handle nonzero offsets somehow?  */
6079
              if (!offset && tem != orig)
6080
                push_reg_equiv_alt_mem (regno, tem);
6081
 
6082
              /* For some processors an address may be valid in the
6083
                 original mode but not in a smaller mode.  For
6084
                 example, ARM accepts a scaled index register in
6085
                 SImode but not in HImode.  find_reloads_address
6086
                 assumes that we pass it a valid address, and doesn't
6087
                 force a reload.  This will probably be fine if
6088
                 find_reloads_address finds some reloads.  But if it
6089
                 doesn't find any, then we may have just converted a
6090
                 valid address into an invalid one.  Check for that
6091
                 here.  */
6092
              if (reloaded != 1
6093
                  && strict_memory_address_p (orig_mode, XEXP (tem, 0))
6094
                  && !strict_memory_address_p (GET_MODE (tem),
6095
                                               XEXP (tem, 0)))
6096
                push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0,
6097
                             base_reg_class (GET_MODE (tem), MEM, SCRATCH),
6098
                             GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0,
6099
                             opnum, type);
6100
 
6101
              /* If this is not a toplevel operand, find_reloads doesn't see
6102
                 this substitution.  We have to emit a USE of the pseudo so
6103
                 that delete_output_reload can see it.  */
6104
              if (replace_reloads && recog_data.operand[opnum] != x)
6105
                /* We mark the USE with QImode so that we recognize it
6106
                   as one that can be safely deleted at the end of
6107
                   reload.  */
6108
                PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
6109
                                                         SUBREG_REG (x)),
6110
                                            insn), QImode);
6111
              x = tem;
6112
            }
6113
        }
6114
    }
6115
  return x;
6116
}
6117
 
6118
/* Substitute into the current INSN the registers into which we have reloaded
6119
   the things that need reloading.  The array `replacements'
6120
   contains the locations of all pointers that must be changed
6121
   and says what to replace them with.
6122
 
6123
   Return the rtx that X translates into; usually X, but modified.  */
6124
 
6125
void
6126
subst_reloads (rtx insn)
6127
{
6128
  int i;
6129
 
6130
  for (i = 0; i < n_replacements; i++)
6131
    {
6132
      struct replacement *r = &replacements[i];
6133
      rtx reloadreg = rld[r->what].reg_rtx;
6134
      if (reloadreg)
6135
        {
6136
#ifdef ENABLE_CHECKING
6137
          /* Internal consistency test.  Check that we don't modify
6138
             anything in the equivalence arrays.  Whenever something from
6139
             those arrays needs to be reloaded, it must be unshared before
6140
             being substituted into; the equivalence must not be modified.
6141
             Otherwise, if the equivalence is used after that, it will
6142
             have been modified, and the thing substituted (probably a
6143
             register) is likely overwritten and not a usable equivalence.  */
6144
          int check_regno;
6145
 
6146
          for (check_regno = 0; check_regno < max_regno; check_regno++)
6147
            {
6148
#define CHECK_MODF(ARRAY)                                               \
6149
              gcc_assert (!ARRAY[check_regno]                           \
6150
                          || !loc_mentioned_in_p (r->where,             \
6151
                                                  ARRAY[check_regno]))
6152
 
6153
              CHECK_MODF (reg_equiv_constant);
6154
              CHECK_MODF (reg_equiv_memory_loc);
6155
              CHECK_MODF (reg_equiv_address);
6156
              CHECK_MODF (reg_equiv_mem);
6157
#undef CHECK_MODF
6158
            }
6159
#endif /* ENABLE_CHECKING */
6160
 
6161
          /* If we're replacing a LABEL_REF with a register, add a
6162
             REG_LABEL note to indicate to flow which label this
6163
             register refers to.  */
6164
          if (GET_CODE (*r->where) == LABEL_REF
6165
              && JUMP_P (insn))
6166
            {
6167
              REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
6168
                                                    XEXP (*r->where, 0),
6169
                                                    REG_NOTES (insn));
6170
              JUMP_LABEL (insn) = XEXP (*r->where, 0);
6171
           }
6172
 
6173
          /* Encapsulate RELOADREG so its machine mode matches what
6174
             used to be there.  Note that gen_lowpart_common will
6175
             do the wrong thing if RELOADREG is multi-word.  RELOADREG
6176
             will always be a REG here.  */
6177
          if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6178
            reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6179
 
6180
          /* If we are putting this into a SUBREG and RELOADREG is a
6181
             SUBREG, we would be making nested SUBREGs, so we have to fix
6182
             this up.  Note that r->where == &SUBREG_REG (*r->subreg_loc).  */
6183
 
6184
          if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
6185
            {
6186
              if (GET_MODE (*r->subreg_loc)
6187
                  == GET_MODE (SUBREG_REG (reloadreg)))
6188
                *r->subreg_loc = SUBREG_REG (reloadreg);
6189
              else
6190
                {
6191
                  int final_offset =
6192
                    SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
6193
 
6194
                  /* When working with SUBREGs the rule is that the byte
6195
                     offset must be a multiple of the SUBREG's mode.  */
6196
                  final_offset = (final_offset /
6197
                                  GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6198
                  final_offset = (final_offset *
6199
                                  GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6200
 
6201
                  *r->where = SUBREG_REG (reloadreg);
6202
                  SUBREG_BYTE (*r->subreg_loc) = final_offset;
6203
                }
6204
            }
6205
          else
6206
            *r->where = reloadreg;
6207
        }
6208
      /* If reload got no reg and isn't optional, something's wrong.  */
6209
      else
6210
        gcc_assert (rld[r->what].optional);
6211
    }
6212
}
6213
 
6214
/* Make a copy of any replacements being done into X and move those
6215
   copies to locations in Y, a copy of X.  */
6216
 
6217
void
6218
copy_replacements (rtx x, rtx y)
6219
{
6220
  /* We can't support X being a SUBREG because we might then need to know its
6221
     location if something inside it was replaced.  */
6222
  gcc_assert (GET_CODE (x) != SUBREG);
6223
 
6224
  copy_replacements_1 (&x, &y, n_replacements);
6225
}
6226
 
6227
static void
6228
copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6229
{
6230
  int i, j;
6231
  rtx x, y;
6232
  struct replacement *r;
6233
  enum rtx_code code;
6234
  const char *fmt;
6235
 
6236
  for (j = 0; j < orig_replacements; j++)
6237
    {
6238
      if (replacements[j].subreg_loc == px)
6239
        {
6240
          r = &replacements[n_replacements++];
6241
          r->where = replacements[j].where;
6242
          r->subreg_loc = py;
6243
          r->what = replacements[j].what;
6244
          r->mode = replacements[j].mode;
6245
        }
6246
      else if (replacements[j].where == px)
6247
        {
6248
          r = &replacements[n_replacements++];
6249
          r->where = py;
6250
          r->subreg_loc = 0;
6251
          r->what = replacements[j].what;
6252
          r->mode = replacements[j].mode;
6253
        }
6254
    }
6255
 
6256
  x = *px;
6257
  y = *py;
6258
  code = GET_CODE (x);
6259
  fmt = GET_RTX_FORMAT (code);
6260
 
6261
  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6262
    {
6263
      if (fmt[i] == 'e')
6264
        copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6265
      else if (fmt[i] == 'E')
6266
        for (j = XVECLEN (x, i); --j >= 0; )
6267
          copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6268
                               orig_replacements);
6269
    }
6270
}
6271
 
6272
/* Change any replacements being done to *X to be done to *Y.  */
6273
 
6274
void
6275
move_replacements (rtx *x, rtx *y)
6276
{
6277
  int i;
6278
 
6279
  for (i = 0; i < n_replacements; i++)
6280
    if (replacements[i].subreg_loc == x)
6281
      replacements[i].subreg_loc = y;
6282
    else if (replacements[i].where == x)
6283
      {
6284
        replacements[i].where = y;
6285
        replacements[i].subreg_loc = 0;
6286
      }
6287
}
6288
 
6289
/* If LOC was scheduled to be replaced by something, return the replacement.
6290
   Otherwise, return *LOC.  */
6291
 
6292
rtx
6293
find_replacement (rtx *loc)
6294
{
6295
  struct replacement *r;
6296
 
6297
  for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6298
    {
6299
      rtx reloadreg = rld[r->what].reg_rtx;
6300
 
6301
      if (reloadreg && r->where == loc)
6302
        {
6303
          if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6304
            reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6305
 
6306
          return reloadreg;
6307
        }
6308
      else if (reloadreg && r->subreg_loc == loc)
6309
        {
6310
          /* RELOADREG must be either a REG or a SUBREG.
6311
 
6312
             ??? Is it actually still ever a SUBREG?  If so, why?  */
6313
 
6314
          if (REG_P (reloadreg))
6315
            return gen_rtx_REG (GET_MODE (*loc),
6316
                                (REGNO (reloadreg) +
6317
                                 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6318
                                                      GET_MODE (SUBREG_REG (*loc)),
6319
                                                      SUBREG_BYTE (*loc),
6320
                                                      GET_MODE (*loc))));
6321
          else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6322
            return reloadreg;
6323
          else
6324
            {
6325
              int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6326
 
6327
              /* When working with SUBREGs the rule is that the byte
6328
                 offset must be a multiple of the SUBREG's mode.  */
6329
              final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6330
              final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6331
              return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6332
                                     final_offset);
6333
            }
6334
        }
6335
    }
6336
 
6337
  /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6338
     what's inside and make a new rtl if so.  */
6339
  if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6340
      || GET_CODE (*loc) == MULT)
6341
    {
6342
      rtx x = find_replacement (&XEXP (*loc, 0));
6343
      rtx y = find_replacement (&XEXP (*loc, 1));
6344
 
6345
      if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6346
        return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6347
    }
6348
 
6349
  return *loc;
6350
}
6351
 
6352
/* Return nonzero if register in range [REGNO, ENDREGNO)
6353
   appears either explicitly or implicitly in X
6354
   other than being stored into (except for earlyclobber operands).
6355
 
6356
   References contained within the substructure at LOC do not count.
6357
   LOC may be zero, meaning don't ignore anything.
6358
 
6359
   This is similar to refers_to_regno_p in rtlanal.c except that we
6360
   look at equivalences for pseudos that didn't get hard registers.  */
6361
 
6362
static int
6363
refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6364
                              rtx x, rtx *loc)
6365
{
6366
  int i;
6367
  unsigned int r;
6368
  RTX_CODE code;
6369
  const char *fmt;
6370
 
6371
  if (x == 0)
6372
    return 0;
6373
 
6374
 repeat:
6375
  code = GET_CODE (x);
6376
 
6377
  switch (code)
6378
    {
6379
    case REG:
6380
      r = REGNO (x);
6381
 
6382
      /* If this is a pseudo, a hard register must not have been allocated.
6383
         X must therefore either be a constant or be in memory.  */
6384
      if (r >= FIRST_PSEUDO_REGISTER)
6385
        {
6386
          if (reg_equiv_memory_loc[r])
6387
            return refers_to_regno_for_reload_p (regno, endregno,
6388
                                                 reg_equiv_memory_loc[r],
6389
                                                 (rtx*) 0);
6390
 
6391
          gcc_assert (reg_equiv_constant[r] || reg_equiv_invariant[r]);
6392
          return 0;
6393
        }
6394
 
6395
      return (endregno > r
6396
              && regno < r + (r < FIRST_PSEUDO_REGISTER
6397
                              ? hard_regno_nregs[r][GET_MODE (x)]
6398
                              : 1));
6399
 
6400
    case SUBREG:
6401
      /* If this is a SUBREG of a hard reg, we can see exactly which
6402
         registers are being modified.  Otherwise, handle normally.  */
6403
      if (REG_P (SUBREG_REG (x))
6404
          && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6405
        {
6406
          unsigned int inner_regno = subreg_regno (x);
6407
          unsigned int inner_endregno
6408
            = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6409
                             ? hard_regno_nregs[inner_regno][GET_MODE (x)] : 1);
6410
 
6411
          return endregno > inner_regno && regno < inner_endregno;
6412
        }
6413
      break;
6414
 
6415
    case CLOBBER:
6416
    case SET:
6417
      if (&SET_DEST (x) != loc
6418
          /* Note setting a SUBREG counts as referring to the REG it is in for
6419
             a pseudo but not for hard registers since we can
6420
             treat each word individually.  */
6421
          && ((GET_CODE (SET_DEST (x)) == SUBREG
6422
               && loc != &SUBREG_REG (SET_DEST (x))
6423
               && REG_P (SUBREG_REG (SET_DEST (x)))
6424
               && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6425
               && refers_to_regno_for_reload_p (regno, endregno,
6426
                                                SUBREG_REG (SET_DEST (x)),
6427
                                                loc))
6428
              /* If the output is an earlyclobber operand, this is
6429
                 a conflict.  */
6430
              || ((!REG_P (SET_DEST (x))
6431
                   || earlyclobber_operand_p (SET_DEST (x)))
6432
                  && refers_to_regno_for_reload_p (regno, endregno,
6433
                                                   SET_DEST (x), loc))))
6434
        return 1;
6435
 
6436
      if (code == CLOBBER || loc == &SET_SRC (x))
6437
        return 0;
6438
      x = SET_SRC (x);
6439
      goto repeat;
6440
 
6441
    default:
6442
      break;
6443
    }
6444
 
6445
  /* X does not match, so try its subexpressions.  */
6446
 
6447
  fmt = GET_RTX_FORMAT (code);
6448
  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6449
    {
6450
      if (fmt[i] == 'e' && loc != &XEXP (x, i))
6451
        {
6452
          if (i == 0)
6453
            {
6454
              x = XEXP (x, 0);
6455
              goto repeat;
6456
            }
6457
          else
6458
            if (refers_to_regno_for_reload_p (regno, endregno,
6459
                                              XEXP (x, i), loc))
6460
              return 1;
6461
        }
6462
      else if (fmt[i] == 'E')
6463
        {
6464
          int j;
6465
          for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6466
            if (loc != &XVECEXP (x, i, j)
6467
                && refers_to_regno_for_reload_p (regno, endregno,
6468
                                                 XVECEXP (x, i, j), loc))
6469
              return 1;
6470
        }
6471
    }
6472
  return 0;
6473
}
6474
 
6475
/* Nonzero if modifying X will affect IN.  If X is a register or a SUBREG,
6476
   we check if any register number in X conflicts with the relevant register
6477
   numbers.  If X is a constant, return 0.  If X is a MEM, return 1 iff IN
6478
   contains a MEM (we don't bother checking for memory addresses that can't
6479
   conflict because we expect this to be a rare case.
6480
 
6481
   This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6482
   that we look at equivalences for pseudos that didn't get hard registers.  */
6483
 
6484
int
6485
reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6486
{
6487
  int regno, endregno;
6488
 
6489
  /* Overly conservative.  */
6490
  if (GET_CODE (x) == STRICT_LOW_PART
6491
      || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6492
    x = XEXP (x, 0);
6493
 
6494
  /* If either argument is a constant, then modifying X can not affect IN.  */
6495
  if (CONSTANT_P (x) || CONSTANT_P (in))
6496
    return 0;
6497
  else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == MEM)
6498
    return refers_to_mem_for_reload_p (in);
6499
  else if (GET_CODE (x) == SUBREG)
6500
    {
6501
      regno = REGNO (SUBREG_REG (x));
6502
      if (regno < FIRST_PSEUDO_REGISTER)
6503
        regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6504
                                      GET_MODE (SUBREG_REG (x)),
6505
                                      SUBREG_BYTE (x),
6506
                                      GET_MODE (x));
6507
    }
6508
  else if (REG_P (x))
6509
    {
6510
      regno = REGNO (x);
6511
 
6512
      /* If this is a pseudo, it must not have been assigned a hard register.
6513
         Therefore, it must either be in memory or be a constant.  */
6514
 
6515
      if (regno >= FIRST_PSEUDO_REGISTER)
6516
        {
6517
          if (reg_equiv_memory_loc[regno])
6518
            return refers_to_mem_for_reload_p (in);
6519
          gcc_assert (reg_equiv_constant[regno]);
6520
          return 0;
6521
        }
6522
    }
6523
  else if (MEM_P (x))
6524
    return refers_to_mem_for_reload_p (in);
6525
  else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6526
           || GET_CODE (x) == CC0)
6527
    return reg_mentioned_p (x, in);
6528
  else
6529
    {
6530
      gcc_assert (GET_CODE (x) == PLUS);
6531
 
6532
      /* We actually want to know if X is mentioned somewhere inside IN.
6533
         We must not say that (plus (sp) (const_int 124)) is in
6534
         (plus (sp) (const_int 64)), since that can lead to incorrect reload
6535
         allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6536
         into a RELOAD_OTHER on behalf of another RELOAD_OTHER.  */
6537
      while (MEM_P (in))
6538
        in = XEXP (in, 0);
6539
      if (REG_P (in))
6540
        return 0;
6541
      else if (GET_CODE (in) == PLUS)
6542
        return (rtx_equal_p (x, in)
6543
                || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6544
                || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6545
      else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6546
                   || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6547
    }
6548
 
6549
  endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6550
                      ? hard_regno_nregs[regno][GET_MODE (x)] : 1);
6551
 
6552
  return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6553
}
6554
 
6555
/* Return nonzero if anything in X contains a MEM.  Look also for pseudo
6556
   registers.  */
6557
 
6558
static int
6559
refers_to_mem_for_reload_p (rtx x)
6560
{
6561
  const char *fmt;
6562
  int i;
6563
 
6564
  if (MEM_P (x))
6565
    return 1;
6566
 
6567
  if (REG_P (x))
6568
    return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6569
            && reg_equiv_memory_loc[REGNO (x)]);
6570
 
6571
  fmt = GET_RTX_FORMAT (GET_CODE (x));
6572
  for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6573
    if (fmt[i] == 'e'
6574
        && (MEM_P (XEXP (x, i))
6575
            || refers_to_mem_for_reload_p (XEXP (x, i))))
6576
      return 1;
6577
 
6578
  return 0;
6579
}
6580
 
6581
/* Check the insns before INSN to see if there is a suitable register
6582
   containing the same value as GOAL.
6583
   If OTHER is -1, look for a register in class CLASS.
6584
   Otherwise, just see if register number OTHER shares GOAL's value.
6585
 
6586
   Return an rtx for the register found, or zero if none is found.
6587
 
6588
   If RELOAD_REG_P is (short *)1,
6589
   we reject any hard reg that appears in reload_reg_rtx
6590
   because such a hard reg is also needed coming into this insn.
6591
 
6592
   If RELOAD_REG_P is any other nonzero value,
6593
   it is a vector indexed by hard reg number
6594
   and we reject any hard reg whose element in the vector is nonnegative
6595
   as well as any that appears in reload_reg_rtx.
6596
 
6597
   If GOAL is zero, then GOALREG is a register number; we look
6598
   for an equivalent for that register.
6599
 
6600
   MODE is the machine mode of the value we want an equivalence for.
6601
   If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6602
 
6603
   This function is used by jump.c as well as in the reload pass.
6604
 
6605
   If GOAL is the sum of the stack pointer and a constant, we treat it
6606
   as if it were a constant except that sp is required to be unchanging.  */
6607
 
6608
rtx
6609
find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
6610
                short *reload_reg_p, int goalreg, enum machine_mode mode)
6611
{
6612
  rtx p = insn;
6613
  rtx goaltry, valtry, value, where;
6614
  rtx pat;
6615
  int regno = -1;
6616
  int valueno;
6617
  int goal_mem = 0;
6618
  int goal_const = 0;
6619
  int goal_mem_addr_varies = 0;
6620
  int need_stable_sp = 0;
6621
  int nregs;
6622
  int valuenregs;
6623
  int num = 0;
6624
 
6625
  if (goal == 0)
6626
    regno = goalreg;
6627
  else if (REG_P (goal))
6628
    regno = REGNO (goal);
6629
  else if (MEM_P (goal))
6630
    {
6631
      enum rtx_code code = GET_CODE (XEXP (goal, 0));
6632
      if (MEM_VOLATILE_P (goal))
6633
        return 0;
6634
      if (flag_float_store && SCALAR_FLOAT_MODE_P (GET_MODE (goal)))
6635
        return 0;
6636
      /* An address with side effects must be reexecuted.  */
6637
      switch (code)
6638
        {
6639
        case POST_INC:
6640
        case PRE_INC:
6641
        case POST_DEC:
6642
        case PRE_DEC:
6643
        case POST_MODIFY:
6644
        case PRE_MODIFY:
6645
          return 0;
6646
        default:
6647
          break;
6648
        }
6649
      goal_mem = 1;
6650
    }
6651
  else if (CONSTANT_P (goal))
6652
    goal_const = 1;
6653
  else if (GET_CODE (goal) == PLUS
6654
           && XEXP (goal, 0) == stack_pointer_rtx
6655
           && CONSTANT_P (XEXP (goal, 1)))
6656
    goal_const = need_stable_sp = 1;
6657
  else if (GET_CODE (goal) == PLUS
6658
           && XEXP (goal, 0) == frame_pointer_rtx
6659
           && CONSTANT_P (XEXP (goal, 1)))
6660
    goal_const = 1;
6661
  else
6662
    return 0;
6663
 
6664
  num = 0;
6665
  /* Scan insns back from INSN, looking for one that copies
6666
     a value into or out of GOAL.
6667
     Stop and give up if we reach a label.  */
6668
 
6669
  while (1)
6670
    {
6671
      p = PREV_INSN (p);
6672
      num++;
6673
      if (p == 0 || LABEL_P (p)
6674
          || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6675
        return 0;
6676
 
6677
      if (NONJUMP_INSN_P (p)
6678
          /* If we don't want spill regs ...  */
6679
          && (! (reload_reg_p != 0
6680
                 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6681
              /* ... then ignore insns introduced by reload; they aren't
6682
                 useful and can cause results in reload_as_needed to be
6683
                 different from what they were when calculating the need for
6684
                 spills.  If we notice an input-reload insn here, we will
6685
                 reject it below, but it might hide a usable equivalent.
6686
                 That makes bad code.  It may even fail: perhaps no reg was
6687
                 spilled for this insn because it was assumed we would find
6688
                 that equivalent.  */
6689
              || INSN_UID (p) < reload_first_uid))
6690
        {
6691
          rtx tem;
6692
          pat = single_set (p);
6693
 
6694
          /* First check for something that sets some reg equal to GOAL.  */
6695
          if (pat != 0
6696
              && ((regno >= 0
6697
                   && true_regnum (SET_SRC (pat)) == regno
6698
                   && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6699
                  ||
6700
                  (regno >= 0
6701
                   && true_regnum (SET_DEST (pat)) == regno
6702
                   && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6703
                  ||
6704
                  (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6705
                   /* When looking for stack pointer + const,
6706
                      make sure we don't use a stack adjust.  */
6707
                   && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6708
                   && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6709
                  || (goal_mem
6710
                      && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6711
                      && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6712
                  || (goal_mem
6713
                      && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6714
                      && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6715
                  /* If we are looking for a constant,
6716
                     and something equivalent to that constant was copied
6717
                     into a reg, we can use that reg.  */
6718
                  || (goal_const && REG_NOTES (p) != 0
6719
                      && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6720
                      && ((rtx_equal_p (XEXP (tem, 0), goal)
6721
                           && (valueno
6722
                               = true_regnum (valtry = SET_DEST (pat))) >= 0)
6723
                          || (REG_P (SET_DEST (pat))
6724
                              && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6725
                              && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6726
                              && GET_CODE (goal) == CONST_INT
6727
                              && 0 != (goaltry
6728
                                       = operand_subword (XEXP (tem, 0), 0, 0,
6729
                                                          VOIDmode))
6730
                              && rtx_equal_p (goal, goaltry)
6731
                              && (valtry
6732
                                  = operand_subword (SET_DEST (pat), 0, 0,
6733
                                                     VOIDmode))
6734
                              && (valueno = true_regnum (valtry)) >= 0)))
6735
                  || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6736
                                                          NULL_RTX))
6737
                      && REG_P (SET_DEST (pat))
6738
                      && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6739
                      && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6740
                      && GET_CODE (goal) == CONST_INT
6741
                      && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6742
                                                          VOIDmode))
6743
                      && rtx_equal_p (goal, goaltry)
6744
                      && (valtry
6745
                          = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6746
                      && (valueno = true_regnum (valtry)) >= 0)))
6747
            {
6748
              if (other >= 0)
6749
                {
6750
                  if (valueno != other)
6751
                    continue;
6752
                }
6753
              else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6754
                continue;
6755
              else
6756
                {
6757
                  int i;
6758
 
6759
                  for (i = hard_regno_nregs[valueno][mode] - 1; i >= 0; i--)
6760
                    if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6761
                                             valueno + i))
6762
                      break;
6763
                  if (i >= 0)
6764
                    continue;
6765
                }
6766
              value = valtry;
6767
              where = p;
6768
              break;
6769
            }
6770
        }
6771
    }
6772
 
6773
  /* We found a previous insn copying GOAL into a suitable other reg VALUE
6774
     (or copying VALUE into GOAL, if GOAL is also a register).
6775
     Now verify that VALUE is really valid.  */
6776
 
6777
  /* VALUENO is the register number of VALUE; a hard register.  */
6778
 
6779
  /* Don't try to re-use something that is killed in this insn.  We want
6780
     to be able to trust REG_UNUSED notes.  */
6781
  if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6782
    return 0;
6783
 
6784
  /* If we propose to get the value from the stack pointer or if GOAL is
6785
     a MEM based on the stack pointer, we need a stable SP.  */
6786
  if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6787
      || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6788
                                                          goal)))
6789
    need_stable_sp = 1;
6790
 
6791
  /* Reject VALUE if the copy-insn moved the wrong sort of datum.  */
6792
  if (GET_MODE (value) != mode)
6793
    return 0;
6794
 
6795
  /* Reject VALUE if it was loaded from GOAL
6796
     and is also a register that appears in the address of GOAL.  */
6797
 
6798
  if (goal_mem && value == SET_DEST (single_set (where))
6799
      && refers_to_regno_for_reload_p (valueno,
6800
                                       (valueno
6801
                                        + hard_regno_nregs[valueno][mode]),
6802
                                       goal, (rtx*) 0))
6803
    return 0;
6804
 
6805
  /* Reject registers that overlap GOAL.  */
6806
 
6807
  if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6808
    nregs = hard_regno_nregs[regno][mode];
6809
  else
6810
    nregs = 1;
6811
  valuenregs = hard_regno_nregs[valueno][mode];
6812
 
6813
  if (!goal_mem && !goal_const
6814
      && regno + nregs > valueno && regno < valueno + valuenregs)
6815
    return 0;
6816
 
6817
  /* Reject VALUE if it is one of the regs reserved for reloads.
6818
     Reload1 knows how to reuse them anyway, and it would get
6819
     confused if we allocated one without its knowledge.
6820
     (Now that insns introduced by reload are ignored above,
6821
     this case shouldn't happen, but I'm not positive.)  */
6822
 
6823
  if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6824
    {
6825
      int i;
6826
      for (i = 0; i < valuenregs; ++i)
6827
        if (reload_reg_p[valueno + i] >= 0)
6828
          return 0;
6829
    }
6830
 
6831
  /* Reject VALUE if it is a register being used for an input reload
6832
     even if it is not one of those reserved.  */
6833
 
6834
  if (reload_reg_p != 0)
6835
    {
6836
      int i;
6837
      for (i = 0; i < n_reloads; i++)
6838
        if (rld[i].reg_rtx != 0 && rld[i].in)
6839
          {
6840
            int regno1 = REGNO (rld[i].reg_rtx);
6841
            int nregs1 = hard_regno_nregs[regno1]
6842
                                         [GET_MODE (rld[i].reg_rtx)];
6843
            if (regno1 < valueno + valuenregs
6844
                && regno1 + nregs1 > valueno)
6845
              return 0;
6846
          }
6847
    }
6848
 
6849
  if (goal_mem)
6850
    /* We must treat frame pointer as varying here,
6851
       since it can vary--in a nonlocal goto as generated by expand_goto.  */
6852
    goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6853
 
6854
  /* Now verify that the values of GOAL and VALUE remain unaltered
6855
     until INSN is reached.  */
6856
 
6857
  p = insn;
6858
  while (1)
6859
    {
6860
      p = PREV_INSN (p);
6861
      if (p == where)
6862
        return value;
6863
 
6864
      /* Don't trust the conversion past a function call
6865
         if either of the two is in a call-clobbered register, or memory.  */
6866
      if (CALL_P (p))
6867
        {
6868
          int i;
6869
 
6870
          if (goal_mem || need_stable_sp)
6871
            return 0;
6872
 
6873
          if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6874
            for (i = 0; i < nregs; ++i)
6875
              if (call_used_regs[regno + i]
6876
                  || HARD_REGNO_CALL_PART_CLOBBERED (regno + i, mode))
6877
                return 0;
6878
 
6879
          if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6880
            for (i = 0; i < valuenregs; ++i)
6881
              if (call_used_regs[valueno + i]
6882
                  || HARD_REGNO_CALL_PART_CLOBBERED (valueno + i, mode))
6883
                return 0;
6884
        }
6885
 
6886
      if (INSN_P (p))
6887
        {
6888
          pat = PATTERN (p);
6889
 
6890
          /* Watch out for unspec_volatile, and volatile asms.  */
6891
          if (volatile_insn_p (pat))
6892
            return 0;
6893
 
6894
          /* If this insn P stores in either GOAL or VALUE, return 0.
6895
             If GOAL is a memory ref and this insn writes memory, return 0.
6896
             If GOAL is a memory ref and its address is not constant,
6897
             and this insn P changes a register used in GOAL, return 0.  */
6898
 
6899
          if (GET_CODE (pat) == COND_EXEC)
6900
            pat = COND_EXEC_CODE (pat);
6901
          if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6902
            {
6903
              rtx dest = SET_DEST (pat);
6904
              while (GET_CODE (dest) == SUBREG
6905
                     || GET_CODE (dest) == ZERO_EXTRACT
6906
                     || GET_CODE (dest) == STRICT_LOW_PART)
6907
                dest = XEXP (dest, 0);
6908
              if (REG_P (dest))
6909
                {
6910
                  int xregno = REGNO (dest);
6911
                  int xnregs;
6912
                  if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6913
                    xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6914
                  else
6915
                    xnregs = 1;
6916
                  if (xregno < regno + nregs && xregno + xnregs > regno)
6917
                    return 0;
6918
                  if (xregno < valueno + valuenregs
6919
                      && xregno + xnregs > valueno)
6920
                    return 0;
6921
                  if (goal_mem_addr_varies
6922
                      && reg_overlap_mentioned_for_reload_p (dest, goal))
6923
                    return 0;
6924
                  if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6925
                    return 0;
6926
                }
6927
              else if (goal_mem && MEM_P (dest)
6928
                       && ! push_operand (dest, GET_MODE (dest)))
6929
                return 0;
6930
              else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6931
                       && reg_equiv_memory_loc[regno] != 0)
6932
                return 0;
6933
              else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6934
                return 0;
6935
            }
6936
          else if (GET_CODE (pat) == PARALLEL)
6937
            {
6938
              int i;
6939
              for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6940
                {
6941
                  rtx v1 = XVECEXP (pat, 0, i);
6942
                  if (GET_CODE (v1) == COND_EXEC)
6943
                    v1 = COND_EXEC_CODE (v1);
6944
                  if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6945
                    {
6946
                      rtx dest = SET_DEST (v1);
6947
                      while (GET_CODE (dest) == SUBREG
6948
                             || GET_CODE (dest) == ZERO_EXTRACT
6949
                             || GET_CODE (dest) == STRICT_LOW_PART)
6950
                        dest = XEXP (dest, 0);
6951
                      if (REG_P (dest))
6952
                        {
6953
                          int xregno = REGNO (dest);
6954
                          int xnregs;
6955
                          if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6956
                            xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6957
                          else
6958
                            xnregs = 1;
6959
                          if (xregno < regno + nregs
6960
                              && xregno + xnregs > regno)
6961
                            return 0;
6962
                          if (xregno < valueno + valuenregs
6963
                              && xregno + xnregs > valueno)
6964
                            return 0;
6965
                          if (goal_mem_addr_varies
6966
                              && reg_overlap_mentioned_for_reload_p (dest,
6967
                                                                     goal))
6968
                            return 0;
6969
                          if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6970
                            return 0;
6971
                        }
6972
                      else if (goal_mem && MEM_P (dest)
6973
                               && ! push_operand (dest, GET_MODE (dest)))
6974
                        return 0;
6975
                      else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6976
                               && reg_equiv_memory_loc[regno] != 0)
6977
                        return 0;
6978
                      else if (need_stable_sp
6979
                               && push_operand (dest, GET_MODE (dest)))
6980
                        return 0;
6981
                    }
6982
                }
6983
            }
6984
 
6985
          if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
6986
            {
6987
              rtx link;
6988
 
6989
              for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6990
                   link = XEXP (link, 1))
6991
                {
6992
                  pat = XEXP (link, 0);
6993
                  if (GET_CODE (pat) == CLOBBER)
6994
                    {
6995
                      rtx dest = SET_DEST (pat);
6996
 
6997
                      if (REG_P (dest))
6998
                        {
6999
                          int xregno = REGNO (dest);
7000
                          int xnregs
7001
                            = hard_regno_nregs[xregno][GET_MODE (dest)];
7002
 
7003
                          if (xregno < regno + nregs
7004
                              && xregno + xnregs > regno)
7005
                            return 0;
7006
                          else if (xregno < valueno + valuenregs
7007
                                   && xregno + xnregs > valueno)
7008
                            return 0;
7009
                          else if (goal_mem_addr_varies
7010
                                   && reg_overlap_mentioned_for_reload_p (dest,
7011
                                                                     goal))
7012
                            return 0;
7013
                        }
7014
 
7015
                      else if (goal_mem && MEM_P (dest)
7016
                               && ! push_operand (dest, GET_MODE (dest)))
7017
                        return 0;
7018
                      else if (need_stable_sp
7019
                               && push_operand (dest, GET_MODE (dest)))
7020
                        return 0;
7021
                    }
7022
                }
7023
            }
7024
 
7025
#ifdef AUTO_INC_DEC
7026
          /* If this insn auto-increments or auto-decrements
7027
             either regno or valueno, return 0 now.
7028
             If GOAL is a memory ref and its address is not constant,
7029
             and this insn P increments a register used in GOAL, return 0.  */
7030
          {
7031
            rtx link;
7032
 
7033
            for (link = REG_NOTES (p); link; link = XEXP (link, 1))
7034
              if (REG_NOTE_KIND (link) == REG_INC
7035
                  && REG_P (XEXP (link, 0)))
7036
                {
7037
                  int incno = REGNO (XEXP (link, 0));
7038
                  if (incno < regno + nregs && incno >= regno)
7039
                    return 0;
7040
                  if (incno < valueno + valuenregs && incno >= valueno)
7041
                    return 0;
7042
                  if (goal_mem_addr_varies
7043
                      && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
7044
                                                             goal))
7045
                    return 0;
7046
                }
7047
          }
7048
#endif
7049
        }
7050
    }
7051
}
7052
 
7053
/* Find a place where INCED appears in an increment or decrement operator
7054
   within X, and return the amount INCED is incremented or decremented by.
7055
   The value is always positive.  */
7056
 
7057
static int
7058
find_inc_amount (rtx x, rtx inced)
7059
{
7060
  enum rtx_code code = GET_CODE (x);
7061
  const char *fmt;
7062
  int i;
7063
 
7064
  if (code == MEM)
7065
    {
7066
      rtx addr = XEXP (x, 0);
7067
      if ((GET_CODE (addr) == PRE_DEC
7068
           || GET_CODE (addr) == POST_DEC
7069
           || GET_CODE (addr) == PRE_INC
7070
           || GET_CODE (addr) == POST_INC)
7071
          && XEXP (addr, 0) == inced)
7072
        return GET_MODE_SIZE (GET_MODE (x));
7073
      else if ((GET_CODE (addr) == PRE_MODIFY
7074
                || GET_CODE (addr) == POST_MODIFY)
7075
               && GET_CODE (XEXP (addr, 1)) == PLUS
7076
               && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
7077
               && XEXP (addr, 0) == inced
7078
               && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
7079
        {
7080
          i = INTVAL (XEXP (XEXP (addr, 1), 1));
7081
          return i < 0 ? -i : i;
7082
        }
7083
    }
7084
 
7085
  fmt = GET_RTX_FORMAT (code);
7086
  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7087
    {
7088
      if (fmt[i] == 'e')
7089
        {
7090
          int tem = find_inc_amount (XEXP (x, i), inced);
7091
          if (tem != 0)
7092
            return tem;
7093
        }
7094
      if (fmt[i] == 'E')
7095
        {
7096
          int j;
7097
          for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7098
            {
7099
              int tem = find_inc_amount (XVECEXP (x, i, j), inced);
7100
              if (tem != 0)
7101
                return tem;
7102
            }
7103
        }
7104
    }
7105
 
7106
  return 0;
7107
}
7108
 
7109
/* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7110
   REG_INC note in insn INSN.  REGNO must refer to a hard register.  */
7111
 
7112
#ifdef AUTO_INC_DEC
7113
static int
7114
reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
7115
                           rtx insn)
7116
{
7117
  rtx link;
7118
 
7119
  gcc_assert (insn);
7120
 
7121
  if (! INSN_P (insn))
7122
    return 0;
7123
 
7124
  for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
7125
    if (REG_NOTE_KIND (link) == REG_INC)
7126
      {
7127
        unsigned int test = (int) REGNO (XEXP (link, 0));
7128
        if (test >= regno && test < endregno)
7129
          return 1;
7130
      }
7131
  return 0;
7132
}
7133
#else
7134
 
7135
#define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7136
 
7137
#endif 
7138
 
7139
/* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7140
   If SETS is 1, also consider SETs.  If SETS is 2, enable checking
7141
   REG_INC.  REGNO must refer to a hard register.  */
7142
 
7143
int
7144
regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
7145
                   int sets)
7146
{
7147
  unsigned int nregs, endregno;
7148
 
7149
  /* regno must be a hard register.  */
7150
  gcc_assert (regno < FIRST_PSEUDO_REGISTER);
7151
 
7152
  nregs = hard_regno_nregs[regno][mode];
7153
  endregno = regno + nregs;
7154
 
7155
  if ((GET_CODE (PATTERN (insn)) == CLOBBER
7156
       || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7157
      && REG_P (XEXP (PATTERN (insn), 0)))
7158
    {
7159
      unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
7160
 
7161
      return test >= regno && test < endregno;
7162
    }
7163
 
7164
  if (sets == 2 && reg_inc_found_and_valid_p (regno, endregno, insn))
7165
    return 1;
7166
 
7167
  if (GET_CODE (PATTERN (insn)) == PARALLEL)
7168
    {
7169
      int i = XVECLEN (PATTERN (insn), 0) - 1;
7170
 
7171
      for (; i >= 0; i--)
7172
        {
7173
          rtx elt = XVECEXP (PATTERN (insn), 0, i);
7174
          if ((GET_CODE (elt) == CLOBBER
7175
               || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7176
              && REG_P (XEXP (elt, 0)))
7177
            {
7178
              unsigned int test = REGNO (XEXP (elt, 0));
7179
 
7180
              if (test >= regno && test < endregno)
7181
                return 1;
7182
            }
7183
          if (sets == 2
7184
              && reg_inc_found_and_valid_p (regno, endregno, elt))
7185
            return 1;
7186
        }
7187
    }
7188
 
7189
  return 0;
7190
}
7191
 
7192
/* Find the low part, with mode MODE, of a hard regno RELOADREG.  */
7193
rtx
7194
reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
7195
{
7196
  int regno;
7197
 
7198
  if (GET_MODE (reloadreg) == mode)
7199
    return reloadreg;
7200
 
7201
  regno = REGNO (reloadreg);
7202
 
7203
  if (WORDS_BIG_ENDIAN)
7204
    regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
7205
      - (int) hard_regno_nregs[regno][mode];
7206
 
7207
  return gen_rtx_REG (mode, regno);
7208
}
7209
 
7210
static const char *const reload_when_needed_name[] =
7211
{
7212
  "RELOAD_FOR_INPUT",
7213
  "RELOAD_FOR_OUTPUT",
7214
  "RELOAD_FOR_INSN",
7215
  "RELOAD_FOR_INPUT_ADDRESS",
7216
  "RELOAD_FOR_INPADDR_ADDRESS",
7217
  "RELOAD_FOR_OUTPUT_ADDRESS",
7218
  "RELOAD_FOR_OUTADDR_ADDRESS",
7219
  "RELOAD_FOR_OPERAND_ADDRESS",
7220
  "RELOAD_FOR_OPADDR_ADDR",
7221
  "RELOAD_OTHER",
7222
  "RELOAD_FOR_OTHER_ADDRESS"
7223
};
7224
 
7225
/* These functions are used to print the variables set by 'find_reloads' */
7226
 
7227
void
7228
debug_reload_to_stream (FILE *f)
7229
{
7230
  int r;
7231
  const char *prefix;
7232
 
7233
  if (! f)
7234
    f = stderr;
7235
  for (r = 0; r < n_reloads; r++)
7236
    {
7237
      fprintf (f, "Reload %d: ", r);
7238
 
7239
      if (rld[r].in != 0)
7240
        {
7241
          fprintf (f, "reload_in (%s) = ",
7242
                   GET_MODE_NAME (rld[r].inmode));
7243
          print_inline_rtx (f, rld[r].in, 24);
7244
          fprintf (f, "\n\t");
7245
        }
7246
 
7247
      if (rld[r].out != 0)
7248
        {
7249
          fprintf (f, "reload_out (%s) = ",
7250
                   GET_MODE_NAME (rld[r].outmode));
7251
          print_inline_rtx (f, rld[r].out, 24);
7252
          fprintf (f, "\n\t");
7253
        }
7254
 
7255
      fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
7256
 
7257
      fprintf (f, "%s (opnum = %d)",
7258
               reload_when_needed_name[(int) rld[r].when_needed],
7259
               rld[r].opnum);
7260
 
7261
      if (rld[r].optional)
7262
        fprintf (f, ", optional");
7263
 
7264
      if (rld[r].nongroup)
7265
        fprintf (f, ", nongroup");
7266
 
7267
      if (rld[r].inc != 0)
7268
        fprintf (f, ", inc by %d", rld[r].inc);
7269
 
7270
      if (rld[r].nocombine)
7271
        fprintf (f, ", can't combine");
7272
 
7273
      if (rld[r].secondary_p)
7274
        fprintf (f, ", secondary_reload_p");
7275
 
7276
      if (rld[r].in_reg != 0)
7277
        {
7278
          fprintf (f, "\n\treload_in_reg: ");
7279
          print_inline_rtx (f, rld[r].in_reg, 24);
7280
        }
7281
 
7282
      if (rld[r].out_reg != 0)
7283
        {
7284
          fprintf (f, "\n\treload_out_reg: ");
7285
          print_inline_rtx (f, rld[r].out_reg, 24);
7286
        }
7287
 
7288
      if (rld[r].reg_rtx != 0)
7289
        {
7290
          fprintf (f, "\n\treload_reg_rtx: ");
7291
          print_inline_rtx (f, rld[r].reg_rtx, 24);
7292
        }
7293
 
7294
      prefix = "\n\t";
7295
      if (rld[r].secondary_in_reload != -1)
7296
        {
7297
          fprintf (f, "%ssecondary_in_reload = %d",
7298
                   prefix, rld[r].secondary_in_reload);
7299
          prefix = ", ";
7300
        }
7301
 
7302
      if (rld[r].secondary_out_reload != -1)
7303
        fprintf (f, "%ssecondary_out_reload = %d\n",
7304
                 prefix, rld[r].secondary_out_reload);
7305
 
7306
      prefix = "\n\t";
7307
      if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7308
        {
7309
          fprintf (f, "%ssecondary_in_icode = %s", prefix,
7310
                   insn_data[rld[r].secondary_in_icode].name);
7311
          prefix = ", ";
7312
        }
7313
 
7314
      if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7315
        fprintf (f, "%ssecondary_out_icode = %s", prefix,
7316
                 insn_data[rld[r].secondary_out_icode].name);
7317
 
7318
      fprintf (f, "\n");
7319
    }
7320
}
7321
 
7322
void
7323
debug_reload (void)
7324
{
7325
  debug_reload_to_stream (stderr);
7326
}

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