OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [testsuite/] [gcc.dg/] [20020310-1.c] - Blame information for rev 154

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 149 jeremybenn
/* PR optimization/5844
2
   This testcase was miscompiled because of an rtx sharing bug.  */
3
/* { dg-do run } */
4
/* { dg-options "-O2" } */
5
/* { dg-options "-O2 -mtune=i586" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
6
 
7
struct A
8
{
9
  struct A *a;
10
  int b;
11
};
12
 
13
struct B
14
{
15
  struct A *c;
16
  unsigned int d;
17
};
18
 
19
struct A p = { &p, -1 };
20
struct B q = { &p, 0 };
21
 
22
extern void abort (void);
23
extern void exit (int);
24
 
25
struct B *
26
foo (void)
27
{
28
  return &q;
29
}
30
 
31
void
32
bar (void)
33
{
34
  struct B *e = foo ();
35
  struct A *f = e->c;
36
  int g = f->b;
37
 
38
  if (++g == 0)
39
    {
40
      e->d++;
41
      e->c = f->a;
42
    }
43
 
44
  f->b = g;
45
}
46
 
47
int
48
main ()
49
{
50
  bar ();
51
  if (p.b != 0 || q.d != 1 || q.c != &p)
52
    abort ();
53
  exit (0);
54
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.